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Fix avx512vp cpuid #1355

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Merged
serge-sans-paille merged 1 commit into from
May 21, 2026
+29 −5
Merged

Fix avx512vp cpuid #1355

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34 changes: 29 additions & 5 deletions include/xsimd/config/xsimd_cpu_features_x86.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -857,7 +857,12 @@ namespace xsimd

inline bool avx() const noexcept { return avx_enabled() && leaf1().all_bits_set<x86_cpuid_leaf1::ecx::avx>(); }

inline bool avx_128() const noexcept { return sse_enabled() && leaf1().all_bits_set<x86_cpuid_leaf1::ecx::avx>(); }
inline bool avx_128() const noexcept
{
// Avx 128 bit instructions use the same xmm registers from SSE so checking if those
// are enabled is sufficient.
return sse_enabled() && leaf1().all_bits_set<x86_cpuid_leaf1::ecx::avx>();
}
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@AntoinePrv AntoinePrv May 21, 2026

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Just adding a comment


inline bool aes_ni() const noexcept { return sse_enabled() && leaf1().all_bits_set<x86_cpuid_leaf1::ecx::aes_ni>(); }

Expand All @@ -869,7 +874,12 @@ namespace xsimd

inline bool avx2() const noexcept { return avx_enabled() && leaf7().all_bits_set<x86_cpuid_leaf7::ebx::avx2>(); }

inline bool avx2_128() const noexcept { return sse_enabled() && leaf7().all_bits_set<x86_cpuid_leaf7::ebx::avx2>(); }
inline bool avx2_128() const noexcept
{
// Avx 128 bit instructions use the same xmm registers from SSE so checking if those
// are enabled is sufficient.
return sse_enabled() && leaf7().all_bits_set<x86_cpuid_leaf7::ebx::avx2>();
}
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@AntoinePrv AntoinePrv May 21, 2026

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Same, this is just one extra comment


inline bool bmi2() const noexcept { return leaf7().all_bits_set<x86_cpuid_leaf7::ebx::bmi2>(); }

Expand All @@ -893,11 +903,25 @@ namespace xsimd

inline bool avx512bw() const noexcept { return avx512_enabled() && leaf7().all_bits_set<x86_cpuid_leaf7::ebx::avx512bw>(); }

inline bool avx512vl() const noexcept { return avx512_enabled() && leaf7().all_bits_set<x86_cpuid_leaf7::ebx::avx512vl>(); }
inline bool avx512vl() const noexcept
{
return xcr0().all_bits_set<x86_xcr0::xcr0::opmask>()
&& leaf7().all_bits_set<x86_cpuid_leaf7::ebx::avx512f, x86_cpuid_leaf7::ebx::avx512vl>();
}

inline bool avx512vl_128() const noexcept { return avx512vl() && osxsave(); }
inline bool avx512vl_128() const noexcept
{
// AVX512 128 bit instructions use the same xmm registers from SSE so checking if those
// are enabled is sufficient.
return sse_enabled() && avx512vl();
}

inline bool avx512vl_256() const noexcept { return avx512vl_128(); }
inline bool avx512vl_256() const noexcept
{
// AVX512 256 bit instructions use the same ymm registers from AVX so checking if those
// are enabled is sufficient.
return avx_enabled() && avx512vl();
}

inline bool avx512vbmi() const noexcept { return avx512_enabled() && leaf7().all_bits_set<x86_cpuid_leaf7::ecx::avx512vbmi>(); }

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