feat(somehal): register x86 ACPI IOAPIC through rdrive

drivers/ax-driver/build.rs

@@ -6,6 +6,17 @@ const VIRTIO_DEV_FEATURES: &[&str] = &[
     "virtio-socket",
 ];
 
+const PCI_DYN_INTX_ROUTE_FEATURES: &[&str] = &[
+    "intel-net",
+    "ixgbe",
+    "realtek-rtl8125",
+    "virtio-net",
+    "xhci-pci",
+];
+
+const PCI_DYN_ACPI_INTX_ROUTE_FEATURES: &[&str] =
+    &["intel-net", "ixgbe", "realtek-rtl8125", "virtio-net"];
+
 fn has_feature(feature: &str) -> bool {
     std::env::var(format!(
         "CARGO_FEATURE_{}",
@@ -28,6 +39,7 @@ fn main() {
     let has_plat_static = has_feature("plat-static");
     let has_plat_dyn = has_feature("plat-dyn");
     let target_arch = std::env::var("CARGO_CFG_TARGET_ARCH").unwrap_or_default();
+    let target_os = std::env::var("CARGO_CFG_TARGET_OS").unwrap_or_default();
     let target_has_cvsd = matches!(target_arch.as_str(), "riscv32" | "riscv64");
 
     if has_plat_dyn {
@@ -38,12 +50,20 @@ fn main() {
     if has_virtio_core || has_virtio_dev {
         enable_cfg_flag("virtio_dev");
     }
+    if has_plat_dyn && target_os == "none" && has_any_feature(PCI_DYN_INTX_ROUTE_FEATURES) {
+        enable_cfg_flag("pci_dyn_intx_route");
+    }
+    if has_plat_dyn && target_os == "none" && has_any_feature(PCI_DYN_ACPI_INTX_ROUTE_FEATURES) {
+        enable_cfg_flag("pci_dyn_acpi_intx_route");
+    }
     if has_any_feature(&["ahci", "bcm2835-sdhci"]) || (has_feature("cvsd") && target_has_cvsd) {
         enable_cfg_flag("sync_block_dev");
     }
 
     println!("cargo::rustc-check-cfg=cfg(plat_static)");
     println!("cargo::rustc-check-cfg=cfg(plat_dyn)");
     println!("cargo::rustc-check-cfg=cfg(virtio_dev)");
+    println!("cargo::rustc-check-cfg=cfg(pci_dyn_intx_route)");
+    println!("cargo::rustc-check-cfg=cfg(pci_dyn_acpi_intx_route)");
     println!("cargo::rustc-check-cfg=cfg(sync_block_dev)");
 }

drivers/ax-driver/src/pci/acpi.rs

@@ -1,28 +1,12 @@
 extern crate alloc;
 
-#[cfg(all(
-    target_os = "none",
-    any(
-        feature = "intel-net",
-        feature = "ixgbe",
-        feature = "realtek-rtl8125",
-        feature = "virtio-net",
-        feature = "xhci-pci",
-    )
-))]
+#[cfg(pci_dyn_acpi_intx_route)]
 use alloc::format;
 
 use log::debug;
-#[cfg(all(
-    target_os = "none",
-    any(
-        feature = "intel-net",
-        feature = "ixgbe",
-        feature = "realtek-rtl8125",
-        feature = "virtio-net",
-        feature = "xhci-pci",
-    )
-))]
+#[cfg(pci_dyn_acpi_intx_route)]
+use rdrive::probe::acpi::AcpiGsiRoute;
+#[cfg(pci_dyn_acpi_intx_route)]
 use rdrive::probe::pci::PciAddress;
 use rdrive::{
     PlatformDevice,
@@ -70,16 +54,7 @@ fn probe_acpi_ecam(info: AcpiInfo<'_>, plat_dev: PlatformDevice) -> Result<(), O
     }
 }
 
-#[cfg(all(
-    target_os = "none",
-    any(
-        feature = "intel-net",
-        feature = "ixgbe",
-        feature = "realtek-rtl8125",
-        feature = "virtio-net",
-        feature = "xhci-pci",
-    )
-))]
+#[cfg(pci_dyn_acpi_intx_route)]
 pub(crate) fn acpi_irq_for_endpoint(
     address: PciAddress,
     interrupt_pin: u8,
@@ -89,21 +64,32 @@ pub(crate) fn acpi_irq_for_endpoint(
     else {
         return Ok(None);
     };
-    result
-        .map(|route| {
-            route.map(|route| {
-                log::info!(
-                    "ACPI PCI INTx route: endpoint {} pin {} -> GSI {} IOAPIC {} input {} vector \
-                     {:#x}",
-                    address,
-                    interrupt_pin,
-                    route.gsi,
-                    route.io_apic_id,
-                    route.io_apic_input,
-                    route.vector
-                );
-                route.vector
-            })
-        })
-        .map_err(|err| OnProbeError::other(format!("{err}")))
+    let route = result.map_err(|err| OnProbeError::other(format!("{err}")))?;
+    let Some(route) = route else {
+        return Ok(None);
+    };
+
+    let irq = setup_acpi_intx_irq(&route.gsi)?;
+    log::info!(
+        "ACPI PCI INTx route: endpoint {} pin {} -> GSI {} IOAPIC {} input {} vector {:#x}",
+        address,
+        interrupt_pin,
+        route.gsi.gsi,
+        route.gsi.controller_id,
+        route.gsi.controller_input,
+        usize::from(irq)
+    );
+    Ok(Some(usize::from(irq)))
+}
+
+#[cfg(pci_dyn_acpi_intx_route)]
+fn setup_acpi_intx_irq(route: &AcpiGsiRoute) -> Result<rdrive::IrqId, OnProbeError> {
+    let intc = rdrive::get_list::<rdif_intc::Intc>()
+        .into_iter()
+        .find(|intc| intc.descriptor().name.starts_with("ACPI IOAPIC"))
+        .ok_or_else(|| OnProbeError::other("ACPI IOAPIC interrupt controller is not registered"))?;
+    let mut intc = intc
+        .lock()
+        .map_err(|_| OnProbeError::other("ACPI IOAPIC interrupt controller is locked"))?;
+    Ok(intc.setup_irq_by_acpi(route))
 }

drivers/ax-driver/src/pci/fdt.rs

@@ -1,41 +1,14 @@
 extern crate alloc;
 
 use alloc::format;
-#[cfg(all(
-    target_os = "none",
-    any(
-        feature = "intel-net",
-        feature = "ixgbe",
-        feature = "realtek-rtl8125",
-        feature = "virtio-net",
-        feature = "xhci-pci",
-    )
-))]
+#[cfg(pci_dyn_intx_route)]
 use alloc::vec::Vec;
 
-#[cfg(all(
-    target_os = "none",
-    any(
-        feature = "intel-net",
-        feature = "ixgbe",
-        feature = "realtek-rtl8125",
-        feature = "virtio-net",
-        feature = "xhci-pci",
-    )
-))]
+#[cfg(pci_dyn_intx_route)]
 use fdt_edit::Fdt;
 use fdt_edit::{NodeType, PciRange, PciSpace};
 use log::{debug, trace, warn};
-#[cfg(all(
-    target_os = "none",
-    any(
-        feature = "intel-net",
-        feature = "ixgbe",
-        feature = "realtek-rtl8125",
-        feature = "virtio-net",
-        feature = "xhci-pci",
-    )
-))]
+#[cfg(pci_dyn_intx_route)]
 use rdrive::probe::pci::PciAddress;
 use rdrive::{
     PlatformDevice,
@@ -158,16 +131,7 @@ pub(super) fn register_fdt_legacy_irq(info: &FdtInfo<'_>, logical_bus_end: u8) {
     super::register_legacy_irq_route(0, logical_bus_end, irq);
 }
 
-#[cfg(all(
-    target_os = "none",
-    any(
-        feature = "intel-net",
-        feature = "ixgbe",
-        feature = "realtek-rtl8125",
-        feature = "virtio-net",
-        feature = "xhci-pci",
-    )
-))]
+#[cfg(pci_dyn_intx_route)]
 pub fn fdt_irq_for_endpoint(
     address: PciAddress,
     interrupt_pin: u8,
@@ -180,16 +144,7 @@ pub fn fdt_irq_for_endpoint(
     result.map(Some)
 }
 
-#[cfg(all(
-    target_os = "none",
-    any(
-        feature = "intel-net",
-        feature = "ixgbe",
-        feature = "realtek-rtl8125",
-        feature = "virtio-net",
-        feature = "xhci-pci",
-    )
-))]
+#[cfg(pci_dyn_intx_route)]
 fn resolve_pci_irq_from_fdt(
     fdt: &Fdt,
     address: PciAddress,
@@ -259,16 +214,7 @@ fn resolve_pci_irq_from_fdt(
     })
 }
 
-#[cfg(all(
-    target_os = "none",
-    any(
-        feature = "intel-net",
-        feature = "ixgbe",
-        feature = "realtek-rtl8125",
-        feature = "virtio-net",
-        feature = "xhci-pci",
-    )
-))]
+#[cfg(pci_dyn_intx_route)]
 fn decode_irq_cells(specifier: &[u32]) -> Option<usize> {
     match specifier {
         [irq] => Some(*irq as usize),

drivers/ax-driver/src/pci/mod.rs

@@ -33,29 +33,9 @@ use crate::virtio::VirtIoHalImpl;
 mod acpi;
 #[cfg(plat_dyn)]
 mod fdt;
-#[cfg(all(
-    plat_dyn,
-    target_os = "none",
-    any(
-        feature = "intel-net",
-        feature = "ixgbe",
-        feature = "realtek-rtl8125",
-        feature = "virtio-net",
-        feature = "xhci-pci",
-    )
-))]
+#[cfg(pci_dyn_acpi_intx_route)]
 pub(crate) use acpi::acpi_irq_for_endpoint;
-#[cfg(all(
-    plat_dyn,
-    target_os = "none",
-    any(
-        feature = "intel-net",
-        feature = "ixgbe",
-        feature = "realtek-rtl8125",
-        feature = "virtio-net",
-        feature = "xhci-pci",
-    )
-))]
+#[cfg(pci_dyn_intx_route)]
 pub(crate) use fdt::fdt_irq_for_endpoint;
 
 const MAX_PCIE_LEGACY_IRQS: usize = 8;

drivers/interface/rdif-def/src/irq.rs

@@ -20,3 +20,26 @@ pub struct IrqConfig {
     /// Is cpu private interrupt?
     pub is_private: bool,
 }
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub enum AcpiIrqTrigger {
+    Edge,
+    Level,
+}
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub enum AcpiIrqPolarity {
+    ActiveHigh,
+    ActiveLow,
+}
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub struct AcpiGsiRoute {
+    pub gsi: u32,
+    pub vector: usize,
+    pub controller_id: u8,
+    pub controller_address: u32,
+    pub controller_input: u8,
+    pub trigger: AcpiIrqTrigger,
+    pub polarity: AcpiIrqPolarity,
+}

drivers/interface/rdif-intc/src/lib.rs

@@ -9,6 +9,10 @@ pub trait Interface: DriverGeneric {
     fn setup_irq_by_fdt(&mut self, _irq_prop: &[u32]) -> IrqId {
         unimplemented!();
     }
+
+    fn setup_irq_by_acpi(&mut self, _route: &AcpiGsiRoute) -> IrqId {
+        unimplemented!();
+    }
 }
 
 def_driver!(Intc, Interface);