fix(deepseek-v4): route large-token fused mHC around the allinone cliff#622
fix(deepseek-v4): route large-token fused mHC around the allinone cliff#622Xiangyi1996 wants to merge 1 commit into
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The vendored allinone kernel dispatches to a tf32 atomic variant above 32 tokens that runs ~10x slower per call (222-240us vs a flat ~23us for the composed post_mapping + prenorm-GEMM + big-fuse path; kernel identity confirmed via profiler, outputs agree within 1.2% relative error over 8 chained layers on all four outputs). Route B>32 through the composed path, keep allinone at B<=32 so the canonical p8 (M=32) path is unchanged, and log each (num_tokens, path) selection once per process. Signed-off-by: Xiangyi Zhang <xiangyiz@nvidia.com>
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| residual_cur = _trtllm_mhc_post(x_prev, residual_prev, post_prev, comb_prev) | ||
| layer_input, post_cur, comb_cur = _trtllm_mhc_pre( |
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Preserve allinone when DeepGEMM is unavailable
When TOKENSPEED_V4_MHC_BACKEND=trtllm runs on an SM100 host with the TRT-LLM mHC kernels installed but without the optional DeepGEMM mHC op, any fused call with more than 32 flattened tokens now enters this composed branch and then _trtllm_mhc_pre unconditionally calls deep_gemm_mhc_prenorm_gemm. _use_trtllm_mhc only checked supports_trtllm_mhc, so in that supported TRT-LLM-only install the DeepGEMM symbol is still error_fn and these calls raise RuntimeError("Kernel implementation not found"), whereas they previously ran through the allinone kernel. Gate this reroute on has_deep_gemm_mhc() or fall back to allinone when DeepGEMM is absent.
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Summary
Stacked on #600. Routes fused-mHC calls with more than 32 tokens through the composed two-stage path (post_mapping + prenorm split-K GEMM + big fuse) instead of the vendored allinone kernel, with once-per-shape selection logging.
B <= 32keeps the current allinone path, so the canonical p8 (verify M=32) path is unchanged in compute and kernel behavior (the change adds a once-per-shape selection log and a small process-global logging set).Why
Above 32 tokens the allinone entry dispatches to a tf32 atomic variant with a ~10x per-call cliff (kernel identity confirmed via profiler):
Any decode step with bs >= 9 at verify width 4 (M >= 36), p16-class workloads, or a wider verify would hit ~122 calls x ~230us = ~28 ms/step. This PR claims cliff avoidance only — no canonical p8 speedup is claimed.
Evidence
CI notes
GPU closure evidence (added)
The p12 shape (verify M=48) hits the allinone tf32-atomic cliff on every decode step in the control arm; this is the end-to-end realization of the microbenched ~10x per-call cliff. Canonical p8 (M=32) remains on the unchanged allinone path.