Add little-endian PowerPC (ppc64le) support to VM JIT compiler#860
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runlevel5 wants to merge 2 commits intoioquake:mainfrom
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Add little-endian PowerPC (ppc64le) support to VM JIT compiler#860runlevel5 wants to merge 2 commits intoioquake:mainfrom
runlevel5 wants to merge 2 commits intoioquake:mainfrom
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@classilla @MPC7500 I would really appreciate if you could help review this PR for me. Great thanks in advance |
The PowerPC JIT (vm_powerpc.c) was written for big-endian ppc/ppc64 only. This adds support for little-endian ppc64le (ELFv2 ABI) with the following changes: Endianness fixes: - Add SE/HI16/LO16/FPRHI/FPRLO macros for endian-independent access to union half-words and FPR double-word halves in memory - Replace big-endian byte-reversal trick for immediate decoding with portable shift-based approach (matching vm_x86.c) - Fix all union short[2] accesses and FPR store/load offsets for OP_CVIF and OP_CVFI ELFv2 ABI support: - Add ELFV1/ELFV2 detection macros using _CALL_ELF - Make OPD (Official Procedure Descriptor) conditional on ELFv1 only; ELFv2 uses direct code addresses for function pointers - Set r12 = target address before indirect calls (bctrl) as required by the ELFv2 global entry point convention - Fix entry point selection to use direct code address on ELFv2 Bug fixes (affect all PowerPC platforms): - Remove incorrect Z_Free of Hunk_Alloc'd instructionPointers, which caused 'Z_Free: freed a pointer without ZONEID' crash - Add __builtin___clear_cache() before mprotect() to synchronize split D/I caches after writing generated code Tested on ppc64le (Fedora 43, GCC 15.2.1) with full retail Quake III Arena assets: FFA, CTF, and Team Arena modes with up to 8 bots across multiple maps including 5-minute stress tests.
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Summary
The PowerPC JIT compiler (
vm_powerpc.c) was written for big-endian ppc/ppc64 only. This patch adds support for little-endian ppc64le (ELFv2 ABI).It would also address #300
Changes
Endianness fixes
SE/HI16/LO16/FPRHI/FPRLOmacros for endian-independent access to union half-words and FPR double-word halves in memoryvm_x86.c)union short[2]accesses and FPR store/load offsets forOP_CVIFandOP_CVFIELFv2 ABI support
ELFV1/ELFV2detection macros using_CALL_ELFr12 = target addressbefore indirect calls (bctrl) as required by the ELFv2 global entry point conventionBug fixes (affect all PowerPC platforms)
Z_FreeofHunk_Alloc'dinstructionPointers, which causedZ_Free: freed a pointer without ZONEIDcrash__builtin___clear_cache()beforemprotect()to synchronize split D/I caches after writing generated codeTesting
Tested on ppc64le (Fedora 43, GCC 15.2.1) with full retail Quake III Arena assets:
Full gameplay verified: rocket/railgun kills, flag captures/returns, Quad Damage, bot team coordination, voice commands, falling deaths, bot chat. All clean shutdowns, no crashes.
Notes
code/qcommon/vm_powerpc.cSL()/SA()pattern in the fileZ_Freebug and missing I-cache flush affect big-endian PowerPC too, though they may have been masked by specific allocator/cache behavior on those platforms