6.0.0-Alpha7

Highlights

RISC-V

This release contains the highly awaited RISC-V module update.
Because RISC-V is in such active development the changes compared to the old module are enormous.

Please check out the RISC-V summary in the release guide for an overview.
We expect it to have some bugs so we are grateful for reports!

Capstone 32 bit builds

Capstone is now build and tested on several 32 bit architectures, including i686 Windows.

Consistent error reporting of CS_ERR_MEM

Fix possible NULL-pointer dereferences for out of memory events.
Capstone's API will now always return CS_ERR_MEM if allocations fail.

x86-64: Decoding of conflicting segment overrides was changed to match CPU behavior.

Please see the x86-64 section in the release guide for details.

What's Changed

• Refactoring the RISCV architecture to Auto-Sync on LLVM by @moste00 in #2756
• Added RISCV v6 release notes by @moste00 in #2846
• Package build workflow fix by @Rot127 in #2849
• Ignore ES/CS/SS/DS segment overrides in x64 mode by @jxors in #2819
• x86: fix decoding of mandatory prefixes by @jxors in #2856
• Fix unchecked allocations by @Grond66 in #2844
• Convert all README's to markdown files. by @Rot127 in #2863
• Fix 32bit build by @Rot127 in #2796

New Contributors

• @jxors made their first contribution in #2819
• @Grond66 made their first contribution in #2844

Full Changelog: 6.0.0-Alpha6...6.0.0-Alpha7

5.0.7

What's Changed

• Build fix for CMake 4 by @scribam in #2785
• CVE v5 backports by @Rot127 in #2835

CVEs

This release fixes CVE-2025-68114
and CVE-2025-67873 reported by @Finder16.

Only users who have custom implementations of the skipdata callback or vsnprintf are affected.

Full Changelog: 5.0.6...5.0.7

6.0.0-Alpha6

Highlights

• Fixed CVE-2025-68114 and CVE-2025-67873 reported by @Finder16 (see below).
• csh and value argument of cs_option are now of type uintptr_t by @kingiler.
• Several improvements on x86 details and assembly text by @hainest and @0verflowme.
• Better support for cross builds.
• Handle previously ignored operands in M68K by @csoren.
• Change Alpha immediate operands to int64_t by @wargio.
• Static Capstone libraries are now built with PIC enabled by @hainest.

CVEs

This release fixes CVE-2025-68114
and CVE-2025-67873 reported by @Finder16.

Only users who have custom implementations of the skipdata callback or vsnprintf are affected.

---

Version 6.0.0-Alpha6: January 13th, 2026

What's Changed

• Update register semantics for x86 pop instructions by @hainest in #2770
• Python binding: Support 3.14 free-threaded CPython build by @Antelox in #2769
• Only publish if tag is present and workflow is triggered by release. by @Rot127 in #2766
• Add Python prominently to the workflow name to prevent confusion. by @Rot127 in #2774
• Fix incorrectly defined BSHUFFLE opcode. by @Rot127 in #2772
• Fix cstest missing size checks by @Rot127 in #2775
• Update read/written registers for x86 call instructions by @hainest in #2773
• Apply other VIS instruction fixes from llvm/#130967 by @Rot127 in #2777
• Fix regex match syntax for project version by @Zangetsu38 in #2779
• Add workflow to check for C code formatting and format all code with clang-format-17 by @Rot127 in #2744
• Fix log message in cstest_py/compare.compare_bit_flags by @hainest in #2783
• DIET MSVC C1001 Fix by @LADIlib in #2782
• Update read/written registers for x86 interrupt instructions by @hainest in #2781
• Update read/written registers for x87 comparison instructions by @hainest in #2784
• Update read/written registers for x86 enter/leave instructions by @hainest in #2788
• Update read/written registers for x86 procedure return instructions by @hainest in #2789
• Add instruction details to cstest logging by @hainest in #2787
• Update read/written registers for x86 interrupt return instructions by @hainest in #2793
• Remove unused fuzzit.sh script and key. by @Rot127 in #2797
• Fix assertions if CAPSTONE_ASSERTION_WARNINGS=1. by @Rot127 in #2792
• Update read/written registers for x86 string instructions by @hainest in #2790
• Update read/written registers for x86 conditional jump instructions by @hainest in #2798
• Minor formatting changes by @moste00 in #2804
• Fix cstest_py and add negative tests. by @Rot127 in #2807
• Add null check for Xtensa operation detail in Xtensa_add_cs_detail_0 by @b1llow in #2809
• Update read/written registers for x86 loop instructions by @hainest in #2799
• Update read/written registers for x86 unconditional jump instructions by @hainest in #2800
• Bump to latest MacOS runner. by @Rot127 in #2812
• Fix SH decode table being exported globally by @stuxnot in #2814
• Doc fixups by @Rot127 in #2754
• Add better support for cross builds. by @Rot127 in #2803
• Update read/written registers for x86 system call instructions by @hainest in #2820
• Fix possible OOB read by @Rot127 in #2825
• Update read/written registers for x86 cmpxchg instruction by @hainest in #2821
• Apply clang-format-17 to test_poc.c by @Rot127 in #2833
• Add missing apt-get update before installing dependencies. by @Rot127 in #2832
• Return for failing range asserts to enforce the assumptions. by @Rot127 in #2829
• [alpha] Fix immediate to be 64bit wide by @wargio in #2840
• Build static libs with PIC by @hainest in #2836
• M68K: fix displacement, register naming and suppressed registers by @csoren in #2839
• X86: Fix movabsq immediates >= 2^63 printed as decimal in ATT syntax by @0verflowme in #2843
• M68K: add displacement size fields to disassembler by @csoren in #2842
• fix: use uintptr_t to maintain pointer provenance by @kingiler in #2845

New Contributors

• @Zangetsu38 made their first contribution in #2779
• @LADIlib made their first contribution in #2782
• @moste00 made their first contribution in #2804
• @stuxnot made their first contribution in #2814
• @csoren made their first contribution in #2839
• @0verflowme made their first contribution in #2843
• @kingiler made their first contribution in #2845

Full Changelog: 6.0.0-Alpha5...6.0.0-Alpha6

6.0.0-Alpha5

Highlights

• The SPARC module was updated to LLVM-18 (please see the Release Guide for details).
• Python bindings now use ABI3 wheels.
• Added support for Apple's proprietary AArch64 instructions.
• Instructions that can be decoded but are invalid for other reasons are now marked as such (#2707).
• LoongArch: Compute absolute address for address operand (#2699)

Note about published Python Wheels

The Alpha5 Python packages on PyPi were published by accident with commit 5d989a4 of PR #2765.
The build is equivalent to tag 6.0.0-Alpha5, except for the additions to Changelog.md.
Because Changelog.md is not part of the distributed Python wheels, we didn't republish the packages.
Sorry for any inconvenience.

What's Changed

• Apple AArch64 proprietary by @Rot127 in #2692
• Add jump group for generic jirl by @jiegec in #2698
• LoongArch: Compute absolute address for address operand by @jiegec in #2699
• Fix LoongArch ld/st instructions register info by @jiegec in #2701
• ARM: fix typo, cspr -> cpsr by @jiegec in #2716
• Fix arm pop reg access by @jiegec in #2718
• Fix missing sp register read in ret instruction by @jiegec in #2719
• Fix missing operand for smstart, due to space replaced by tab by @jiegec in #2720
• Add flag for the SoftFail case of the LLVM disassembler. by @Rot127 in #2707
• Remove unused files. by @Rot127 in #2709
• clang-format: change license to BSD-3-Clause by @tmfink in #2724
• Use cs_ac_type for operand access mode in all arches and use cs_xtensa_op_type for Xtensa operand type by @jiegec in #2721
• Make SStream respect the CS_OPT_UNSIGNED flag. by @Rot127 in #2723
• Make assertion hit warnings optional in release builds. by @Rot127 in #2729
• Update source list before installing valgrind. by @Rot127 in #2730
• Add x30 implicit read to the RET alias. by @Rot127 in #2739
• Print immediate only memory operands for AArch64. by @Rot127 in #2732
• Add warning about naive search and replace to patch reg names. by @Rot127 in #2728
• Enable to generate legacy MC tests for the fuzzer. by @Rot127 in #2733
• Auto-Sync update Sparc LLVM-18 by @Rot127 in #2704
• Python binding: Use ABI3 wheels by @Antelox in #2742
• Update Auto-Sync to Python 3.13 and tree-sitter-py 24.0 by @Rot127 in #2705
• Fix for Risc-V C.SRLI decoding (issue #2731) by @h01G3r in #2745
• HPPA fix mem operands access and instruction printing by @R33v0LT in #2746
• Handle zero case of R1 operand field by @Rot127 in #2743
• Fix comisd memory operand size: xmmword -> qword by @jiegec in #2750
• Fix missing repne for movsd op by @jiegec in #2752
• Explain more details about CC change. by @Rot127 in #2753
• Add a test for FCC conditions for none FPU instructions. by @Rot127 in #2758
• Print register access type and registers accessed in cstool_mips.c by @jiegec in #2762
• Fix duplication of memory operand by @Rot127 in #2761
• Python binding: Windows ARM64 build by @Antelox in #2760
• Implement cs_regs_access for Alpha architecture by @jiegec in #2763
• Fix decoding of the FCC fields of FBPcc (format 2_3). by @Rot127 in #2764

New Contributors

• @h01G3r made their first contribution in #2745

Full Changelog: 6.0.0-Alpha4...6.0.0-Alpha5

6.0.0-Alpha4

What's Changed

• Fix wrong version requirement of tricore instructions by @Changqing-JING in #2620
• Python bindings: Switch to ubuntu-24.04-arm runner image by @Antelox in #2625
• Build Tarball before DEB/RPM package. by @Rot127 in #2627
• Add aliases mapping for MIPS & test for id, alias_id by @wargio in #2635
• Add checks for MIPS details on cstest_py by @wargio in #2640
• Give the user some guidance where to add missing enumeration values. by @Rot127 in #2639
• Python bindings: sdist creation fix + relative test by @Antelox in #2624
• cmake: Fix building capstone as sub-project by @imphil in #2629
• Update operand type enums of all arch modules to the one in capstone.h by @Rot127 in #2633
• Enhance shift value and types of shift instructions. by @Rot127 in #2638
• Fix #2643 by @Rot127 in #2645
• Tms32c64x Little Endian by @Rot127 in #2648
• Add call group to svc, smc and hvc. by @Rot127 in #2651
• Decode BH field in print_insn_detail_ppc by @hainest in #2662
• Remove undefined constants in riscv_const.py (#2660) by @Asphaltt in #2661
• Stringify BH fields when printing ppc details by @hainest in #2663
• MIPS: Fix MIPS16 decoding, wrong flags and ghost registers by @wargio in #2665
• Add a script to compare the inc file content with the lastest generated ones. by @Rot127 in #2667
• Mips32r6_64r632 is for both mips32r6 and mips64r6 by @wargio in #2673
• Fix nanoMIPS decoding of jalrc by @wargio in #2672
• Revert "Add a script to compare the inc file content with the lastest generated ones." by @Rot127 in #2678
• Add workflow for building on Windows by @stevenjoezhang in #2675
• Update read/written registers for x87 comparison instructions by @hainest in #2680
• Version: Update to v6.0.0-alpha4 by @kabeor in #2682
• Build PDB for debugging on Windows by @stevenjoezhang in #2685

New Contributors

• @imphil made their first contribution in #2629
• @Asphaltt made their first contribution in #2661
• @stevenjoezhang made their first contribution in #2675

Full Changelog: 6.0.0-Alpha3...6.0.0-Alpha4

Version 5.0.6

What's Changed

• V5 - Fix sdist build and add CI job for testing it. by @Rot127 in #2623
• Build Tarball before DEB/RPM package. by @Rot127 in #2626
• Fix cmake error when build with capstone as submodule by @WerWolv in #2619
• [v5] Tms32c64x little endian by @Rot127 in #2649
• version: update v5 to 5.0.6 by @kabeor in #2655

New Contributors

• @WerWolv made their first contribution in #2619

Full Changelog: 5.0.5...5.0.6

Version 6.0.0-Alpha3

Highlights

Architecture modules

• New ARC module (by @R33v0LT, sponsored by RizinOrg).
• BPF was update based on RFC 9669 and other sources (by @Roeegg2).
• Added support for TriCore 1.8 (by @Changqing-JING).
• Update and fixes to EVM (by @andelf)
• PPC update to LLVM 18 (adding a few new instructions).

Others

• Add many more Python wheels for different architecture/OS combinations (by @Antelox).
• Provide deb and rpm packages (by @AndrewQuijano).
• Handful of bug fixes and improvements (see below).

What's Changed

• Update Changelog Version to 6.0.0-Alpha2 by @kabeor in #2553
• PPC LLVM 18 by @Rot127 in #2540
• Arm regressions by @Rot127 in #2556
• Python bindings: Enable more archs + bump cibuildwheel action to the v2.22.0 by @Antelox in #2558
• Add arm64 and sysz compatibility layer to Python bindings by @peace-maker in #2559
• Make thumb, v8 and m-class positional cstool arguments. by @Rot127 in #2557
• Small arm64 compat header fixes by @satk0 in #2563
• PPC regressions by @Rot127 in #2575
• Fix 2572 by @Rot127 in #2574
• Clean up the cstest documentation and build instructions. by @Rot127 in #2580
• Update BPF arch by @Roeegg2 in #2568
• x86: update read/write registers for transfer instructions by @hainest in #2578
• cstest: use DOWNLOAD_EXTRACT_TIMESTAMP conditionally by @hainest in #2581
• Capstone v6 now supports Debian Packaging by @AndrewQuijano in #2579
• Fix complex atomic instructions handling by @Roeegg2 in #2584
• Fix linking issue on Windows. by @Rot127 in #2587
• Clarify between machine used vs. Capstone module affected. by @Rot127 in #2586
• Fix LoongArch aliases and CS_OPT_SYNTAX_NO_DOLLAR support by @wargio in #2594
• Update Actions by @AndrewQuijano in #2593
• Downgrade labeler to v4 again due to failing CI. by @Rot127 in #2598
• Delete Travis by @AndrewQuijano in #2600
• Implement CPack for Debian/RPM by @AndrewQuijano in #2590
• Add tricore tc1.8 instructions by @Changqing-JING in #2595
• Apply new EVM opcode updates by @andelf in #2602
• Fix SystemZ macro in Makefile by @Changqing-JING in #2603
• Rebased #2570 by @Rot127 in #2614
• chore(version): Update Version to 6.0.0-Alpha3 by @kabeor in #2616

New Contributors

• @satk0 made their first contribution in #2563
• @Roeegg2 made their first contribution in #2568
• @hainest made their first contribution in #2578
• @Changqing-JING made their first contribution in #2595
• @andelf made their first contribution in #2602

Full Changelog: 6.0.0-Alpha2...6.0.0-Alpha3

Version 5.0.5

What's Changed

• Fix code missing issue in v5.0.4

What's Changed in v5.0.4

• [v5][SuperH] Fix missing setting detail->sh by @david942j in #2465
• tricore: fixes #2386 in v5 by @imbillow in #2527
• Creating a functional Debian Package for Capstone v5 by @AndrewQuijano in #2569
• Duplicate of #2590 for v5 Branch by @AndrewQuijano in #2596
• Update version to v5.0.4 by @kabeor in #2604
• chore(version): update changelog to v5.0.4 by @kabeor in #2605

Full Changelog: 5.0.3...5.0.4

Version 5.0.4

What's Changed

• [v5][SuperH] Fix missing setting detail->sh by @david942j in #2465
• tricore: fixes #2386 in v5 by @imbillow in #2527
• Creating a functional Debian Package for Capstone v5 by @AndrewQuijano in #2569
• Duplicate of #2590 for v5 Branch by @AndrewQuijano in #2596
• Update version to v5.0.4 by @kabeor in #2604
• chore(version): update changelog to v5.0.4 by @kabeor in #2605

Full Changelog: 5.0.3...5.0.4

Version 6.0.0-Alpha2

What's Changed

• Update changelog for V6.0.0-Alpha1 by @kabeor in #2493
• Remove irrelevant changes. by @Rot127 in #2495
• Fixing UB santizer, LITBASE and assert errors. by @Rot127 in #2499
• Update labeler with Xtensa and v6 files. by @Rot127 in #2500
• Add hard asserts to all SStream functions and memset MCInst. by @Rot127 in #2501
• Only trigger on released action. by @Rot127 in #2497
• Fix cstest build with Ninja by @thestr4ng3r in #2506
• Tricore EA calculation by @Rot127 in #2504
• Update libcyaml dependency in cstest to 1.4.2 by @thestr4ng3r in #2508
• xtensa: Fix Branch Target by @imbillow in #2516
• Fix #2509. by @Rot127 in #2510
• AArch64: Replace vararg add_cs_detail by multiple concrete functions by @thestr4ng3r in #2507
• Fix stringop-truncation warning some compilers raise. by @Rot127 in #2522
• Adds ARM and AArch64 compatibility macros for the CC/VAS enums by @Rot127 in #2525
• Fix endianess issue during assignment. by @Rot127 in #2528
• This time actually fix big endian issue. by @Rot127 in #2530
• tricore: fixes #2474 by @imbillow in #2523
• Change CI to create Debian Package to Release by @AndrewQuijano in #2521
• Rename cmake build arguments by @Rot127 in #2534
• xtensa: update to espressif/llvm-project by @imbillow in #2533
• fix coverity by @imbillow in #2546
• Move debian package generation to a dispatch only workflow by @Rot127 in #2543
• Python package building rework by @Antelox in #2538
• Auto-Sync reproducability + ARM update by @Rot127 in #2532
• fix xtensa DecodeMR23RegisterClass and add tests for MAC16 instru… by @imbillow in #2551
• Prepare for update by @kabeor in #2552
• Update Changelog Version to 6.0.0-Alpha2 by @kabeor in #2553

New Contributors

• @AndrewQuijano made their first contribution in #2521
• @Antelox made their first contribution in #2538

Full Changelog: 6.0.0-Alpha1...6.0.0-Alpha2