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111ec2f
[AMDGPU] Fix conflicted literal test. NFC. (#197587)
rampitec May 13, 2026
1bb237a
[Instrumentor][NFC] Add docs and config-wizard script (#197066)
jdoerfert May 13, 2026
882d025
Improve the executable name detection in ELF core files. (#197341)
clayborg May 13, 2026
7e735ea
[compiler-rt][cmake] Fix check_cxx_compiler_flag calls (#197529)
ajordanr-google May 13, 2026
3ccc276
[Instrumentor][FIX] Fix oversight in docs heading (#197594)
jdoerfert May 13, 2026
ccc9038
[clang-format] Handle more Verilog attributes (#196455)
sstwcw May 13, 2026
fe787a8
[Bazel] Fixes 882d025 (#197593)
forking-google-bazel-bot[bot] May 13, 2026
37c5916
[BOLT][NFCI] Drop CFG profile attachment in DataAggregator (#195986)
aaupov May 14, 2026
c5f8414
[scudo] Add test for initFlags()
sadafebrahimi May 14, 2026
8ebd857
[clang-format][NFC] Correct comment (#197592)
sstwcw May 14, 2026
d2a57ec
[AMDGPU] Add lit64 machine verifier (#196457)
rampitec May 14, 2026
009fbc9
[clang-sycl-linker] Migrate tests from Driver/ to Tooling/ and use LL…
YuriPlyakhin May 14, 2026
16a1e05
[lldb] Support building test inferiors without debug info (#197002)
JDevlieghere May 14, 2026
93bfabb
[Offload] Make 'llvm-offload-binary' use multi-binaries (#197456)
jhuber6 May 14, 2026
18e73ee
[llvm] Add a tablegen !sort operator (#197303)
jroelofs May 14, 2026
940242e
[Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FOR…
Jwata May 14, 2026
33f7918
[PowerPC] Simplify lowering for lwat/ldat intrinsics (#194486)
redstar May 14, 2026
f996980
[X86][AVX10.2] Add BF16 to (U/S)8 saturating FP to int lowering (#19…
akhilgoe May 14, 2026
7c7a47e
[Clang][HLSL] Use EmitIntrinsicCall instead of EmitRuntimeCall for in…
wenju-he May 14, 2026
f0ad8ee
[lldb] Don't read live memory for assembly inst emulation (#197601)
jasonmolenda May 14, 2026
2ee4669
[CIR] Lower 'init' functions for global TLS (#197460)
erichkeane May 14, 2026
f7f6040
[CIR]Materialize temp adjustments (#197585)
erichkeane May 14, 2026
b638763
[flang][cuda] Use wider cudaMemcpy2D rows for descriptor transfers (#…
clementval May 14, 2026
923a29a
[compiler-rt][profile][test] Match clang_rt.profile CRT model on MSVC…
yxsamliu May 14, 2026
98f2f8c
[clang-tidy] Remove 80 char limit checking in CI. NFC. (#197609)
zeyi2 May 14, 2026
e2b5048
[AMDGPU] Validate forced lit() immediate (#196623)
rampitec May 14, 2026
4f60fb9
[flang][cuda] Honor !dir$ ignore_tkr(m) under -gpu=mem:{unified,manag…
wangzpgi May 14, 2026
83ae5cc
[flang][openacc] allow duplicate data sharing clauses (#197019)
akuhlens May 14, 2026
6cdd328
Handle typeidCompatibleVTable in skipModuleSummaryEntry (#196849)
orodley May 14, 2026
131d66c
[BOLT][DWARF] Support DW_FORM_ref_udata and DW_OP_regval_type (#197565)
maksfb May 14, 2026
35f5d7e
[AArch64][GlobalISel] Fast-path common G_CONSTANT/G_BRCOND/G_FRAME_IN…
c-rhodes May 14, 2026
29206d7
[OpenMP] Fix launch_bounds for OpenMP ompx_attribute (#195665)
kevinsala May 14, 2026
1d93fc4
[libc] Add LLVM_LIBC_ENABLE_EXPERIMENTAL_ENTRYPOINTS CMake flag (#197…
kaladron May 14, 2026
3272c56
[AMDGPU] Remove RCP_IFLAG combine (#197426)
piotrAMD May 14, 2026
7ae25fb
[AArch64] Keep MMO when converting gather lane to LDRSui. (#197522)
davemgreen May 14, 2026
13a6287
[AArch64][test] Fix use-after-scope in createInstrInfo (#197622)
thurstond May 14, 2026
a41d58e
[CIR][AArch64] Lower NEON vtrn1/2 intrinsics (#197112)
E00N777 May 14, 2026
f098a22
[clang-format] Add BreakBeforeReturnType option (#197268)
dlebed May 14, 2026
2045ee5
Add new libc GH team to CODEOWNERS (#197630)
kaladron May 14, 2026
e1135dc
[OFFLOAD][L0] Simplify kernel setGroups logic (#197411)
adurang May 14, 2026
0c539fc
[compiler-rt][ARM] Optimized double-precision FP mul/div (#179923)
statham-arm May 14, 2026
20f4289
[LV][NFC] Generate full CHECK lines for reduction-small-size.ll (#197…
david-arm May 14, 2026
7b09a4e
[LV] Fix the cost model for freeze instructions (#197188)
david-arm May 14, 2026
d2af73c
[compiler-rt][ARM] Optimized double-precision FP comparisons (#179924)
statham-arm May 14, 2026
c0ed919
[AMDGPU][GCNPreRAOptimizations] Reduce BVH premature reuse (#197386)
perlfu May 14, 2026
7ae1962
[clangd] Fix parens suppression in mid-identifier code-completion (#1…
argothiel May 14, 2026
3fda43d
[AMDGPU] Update permlane_bcast/down/up/xor intrinsic to support more …
mariusz-sikora-at-amd May 14, 2026
6293f16
[TableGen] Simplify Record type checks. NFC. (#197450)
jayfoad May 14, 2026
d566c8c
[clang-format] Fix parsing of goto labels (#197538)
HazardyKnusperkeks May 14, 2026
1cb92d8
[compiler-rt][ARM] Optimized single-precision FP comparisons (#179925)
statham-arm May 14, 2026
a4acc5c
[X86] Improve lowering of i32/i64 minmax reductions (#197578)
RKSimon May 14, 2026
1389d1a
merge main into amd-staging
ronlieb May 14, 2026
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1 change: 1 addition & 0 deletions .github/CODEOWNERS
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@
/amd/device-libs/ @b-sumner @lamb-j
/amd/hipcc/ @david-salinas @lamb-j

/libc/ @llbm/reviewers-libc
/libcxx/ @llvm/reviewers-libcxx
/libcxxabi/ @llvm/reviewers-libcxxabi
/libunwind/ @llvm/reviewers-libunwind
Expand Down
14 changes: 1 addition & 13 deletions bolt/include/bolt/Profile/DataAggregator.h
Original file line number Diff line number Diff line change
Expand Up @@ -234,21 +234,9 @@ class DataAggregator : public DataReader {
/// Return a vector of offsets corresponding to a trace in a function
/// if the trace is valid, std::nullopt otherwise.
std::optional<SmallVector<std::pair<uint64_t, uint64_t>, 16>>
getFallthroughsInTrace(BinaryFunction &BF, const Trace &Trace, uint64_t Count,
getFallthroughsInTrace(BinaryFunction &BF, const Trace &Trace,
bool IsReturn) const;

/// Record external entry into the function \p BF.
///
/// Return true if the entry is valid, false otherwise.
bool recordEntry(BinaryFunction &BF, uint64_t To, bool Mispred,
uint64_t Count = 1) const;

/// Record exit from the function \p BF via a call or return.
///
/// Return true if the exit point is valid, false otherwise.
bool recordExit(BinaryFunction &BF, uint64_t From, bool Mispred,
uint64_t Count = 1) const;

/// Branch stacks aggregation statistics
uint64_t NumTraces{0};
uint64_t NumInvalidTraces{0};
Expand Down
13 changes: 8 additions & 5 deletions bolt/lib/Core/DIEBuilder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -705,17 +705,17 @@ bool DIEBuilder::cloneExpression(const DataExtractor &Data,
Description.Op[0] == Encoding::BaseTypeRef) ||
(Description.Op.size() == 2 &&
Description.Op[1] == Encoding::BaseTypeRef &&
Description.Op[0] != Encoding::Size1))
Description.Op[0] != Encoding::Size1 &&
Description.Op[0] != Encoding::SizeLEB))
BC.outs() << "BOLT-WARNING: [internal-dwarf-error]: unsupported DW_OP "
"encoding.\n";

if ((Description.Op.size() == 1 &&
Description.Op[0] == Encoding::BaseTypeRef) ||
(Description.Op.size() == 2 &&
Description.Op[1] == Encoding::BaseTypeRef &&
Description.Op[0] == Encoding::Size1)) {
// This code assumes that the other non-typeref operand fits into 1
// byte.
(Description.Op[0] == Encoding::Size1 ||
Description.Op[0] == Encoding::SizeLEB))) {
assert(OpOffset < Op.getEndOffset());
const uint32_t ULEBsize = Op.getEndOffset() - OpOffset - 1;
(void)ULEBsize;
Expand All @@ -727,7 +727,9 @@ bool DIEBuilder::cloneExpression(const DataExtractor &Data,
if (Description.Op.size() == 1) {
RefOffset = Op.getRawOperand(0);
} else {
OutputBuffer.push_back(Op.getRawOperand(0));
const StringRef FirstOpBytes =
Data.getData().slice(OpOffset + 1, Op.getOperandEndOffset(0));
OutputBuffer.append(FirstOpBytes.begin(), FirstOpBytes.end());
RefOffset = Op.getRawOperand(1);
}
uint32_t Offset = 0;
Expand Down Expand Up @@ -903,6 +905,7 @@ void DIEBuilder::cloneAttribute(
case dwarf::DW_FORM_ref2:
case dwarf::DW_FORM_ref4:
case dwarf::DW_FORM_ref8:
case dwarf::DW_FORM_ref_udata:
cloneDieOffsetReferenceAttribute(Die, U, InputDIE, AttrSpec,
Val.getUnit()->getOffset() +
*Val.getAsRelativeReference());
Expand Down
71 changes: 14 additions & 57 deletions bolt/lib/Profile/DataAggregator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -717,10 +717,8 @@ Error DataAggregator::preprocessProfile(BinaryContext &BC) {
Error DataAggregator::readProfile(BinaryContext &BC) {
processProfile(BC);

for (auto &BFI : BC.getBinaryFunctions()) {
BinaryFunction &Function = BFI.second;
convertBranchData(Function);
}
if (Error E = DataReader::readProfile(BC))
return E;

if (opts::AggregateOnly) {
if (opts::ProfileFormat == opts::ProfileFormatKind::PF_Fdata)
Expand All @@ -747,6 +745,12 @@ bool DataAggregator::mayHaveProfileData(const BinaryFunction &Function) {
}

void DataAggregator::processProfile(BinaryContext &BC) {
// Set for DataReader::readProfile
NoLBRMode = opts::BasicAggregation;

// Set for DataReader::recordBranch and evaluateProfileData
BATMode = usesBAT();

if (opts::BasicAggregation)
processBasicEvents();
else
Expand All @@ -772,6 +776,9 @@ void DataAggregator::processProfile(BinaryContext &BC) {
llvm::stable_sort(FuncBranches.second.EntryData);
}

for (auto &FuncBasicSamples : NamesToBasicSamples)
llvm::stable_sort(FuncBasicSamples.second.Data);

for (auto &MemEvents : NamesToMemEvents)
llvm::stable_sort(MemEvents.second.Data);

Expand Down Expand Up @@ -880,8 +887,6 @@ bool DataAggregator::doInterBranch(BinaryFunction *FromFunc,
FromAggrData->Name = SrcFunc;
setBranchData(*FromFunc, FromAggrData);
}

recordExit(*FromFunc, From, Mispreds, Count);
}
if (ToFunc) {
DstFunc = getLocationName(*ToFunc, BAT);
Expand All @@ -891,8 +896,6 @@ bool DataAggregator::doInterBranch(BinaryFunction *FromFunc,
ToAggrData->Name = DstFunc;
setBranchData(*ToFunc, ToAggrData);
}

recordEntry(*ToFunc, To, Mispreds, Count);
}

if (FromAggrData)
Expand Down Expand Up @@ -941,10 +944,8 @@ bool DataAggregator::doBranch(uint64_t From, uint64_t To, uint64_t Count,
return false;

// Treat recursive control transfers as inter-branches.
if (FromFunc == ToFunc && To != 0) {
recordBranch(*FromFunc, From, To, Count, Mispreds);
if (FromFunc == ToFunc && To != 0)
return doIntraBranch(*FromFunc, From, To, Count, Mispreds);
}

return doInterBranch(FromFunc, ToFunc, From, To, Count, Mispreds);
}
Expand Down Expand Up @@ -976,7 +977,7 @@ bool DataAggregator::doTrace(const Trace &Trace, uint64_t Count,
std::optional<BoltAddressTranslation::FallthroughListTy> FTs =
BAT && BAT->isBATFunction(FuncAddress)
? BAT->getFallthroughsInTrace(FuncAddress, From - IsReturn, To)
: getFallthroughsInTrace(*FromFunc, Trace, Count, IsReturn);
: getFallthroughsInTrace(*FromFunc, Trace, IsReturn);
if (!FTs) {
LLVM_DEBUG(dbgs() << "Invalid trace " << Trace << '\n');
NumInvalidTraces += Count;
Expand All @@ -993,7 +994,7 @@ bool DataAggregator::doTrace(const Trace &Trace, uint64_t Count,

std::optional<SmallVector<std::pair<uint64_t, uint64_t>, 16>>
DataAggregator::getFallthroughsInTrace(BinaryFunction &BF, const Trace &Trace,
uint64_t Count, bool IsReturn) const {
bool IsReturn) const {
SmallVector<std::pair<uint64_t, uint64_t>, 16> Branches;

BinaryContext &BC = BF.getBinaryContext();
Expand Down Expand Up @@ -1073,53 +1074,9 @@ DataAggregator::getFallthroughsInTrace(BinaryFunction &BF, const Trace &Trace,
BB = NextBB;
}

// Record fall-through jumps
for (const auto &[FromOffset, ToOffset] : Branches) {
BinaryBasicBlock *FromBB = BF.getBasicBlockContainingOffset(FromOffset);
BinaryBasicBlock *ToBB = BF.getBasicBlockAtOffset(ToOffset);
assert(FromBB && ToBB);
BinaryBasicBlock::BinaryBranchInfo &BI = FromBB->getBranchInfo(*ToBB);
BI.Count += Count;
}

return Branches;
}

bool DataAggregator::recordEntry(BinaryFunction &BF, uint64_t To, bool Mispred,
uint64_t Count) const {
if (To > BF.getSize())
return false;

if (!BF.hasProfile())
BF.ExecutionCount = 0;

BinaryBasicBlock *EntryBB = nullptr;
if (To == 0) {
BF.ExecutionCount += Count;
if (!BF.empty())
EntryBB = &BF.front();
} else if (BinaryBasicBlock *BB = BF.getBasicBlockAtOffset(To)) {
if (BB->isEntryPoint())
EntryBB = BB;
}

if (EntryBB)
EntryBB->setExecutionCount(EntryBB->getKnownExecutionCount() + Count);

return true;
}

bool DataAggregator::recordExit(BinaryFunction &BF, uint64_t From, bool Mispred,
uint64_t Count) const {
if (!BF.isSimple() || From > BF.getSize())
return false;

if (!BF.hasProfile())
BF.ExecutionCount = 0;

return true;
}

ErrorOr<DataAggregator::LBREntry> DataAggregator::parseLBREntry() {
LBREntry Res;
ErrorOr<StringRef> FromStrRes = parseString('/');
Expand Down
70 changes: 70 additions & 0 deletions bolt/test/X86/dwarf5-form-ref-udata.s
Original file line number Diff line number Diff line change
@@ -0,0 +1,70 @@
# REQUIRES: system-linux

# RUN: llvm-mc -dwarf-version=5 -filetype=obj -triple x86_64-unknown-linux %s -o %t.o
# RUN: %clang %cflags -dwarf-5 %t.o -o %t.exe -Wl,-q
# RUN: llvm-bolt %t.exe -o %t.bolt --update-debug-sections 2>&1 | \
# RUN: FileCheck %s --check-prefix CHECK-BOLT
# RUN: llvm-dwarfdump --show-form --verbose --debug-info %t.bolt | FileCheck %s

## Verify BOLT preserves DW_FORM_ref_udata (CU-relative ULEB128 DIE reference),
## a form GCC may emit instead of DW_FORM_ref4.

# CHECK: DW_TAG_subprogram
# CHECK: DW_AT_type [DW_FORM_ref_udata]
# CHECK-SAME: "int"

# CHECK-BOLT-NOT: BOLT-WARNING

.text
.file 0 "." "main.cpp"
.globl main
main:
.Lfunc_begin0:
.loc 0 1 0
xorl %eax, %eax
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main

## Force relocations against .text
.reloc 0, R_X86_64_NONE

.section .debug_abbrev,"",@progbits
.byte 1, 17, 1 # CU, has children
.byte 17, 1 # DW_AT_low_pc, DW_FORM_addr
.byte 18, 6 # DW_AT_high_pc, DW_FORM_data4
.byte 16, 23 # DW_AT_stmt_list, DW_FORM_sec_offset
.byte 0, 0
.byte 2, 46, 0 # subprogram, no children
.byte 17, 1 # DW_AT_low_pc, DW_FORM_addr
.byte 18, 6 # DW_AT_high_pc, DW_FORM_data4
.byte 73, 21 # DW_AT_type, DW_FORM_ref_udata
.byte 0, 0
.byte 3, 36, 0 # base_type, no children
.byte 3, 8 # DW_AT_name, DW_FORM_string
.byte 0, 0
.byte 0

.section .debug_info,"",@progbits
.Lcu_begin0:
.long .Ldebug_info_end0-.Ldebug_info_start0
.Ldebug_info_start0:
.short 5 # DWARF version
.byte 1 # DW_UT_compile
.byte 8 # Address size
.long .debug_abbrev # Abbrev offset
.byte 1 # CU
.quad .Lfunc_begin0 # DW_AT_low_pc
.long .Lfunc_end0-.Lfunc_begin0 # DW_AT_high_pc
.long .Lline_table_start0 # DW_AT_stmt_list
.byte 2 # subprogram
.quad .Lfunc_begin0 # DW_AT_low_pc
.long .Lfunc_end0-.Lfunc_begin0 # DW_AT_high_pc
.uleb128 .Ltype_int-.Lcu_begin0 # DW_AT_type (DW_FORM_ref_udata)
.Ltype_int:
.byte 3 # base_type
.asciz "int" # DW_AT_name
.byte 0 # End children of CU
.Ldebug_info_end0:
.section .debug_line,"",@progbits
.Lline_table_start0:
83 changes: 83 additions & 0 deletions bolt/test/X86/dwarf5-locexpr-regval-type.s
Original file line number Diff line number Diff line change
@@ -0,0 +1,83 @@
# REQUIRES: system-linux

# RUN: llvm-mc -dwarf-version=5 -filetype=obj -triple x86_64-unknown-linux %s -o %t.o
# RUN: %clang %cflags -dwarf-5 %t.o -o %t.exe -Wl,-q
# RUN: llvm-bolt %t.exe -o %t.bolt --update-debug-sections 2>&1 | \
# RUN: FileCheck %s --check-prefix CHECK-BOLT
# RUN: llvm-dwarfdump --show-form --verbose --debug-info %t.bolt | FileCheck %s

## Verify BOLT correctly handles DW_OP_regval_type. Its operands are
## (ULEB128 register, ULEB128 base type DIE offset). The base type
## reference must be updated when DIEs are relocated. Use a register
## number that requires multi-byte ULEB128 encoding to exercise the
## first-operand byte-copy path.

# CHECK: DW_TAG_variable
# CHECK: DW_AT_location [DW_FORM_exprloc]
# CHECK-SAME: DW_OP_regval_type 0xc8 (0x[[#%.8x,TYPE:]] ->
# CHECK: 0x[[#TYPE]]: DW_TAG_base_type

# CHECK-BOLT-NOT: BOLT-WARNING

.text
.file 0 "." "main.cpp"
.globl main
main:
.Lfunc_begin0:
.loc 0 1 0
xorl %eax, %eax
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main

## Force relocations against .text
.reloc 0, R_X86_64_NONE

.section .debug_abbrev,"",@progbits
.byte 1, 17, 1 # CU, has children
.byte 17, 1 # DW_AT_low_pc, DW_FORM_addr
.byte 18, 6 # DW_AT_high_pc, DW_FORM_data4
.byte 16, 23 # DW_AT_stmt_list, DW_FORM_sec_offset
.byte 0, 0
.byte 2, 46, 1 # subprogram, has children
.byte 17, 1 # DW_AT_low_pc, DW_FORM_addr
.byte 18, 6 # DW_AT_high_pc, DW_FORM_data4
.byte 0, 0
.byte 3, 52, 0 # variable, no children
.byte 2, 24 # DW_AT_location, DW_FORM_exprloc
.byte 0, 0
.byte 4, 36, 0 # base_type, no children
.byte 3, 8 # DW_AT_name, DW_FORM_string
.byte 0, 0
.byte 0

.section .debug_info,"",@progbits
.Lcu_begin0:
.long .Ldebug_info_end0-.Ldebug_info_start0
.Ldebug_info_start0:
.short 5 # DWARF version
.byte 1 # DW_UT_compile
.byte 8 # Address size
.long .debug_abbrev # Abbrev offset
.byte 1 # CU
.quad .Lfunc_begin0 # DW_AT_low_pc
.long .Lfunc_end0-.Lfunc_begin0 # DW_AT_high_pc
.long .Lline_table_start0 # DW_AT_stmt_list
.byte 2 # subprogram
.quad .Lfunc_begin0 # DW_AT_low_pc
.long .Lfunc_end0-.Lfunc_begin0 # DW_AT_high_pc
.byte 3 # variable
.byte .Lloc_end-.Lloc_start # exprloc length
.Lloc_start:
.byte 0xa5 # DW_OP_regval_type
.uleb128 200 # register 200 (multi-byte ULEB128)
.uleb128 .Ltype_int-.Lcu_begin0 # base type DIE offset
.Lloc_end:
.byte 0 # End children of subprogram
.Ltype_int:
.byte 4 # base_type
.asciz "int" # DW_AT_name
.byte 0 # End children of CU
.Ldebug_info_end0:
.section .debug_line,"",@progbits
.Lline_table_start0:
1 change: 1 addition & 0 deletions clang-tools-extra/clang-tidy/doc8.ini
Original file line number Diff line number Diff line change
@@ -1,2 +1,3 @@
[doc8]
ignore-path = clang-tools-extra/docs/clang-tidy/Integrations.rst
ignore = D001
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