[AMDGPU] Support queue-ordered memory-file transfers - #368
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Handle HAL memory-file I/O through queue pending state. This covers imported host memory that requires a native copy. Signal semaphores publish only after the transfer completes. Retain files, buffers, and copy state through prerequisite waits, cancellation, and queue pressure. Regular files continue through the existing proactor and mapped-buffer path.
Reject overflow while combining HAL subspan and operation offsets before a stream-ordered native host-memory transfer forms source and target pointers.
AWoloszyn
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August 13, 2026 15:02
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Summary
Add an AMDGPU-local transfer path for HAL memory files, which represent imported host allocations.
The existing file-transfer path could route these operations through an ordinary device blit. That blit may use a
device kernel, but imported host allocations are not guaranteed to be accessible from such kernels. This made queue-
ordered transfers involving host-visible memory unreliable.
Implementation
Detect HAL memory files in AMDGPU queue read and write operations.
Execute the transfer with hsa_memory_copy after the queue wait dependencies retire.
Publish signal semaphores through a post-drain barrier so completion remains correctly ordered without recursively
submitting work from the completion thread.
Preserve the existing asynchronous file path for non-memory files.
Validate buffer ranges, transfer usage, memory access, host addressability, and offset arithmetic.
Resolve allocated-buffer and subspan offsets before constructing native pointers.
This supports queue-ordered transfers used by HIP host allocation and registration APIs without introducing a wider
HAL interface change.
Testing
Added an AMDGPU-local integration test using a real logical device. It covers: