[Test] Expand RMSNorm backward configs, cache reuse, and Torch benchmarks#854
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coderfeli
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Jul 16, 2026
This was referenced Jul 22, 2026
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Summary
Follow-up to #800's final review and the post-merge note:
N > 2048generic-path coverage to fused-add backward and autograd;_run_compiledlauncher cache in the direct backward tests, including an assertion that the second fused residual-gradient case reuses the compiled callable;This deliberately does not add kernel tuning knobs or another production cache. Production already has device-aware caches, and structural RMSNorm autotuning remains in #785.
Benchmark contract
Run with:
Optional shapes use
ROCDSL_RMSNORM_BWD_BENCH_SHAPES="M,N,dtype;...". This is intentionally separate from the existing forward benchmark override.The comparison is public-autograd backward vs public-autograd backward. Forward graph construction and FlyDSL compilation happen before timing; backward allocations, the mandatory fp32
dweightzero, and the fp32-to-parameter-dtype cast are included. Each shape compares gradients before recording events. Timings below are hot-cache GPU-event averages with 10 warmups and 100 iterations on one AMD Instinct MI355X, PyTorch2.9.1+rocm7.2.0.git7e1940d4.Torch/FlyDSL < 1means FlyDSL is slower.These data establish a reproducible baseline and show that the current public backward paths still have optimization headroom; they do not by themselves isolate the bottleneck.
Validation
black --check tests/kernels/test_rmsnorm.pyruff check tests/kernels/test_rmsnorm.pypython3 -m py_compile tests/kernels/test_rmsnorm.pyROCDSL_RMSNORM_SHAPESoverride does not alter backward/autograd configsRelated review threads: compiled launcher reuse, more config coverage.