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b884c00
vc/amd/opensil/phoenix_poc/mpio/chip.c: Set parameters for GFX
miczyg1 Apr 30, 2026
404d68c
payloads/external/edk2: Add support for AMD GOP integration
miczyg1 Apr 14, 2026
5300487
vc/amd/opensil/phoenix_poc/opensil: Bump for GFX init
miczyg1 Apr 30, 2026
e7be23b
vc/amd/opensil/phoenix_poc/mpio: Add support for specifying DDI ports
miczyg1 May 4, 2026
51e3a3b
mb/msi/ms7e56: Initialize integrated display
miczyg1 May 4, 2026
6e9917d
configs/config.msi_ms7e56: Update configs to init GFX
miczyg1 May 4, 2026
003ca78
util/amdfwtool: Integrate Promontory firmware
miczyg1 May 8, 2026
dbe16c1
soc/amd: Allocate 256KiB in early reserved DRAM for Promontory FW
miczyg1 May 8, 2026
155baa7
soc/amd/common/block/psp_efs: Add API to load Promontory FW from EFS
miczyg1 May 8, 2026
d954783
vc/amd/opensil/phoenix_poc: Add Promontory initialization
miczyg1 May 8, 2026
f7df7a4
util/amdtool: Add Promontory configuration dumping
miczyg1 May 8, 2026
c55adb7
util/cbmem: Fix missing size parameter in TCG log dumps
miczyg1 May 8, 2026
7ea840e
util/amdtool: Add Promontory PCIe configuration dumping
miczyg1 May 8, 2026
ed1244e
vc/amd/opensil/phoenix_poc,drivers/amd: Add PROM21 driver
miczyg1 May 18, 2026
fe9912c
drivers/amd/promontory21: Add device_operations for PROM21 devices
miczyg1 May 19, 2026
f5691ec
mainboard/msi/ms7e56: Add initial Promontory configuration
miczyg1 May 18, 2026
dd1871f
mainboard/msi/ms7e56/devicetree.cb: Assign ops and SSID
miczyg1 May 19, 2026
aaf4c40
mainboard/msi/ms7e56: Add HDA verbs for external codec and iGPU
miczyg1 May 19, 2026
07bc8ea
mainboard/msi/ms7e56/devicetree.cb: Add B850 chipset USB descriptors
miczyg1 May 19, 2026
ae19892
mainboard/msi/ms7e56/devicetree.cb: Add PCIe slot descriptors
miczyg1 May 19, 2026
7bb685d
mainboard/msi/ms7e56/devicetree.cb: Add SMBIOS type 41 entries
miczyg1 May 19, 2026
5155db5
soc/amd/phoenix/root_complex.c: Write ACPI _PRT for host bridge
miczyg1 May 19, 2026
98f5d99
vendorcode/amd/opensil/phoenix_poc: Assign PCI SSID
miczyg1 May 19, 2026
32aa309
vc/amd/opensil/phoenix_poc/opensil: Bump for fixed GNB IOAPIC address
miczyg1 May 19, 2026
bf7eb9c
vc/amd/opensil/phoenix_poc: Set predefined IOAPIC IDs
miczyg1 May 19, 2026
81591d3
soc/amd/phoenix/acpi.c: Fix printing PSP message status
miczyg1 May 19, 2026
d380efe
mainboard/msi/ms7e56: Enabel IOAPIC 8bit IDs and IPU
miczyg1 May 19, 2026
5dc3fbb
include/device/device.h: Add helper to get 32bit SSID from device struct
miczyg1 May 19, 2026
c9fad59
mainboard/msi/ms7e56/devicetree.cb: Fix ACPI errors
miczyg1 May 19, 2026
4cb67d1
util/amdtool/gpio.c: Print GPIO number when dumping
miczyg1 May 19, 2026
435193b
soc/amd/phoenix/fch.c: Set FORCE_STPCLK_RETRY
miczyg1 May 19, 2026
28b1883
soc/amd/common/block/lpc/espi_util.c: Set IRQ mask via devicetree
miczyg1 May 19, 2026
d91bedf
vc/amd/opensil/phoenix_poc: Update settings based on SoC config
miczyg1 May 19, 2026
bbc192e
util/amdtool/gpio.c: Add missing PHX GPIO27
miczyg1 May 19, 2026
28ce36f
vc/amd/opensil/phoenix_poc/ramstage.c: Enable XTAL pad power saving
miczyg1 May 19, 2026
760bdc6
mainboard/msi/ms7e56: Update GPIO configuration
miczyg1 May 19, 2026
bcc79ab
mainboard/msi/ms7e56: Udpate settings to match vendor BIOS
miczyg1 May 19, 2026
0b2a3b2
mainboard/msi/ms7e56: Add ACPI code for SIO and MSI utilities installer
miczyg1 May 20, 2026
2f148a4
util/msi/romholetool: Add support for MS-7E56 board
miczyg1 May 20, 2026
2f0f936
mainboard/msi/ms7e56: Add MSI FlashBIOS support
miczyg1 May 20, 2026
1426f95
soc/amd/phoenix/Kconfig: Enable AMD memory context save/restore
miczyg1 May 20, 2026
e849288
util/amdtool/espi.c: Add more eSPI registers to dump
miczyg1 May 25, 2026
6a1d4a5
util/amdtool/lpc.c: Read LPC CFG space with SMN
miczyg1 Jun 1, 2026
d418615
util/superiotool/nuvoton.c: Dump IRQ registers
miczyg1 Jun 1, 2026
5719271
acpi/acpigen_pci_root_resource_producer.c: Include VGA memory in VGA …
miczyg1 Jun 2, 2026
ac59f8b
soc/amd/phoenix/chipset_opensil.cb: use PCIe bridge scan for internal…
miczyg1 Jun 2, 2026
c1d611a
soc/amd/phoenix/acpi: Add IOAPIC interrupt routing function
miczyg1 Jun 2, 2026
eb8b3cf
mainboard/msi/ms7e56: Add eSPI initialization
miczyg1 Jun 2, 2026
2030222
mainboard/msi/ms7e56: Remove obsolete remove_devicetree
miczyg1 Jun 2, 2026
5979fdb
vc/amd/opensil/phoenix_poc/mpio: Fill NBIO params for IOMMU and APIC
miczyg1 Jun 2, 2026
fd8ffc1
vc/amd/opensil/phoenix_poc/ramstage.c: Limit MMIO to 1TB
miczyg1 Jun 2, 2026
209dc78
soc/amd/phoenix: Add CPPC support with openSIL
miczyg1 Jun 2, 2026
a76d787
mainbaord/msi/ms7e56: Add Promontory21 GPIO ACPI
miczyg1 Jun 2, 2026
a34f7e7
soc/amd/phoenix/include/soc/amd_pci_int_defs.h: Add missing IRQs
miczyg1 Jun 2, 2026
6ebf308
mainboard/msi/ms7e56/mainboard.c: Update interrupt routing
miczyg1 Jun 2, 2026
7bfdff3
mb/msi/ms7e56: Describe ACPI devices and ACPI events
miczyg1 Jun 2, 2026
457dc9b
soc/amd/phoenix/chipset_opensil.cb: Assign HDA ops for iGFX audio
miczyg1 Jun 2, 2026
26621d1
amdblocks/graphics: Do not create the _ROM method when using openSIL
miczyg1 Jun 2, 2026
d5c2648
acpi/acpi.c: don't publish stub VFCT when VBIOS is not embedded
mkopec May 2, 2026
4156c24
vc/amd/opensil/phoenix_poc/mpio/chip.c: Enable GFX HDA based on devic…
miczyg1 Jun 3, 2026
68341e2
configs/config.msi_ms7e56: Update config and enable capsule updates
miczyg1 Jun 3, 2026
f6ed696
mb/msi/ms7e56/devicetree.cb: Set proper polarity for SIO UART IRQ4
miczyg1 Jun 3, 2026
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32 changes: 20 additions & 12 deletions configs/config.msi_ms7e56
Original file line number Diff line number Diff line change
@@ -1,30 +1,37 @@
CONFIG_LOCALVERSION="v0.9.0-rc1"
CONFIG_OPTION_BACKEND_NONE=y
CONFIG_VENDOR_MSI=y
CONFIG_MAINBOARD_VERSION="1.0"
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
CONFIG_VGA_BIOS=y
CONFIG_PCIEXP_ASPM=y
CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_PCIEXP_CLK_PM=y
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x2000000
CONFIG_EDK2_BOOT_TIMEOUT=3
CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=39
CONFIG_VGA_BIOS_FILE="Phoenix_generic_vbios.bin"
CONFIG_EDK2_BOOT_MANAGER_ESCAPE=y
CONFIG_EDK2_FOLLOW_BGRT_SPEC=y
CONFIG_BOARD_MSI_PRO_B850_P=y
CONFIG_TPM_MEASURED_BOOT=y
CONFIG_EDK2_BOOTSPLASH_FILE="3rdparty/dasharo-blobs/dasharo/bootsplash.bmp"
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION=y
CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE=y
# CONFIG_ON_DEVICE_ROM_LOAD is not set
CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES=y
CONFIG_YABEL_DIRECTHW=y
CONFIG_NO_GFX_INIT=y
CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
CONFIG_DRIVERS_EFI_VARIABLE_STORE=y
CONFIG_DRIVERS_EFI_FW_INFO=y
CONFIG_DRIVERS_EFI_MAIN_FW_VERSION=0x00090001
CONFIG_DRIVERS_EFI_MAIN_FW_LSV=0x00090001
CONFIG_DRIVERS_EFI_UPDATE_CAPSULES=y
CONFIG_TPM2=y
# CONFIG_TPM_HASH_SHA1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_PAYLOAD_EDK2=y
CONFIG_EDK2_TAG_OR_REV="origin/cbmem_pci_rb_info"
CONFIG_EDK2_DEBUG=y
CONFIG_EDK2_TAG_OR_REV="origin/dasharo"
CONFIG_EDK2_CBMEM_LOGGING=y
CONFIG_EDK2_LOAD_OPTION_ROMS=y
# CONFIG_EDK2_PS2_SUPPORT is not set
CONFIG_EDK2_CUSTOM_BUILD_PARAMS="--pcd gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask=0x07"
CONFIG_EDK2_SERIAL_SUPPORT=y
CONFIG_EDK2_ENABLE_IPXE=y
CONFIG_IPXE_ADD_SCRIPT=y
CONFIG_IPXE_SCRIPT="3rdparty/dasharo-blobs/dasharo/dasharo.ipxe"
Expand All @@ -42,17 +49,18 @@ CONFIG_EDK2_DASHARO_NETWORK_CONFIG=y
CONFIG_EDK2_DASHARO_CHIPSET_CONFIG=y
CONFIG_EDK2_DASHARO_POWER_CONFIG=y
CONFIG_EDK2_DASHARO_PCI_CONFIG=y
CONFIG_EDK2_DASHARO_NETWORK_BOOT_DEFAULT_ENABLE=y
CONFIG_EDK2_DASHARO_SERIAL_REDIRECTION_DEFAULT_ENABLE=y
CONFIG_EDK2_BOOT_MENU_KEY=0x0015
CONFIG_EDK2_SETUP_MENU_KEY=0x0008
CONFIG_EDK2_CREATE_PREINSTALLED_BOOT_OPTIONS=y
CONFIG_EDK2_USE_UEFIVAR_BACKED_TPM_PPI=y
CONFIG_EDK2_ENABLE_FAST_BOOT_FEATURE=y
CONFIG_EDK2_ENABLE_QUIET_BOOT_FEATURE=y
# CONFIG_EDK2_GRAPHICAL_CAPSULE_PROGRESS is not set
# CONFIG_EDK2_FUM_AUTO_IPXE_BOOT is not set
CONFIG_EDK2_CAPSULE_DOES_NOT_SURVIVE_RESET=y
CONFIG_EDK2_SHOW_CAPSULE_REPORT=y
CONFIG_DISPLAY_MTRRS=y
CONFIG_OPENSIL_DEBUG_PREFIX=y
CONFIG_OPENSIL_DEBUG_APOB=y
# CONFIG_OPENSIL_DEBUG_FCH is not set
# CONFIG_OPENSIL_DEBUG_XUSL_CMN is not set
7 changes: 5 additions & 2 deletions payloads/external/Makefile.mk
Original file line number Diff line number Diff line change
Expand Up @@ -305,8 +305,11 @@ $(obj)/UEFIPAYLOAD.fd: $(DOTCONFIG) $(IPXE_EFI)
CONFIG_EDK2_FW_VERSION=L"$(CONFIG_LOCALVERSION)" \
CONFIG_EDK2_FW_VENDOR=L"$(CONFIG_BIOS_VENDOR)" \
CONFIG_EDK2_FW_RELEASE_DATE=L"$(call get_build_value,COREBOOT_DMI_DATE)" \
CONFIG_EDK2_FW_REVISION=$(shell printf 0x"%04x%04x" $(DASHARO_MAJOR_VERSION) $(DASHARO_MINOR_VERSION))

CONFIG_EDK2_FW_REVISION=$(shell printf 0x"%04x%04x" $(DASHARO_MAJOR_VERSION) $(DASHARO_MINOR_VERSION)) \
CONFIG_EDK2_AMD_GOP_DRIVER=$(CONFIG_EDK2_AMD_GOP_DRIVER) \
CONFIG_EDK2_VGA_BIOS_VENDOR_ID=0x$(word 1,$(subst $(comma),$(spc),$(call strip_quotes,$(CONFIG_VGA_BIOS_ID)))) \
CONFIG_EDK2_VGA_BIOS_DEVICE_ID=0x$(word 2,$(subst $(comma),$(spc),$(call strip_quotes,$(CONFIG_VGA_BIOS_ID)))) \
CONFIG_VGA_BIOS_FILE=$(CONFIG_VGA_BIOS_FILE)

$(obj)/ShimmedUniversalPayload.elf: $(DOTCONFIG)
$(MAKE) -C payloads/external/edk2 UniversalPayload \
Expand Down
10 changes: 9 additions & 1 deletion payloads/external/edk2/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -291,9 +291,17 @@ config EDK2_GOP_DRIVER
help
Select this option to have edk2 use an external GOP driver for display init.

config EDK2_AMD_GOP_DRIVER
bool "Add an AMD GOP driver to the Tianocore build"
depends on VGA_BIOS && NO_GFX_INIT && !EDK2_REPO_OFFICIAL && !EDK2_DISABLE_OPTION_ROMS
default y if VGA_BIOS && NO_GFX_INIT && EDK2_REPO_MRCHROMEBOX
help
Select this option to have edk2 use an external GOP driver for AMD display init.

config EDK2_GOP_FILE
string "GOP driver file"
depends on EDK2_GOP_DRIVER
depends on EDK2_GOP_DRIVER || EDK2_AMD_GOP_DRIVER
default "AmdGopDriver.efi" if EDK2_AMD_GOP_DRIVER
default "IntelGopDriver.efi"
help
The name of the GOP driver file passed to edk2.
Expand Down
11 changes: 11 additions & 0 deletions payloads/external/edk2/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -462,6 +462,12 @@ endif
ifneq ($(CONFIG_EDK2_FUM_AUTO_IPXE_BOOT),y)
BUILD_STR += --pcd gDasharoSystemFeaturesTokenSpaceGuid.PcdFumAutoIpxeBoot=FALSE
endif
# USE_AMD_PLATFORM_GOP = FALSE
ifeq ($(CONFIG_EDK2_AMD_GOP_DRIVER),y)
BUILD_STR += -D USE_AMD_PLATFORM_GOP=TRUE
BUILD_STR += --pcd gDasharoPayloadPkgTokenSpaceGuid.AmdVbiosOptionRomVendorId=$(CONFIG_EDK2_VGA_BIOS_VENDOR_ID)
BUILD_STR += --pcd gDasharoPayloadPkgTokenSpaceGuid.AmdVbiosOptionRomDeviceId=$(CONFIG_EDK2_VGA_BIOS_DEVICE_ID)
endif

BUILD_STR += --pcd gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString=$(CONFIG_EDK2_FW_VERSION)
BUILD_STR += --pcd gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor=$(CONFIG_EDK2_FW_VENDOR)
Expand Down Expand Up @@ -560,6 +566,11 @@ gop_driver: $(EDK2_PATH)
cp $(top)/$(CONFIG_EDK2_GOP_FILE) $(EDK2_PATH)/$(PAYLOAD_NAME)/IntelGopDriver.efi; \
cp $(top)/$(CONFIG_INTEL_GMA_VBT_FILE) $(EDK2_PATH)/$(PAYLOAD_NAME)/vbt.bin; \
fi; \
if [ -n "$(CONFIG_EDK2_AMD_GOP_DRIVER)" ]; then \
echo "Using GOP driver $(CONFIG_EDK2_GOP_FILE)"; \
cp $(top)/$(CONFIG_EDK2_GOP_FILE) $(EDK2_PATH)/$(PAYLOAD_NAME)/AmdGopDriver.efi; \
cp $(top)/$(CONFIG_VGA_BIOS_FILE) $(EDK2_PATH)/$(PAYLOAD_NAME)/Vbios.bin; \
fi; \

lan_rom: $(EDK2_PATH)
case "$(CONFIG_EDK2_LAN_ROM_DRIVER)" in \
Expand Down
4 changes: 3 additions & 1 deletion src/acpi/acpi.c
Original file line number Diff line number Diff line change
Expand Up @@ -704,8 +704,10 @@ void acpi_create_vfct(const struct device *device,
current = acpi_fill_vfct_func(device, vfct, current);

/* If no BIOS image, return with header->length == 0. */
if (!vfct->VBIOSImageOffset)
if (!vfct->VBIOSImageOffset) {
header->length = 0;
return;
}

/* (Re)calculate length and checksum. */
header->length = current - (unsigned long)vfct;
Expand Down
3 changes: 2 additions & 1 deletion src/acpi/acpigen_pci_root_resource_producer.c
Original file line number Diff line number Diff line change
Expand Up @@ -122,7 +122,8 @@ void pci_domain_fill_ssdt(const struct device *domain)
if (domain->downstream->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
printk(BIOS_DEBUG, "%s _CRS: adding VGA resource\n", acpi_device_name(domain));
acpigen_resource_producer_io(VGA_IO_BASE, VGA_IO_LIMIT);
acpigen_resource_producer_mmio(VGA_MMIO_BASE, VGA_MMIO_LIMIT,
/* Report VGA MMIO + extra 128K for VGA OptionROM in legacy C segment */
acpigen_resource_producer_mmio(VGA_MMIO_BASE, VGA_MMIO_LIMIT + 0x20000,
MEM_RSRC_FLAG_MEM_READ_WRITE | MEM_RSRC_FLAG_MEM_ATTR_CACHE);
}

Expand Down
6 changes: 6 additions & 0 deletions src/drivers/amd/promontory21/Kconfig
Original file line number Diff line number Diff line change
@@ -0,0 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-only

config DRIVERS_AMD_PROMONTORY21
bool
help
Enable AMD Promontory21 chip driver.
3 changes: 3 additions & 0 deletions src/drivers/amd/promontory21/Makefile.mk
Original file line number Diff line number Diff line change
@@ -0,0 +1,3 @@
## SPDX-License-Identifier: GPL-2.0-only

ramstage-$(CONFIG_DRIVERS_AMD_PROMONTORY21) += chip.c
198 changes: 198 additions & 0 deletions src/drivers/amd/promontory21/acpi/prom21_gpio.asl
Original file line number Diff line number Diff line change
@@ -0,0 +1,198 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */

Scope (\_SB)
{
Name (TGPI, 0x0F)
Device (PTIO)
{
Name (_HID, "AMDIF031")
Name (_CID, "AMDIF031")
Name (_UID, 0)
Method (_CRS, 0, NotSerialized)
{
Name (RBUF, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0xFEC40000,
0x00001000,
)
})
Return (RBUF)
}

Method (_STA, 0, NotSerialized)
{
Return (0x0F)
}
}

Device (ASMT)
{
Name (_HID, "ASMT0001")
Name (_CID, "ASMT0001")
Name (_UID, 0)
Method (_CRS, 0, NotSerialized)
{
Name (RBUF, ResourceTemplate ()
{
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0000
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0001
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0002
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0003
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0004
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0005
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0006
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0007
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0008
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0009
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x000A
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x000B
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x000C
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x000D
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x000E
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x000F
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0010
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0011
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0012
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0013
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0014
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0015
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0016
}
GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,
"\\_SB.PTIO", 0x00, ResourceConsumer, ,
RawDataBuffer (0x01) { 0x01 })
{
0x0017
}
})
Return (RBUF)
}

Method (_STA, 0, NotSerialized)
{
If ((TGPI == One))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
}
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