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Auto merge of #158676 - jhpratt:rollup-oGLvd9H, r=jhpratt
Rollup of 8 pull requests Successful merges: - #156737 (Implement `DoubleEndedIterator::next_chunk_back`) - #158180 (std: use `OnceLock` for SGX environment variable storage) - #158427 (Implement `ptr::{read,write}_unaligned` via `repr(packed)`) - #158531 (Change `adjust_ident_and_get_scope` arg to `LocalDefId`) - #158574 (Clarify ExitStatusExt documentation) - #158334 (rustdoc: Show use-site paths for unevaluated const array lengths) - #158364 (rustc_target/asm: add LoongArch LSX/LASX inline asm register support) - #158667 (rustc_sanitizers: use twox-hash without default features)
2 parents 4c9d2bf + a2f8a15 commit 2371d69

37 files changed

Lines changed: 1941 additions & 185 deletions

File tree

‎Cargo.lock‎

Lines changed: 2 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -3235,24 +3235,13 @@ dependencies = [
32353235
"ptr_meta",
32363236
]
32373237

3238-
[[package]]
3239-
name = "rand"
3240-
version = "0.8.5"
3241-
source = "registry+https://github.com/rust-lang/crates.io-index"
3242-
checksum = "34af8d1a0e25924bc5b7c43c079c942339d8f0a8b57c39049bef581b46327404"
3243-
dependencies = [
3244-
"libc",
3245-
"rand_chacha 0.3.1",
3246-
"rand_core 0.6.4",
3247-
]
3248-
32493238
[[package]]
32503239
name = "rand"
32513240
version = "0.9.2"
32523241
source = "registry+https://github.com/rust-lang/crates.io-index"
32533242
checksum = "6db2770f06117d490610c7488547d543617b21bfa07796d7a12f6f1bd53850d1"
32543243
dependencies = [
3255-
"rand_chacha 0.9.0",
3244+
"rand_chacha",
32563245
"rand_core 0.9.3",
32573246
]
32583247

@@ -3267,16 +3256,6 @@ dependencies = [
32673256
"rand_core 0.10.1",
32683257
]
32693258

3270-
[[package]]
3271-
name = "rand_chacha"
3272-
version = "0.3.1"
3273-
source = "registry+https://github.com/rust-lang/crates.io-index"
3274-
checksum = "e6c10a63a0fa32252be49d21e7709d4d4baf8d231c2dbce1eaa8141b9b127d88"
3275-
dependencies = [
3276-
"ppv-lite86",
3277-
"rand_core 0.6.4",
3278-
]
3279-
32803259
[[package]]
32813260
name = "rand_chacha"
32823261
version = "0.9.0"
@@ -3287,15 +3266,6 @@ dependencies = [
32873266
"rand_core 0.9.3",
32883267
]
32893268

3290-
[[package]]
3291-
name = "rand_core"
3292-
version = "0.6.4"
3293-
source = "registry+https://github.com/rust-lang/crates.io-index"
3294-
checksum = "ec0be4795e2f6a28069bec0b5ff3e2ac9bafc99e6a9a7dc3547996c5c816922c"
3295-
dependencies = [
3296-
"getrandom 0.2.16",
3297-
]
3298-
32993269
[[package]]
33003270
name = "rand_core"
33013271
version = "0.9.3"
@@ -5550,7 +5520,7 @@ dependencies = [
55505520
"indicatif",
55515521
"num",
55525522
"rand 0.9.2",
5553-
"rand_chacha 0.9.0",
5523+
"rand_chacha",
55545524
"rayon",
55555525
]
55565526

@@ -5924,7 +5894,6 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
59245894
checksum = "97fee6b57c6a41524a810daee9286c02d7752c4253064d0b05472833a438f675"
59255895
dependencies = [
59265896
"cfg-if",
5927-
"rand 0.8.5",
59285897
"static_assertions",
59295898
]
59305899

‎compiler/rustc_codegen_gcc/src/asm.rs‎

Lines changed: 25 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -706,7 +706,9 @@ fn reg_class_to_gcc(reg_class: InlineAsmRegClass) -> &'static str {
706706
unreachable!("clobber-only")
707707
}
708708
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::reg) => "r",
709-
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::freg) => "f",
709+
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::freg)
710+
| InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::vreg)
711+
| InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::xreg) => "f",
710712
InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => "r",
711713
InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => "a",
712714
InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => "d",
@@ -815,6 +817,12 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
815817
}
816818
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::reg) => cx.type_i32(),
817819
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::freg) => cx.type_f32(),
820+
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::vreg) => {
821+
cx.type_vector(cx.type_i32(), 4)
822+
}
823+
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::xreg) => {
824+
cx.type_vector(cx.type_i32(), 8)
825+
}
818826
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => cx.type_i32(),
819827
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => cx.type_f32(),
820828
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => cx.type_i16(),
@@ -1013,7 +1021,22 @@ fn modifier_to_gcc(
10131021
}
10141022
}
10151023
InlineAsmRegClass::Hexagon(_) => None,
1016-
InlineAsmRegClass::LoongArch(_) => None,
1024+
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::reg) => None,
1025+
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::freg) => modifier,
1026+
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::vreg) => {
1027+
if modifier.is_none() {
1028+
Some('w')
1029+
} else {
1030+
modifier
1031+
}
1032+
}
1033+
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::xreg) => {
1034+
if modifier.is_none() {
1035+
Some('u')
1036+
} else {
1037+
modifier
1038+
}
1039+
}
10171040
InlineAsmRegClass::Mips(_) => None,
10181041
InlineAsmRegClass::Nvptx(_) => None,
10191042
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::vsreg) => {

‎compiler/rustc_codegen_llvm/src/asm.rs‎

Lines changed: 21 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -709,7 +709,9 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'_>>) ->
709709
Hexagon(HexagonInlineAsmRegClass::vreg_pair) => "v",
710710
Hexagon(HexagonInlineAsmRegClass::qreg) => unreachable!("clobber-only"),
711711
LoongArch(LoongArchInlineAsmRegClass::reg) => "r",
712-
LoongArch(LoongArchInlineAsmRegClass::freg) => "f",
712+
LoongArch(LoongArchInlineAsmRegClass::freg)
713+
| LoongArch(LoongArchInlineAsmRegClass::vreg)
714+
| LoongArch(LoongArchInlineAsmRegClass::xreg) => "f",
713715
Mips(MipsInlineAsmRegClass::reg) => "r",
714716
Mips(MipsInlineAsmRegClass::freg) => "f",
715717
Nvptx(NvptxInlineAsmRegClass::reg16) => "h",
@@ -814,7 +816,22 @@ fn modifier_to_llvm(
814816
}
815817
Amdgpu(_) => None,
816818
Hexagon(_) => None,
817-
LoongArch(_) => None,
819+
LoongArch(LoongArchInlineAsmRegClass::reg) => None,
820+
LoongArch(LoongArchInlineAsmRegClass::freg) => modifier,
821+
LoongArch(LoongArchInlineAsmRegClass::vreg) => {
822+
if modifier.is_none() {
823+
Some('w')
824+
} else {
825+
modifier
826+
}
827+
}
828+
LoongArch(LoongArchInlineAsmRegClass::xreg) => {
829+
if modifier.is_none() {
830+
Some('u')
831+
} else {
832+
modifier
833+
}
834+
}
818835
Mips(_) => None,
819836
Nvptx(_) => None,
820837
PowerPC(PowerPCInlineAsmRegClass::vsreg) => {
@@ -917,6 +934,8 @@ fn dummy_output_type<'ll>(cx: &CodegenCx<'ll, '_>, reg: InlineAsmRegClass) -> &'
917934
Hexagon(HexagonInlineAsmRegClass::qreg) => unreachable!("clobber-only"),
918935
LoongArch(LoongArchInlineAsmRegClass::reg) => cx.type_i32(),
919936
LoongArch(LoongArchInlineAsmRegClass::freg) => cx.type_f32(),
937+
LoongArch(LoongArchInlineAsmRegClass::vreg) => cx.type_vector(cx.type_i32(), 4),
938+
LoongArch(LoongArchInlineAsmRegClass::xreg) => cx.type_vector(cx.type_i32(), 8),
920939
Mips(MipsInlineAsmRegClass::reg) => cx.type_i32(),
921940
Mips(MipsInlineAsmRegClass::freg) => cx.type_f32(),
922941
Nvptx(NvptxInlineAsmRegClass::reg16) => cx.type_i16(),

‎compiler/rustc_hir_analysis/src/hir_ty_lowering/mod.rs‎

Lines changed: 5 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1707,8 +1707,7 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ {
17071707
.inherent_impls(adt_did)
17081708
.iter()
17091709
.filter_map(|&impl_| {
1710-
let (item, scope) =
1711-
self.probe_assoc_item_unchecked(name, assoc_tag, block, impl_)?;
1710+
let (item, scope) = self.probe_assoc_item_unchecked(name, assoc_tag, impl_)?;
17121711
Some(InherentAssocCandidate { impl_, assoc_item: item.def_id, scope })
17131712
})
17141713
.collect();
@@ -1784,7 +1783,7 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ {
17841783
span: Span,
17851784
scope: DefId,
17861785
) -> Option<ty::AssocItem> {
1787-
let (item, scope) = self.probe_assoc_item_unchecked(ident, assoc_tag, block, scope)?;
1786+
let (item, scope) = self.probe_assoc_item_unchecked(ident, assoc_tag, scope)?;
17881787
self.check_assoc_item(item.def_id, ident, scope, block, span);
17891788
Some(item)
17901789
}
@@ -1797,12 +1796,11 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ {
17971796
&self,
17981797
ident: Ident,
17991798
assoc_tag: ty::AssocTag,
1800-
block: HirId,
18011799
scope: DefId,
18021800
) -> Option<(ty::AssocItem, /*scope*/ DefId)> {
18031801
let tcx = self.tcx();
18041802

1805-
let (ident, def_scope) = tcx.adjust_ident_and_get_scope(ident, scope, block);
1803+
let (ident, def_scope) = tcx.adjust_ident_and_get_scope(ident, scope, self.item_def_id());
18061804
// We have already adjusted the item name above, so compare with `.normalize_to_macros_2_0()`
18071805
// instead of calling `filter_by_name_and_kind` which would needlessly normalize the
18081806
// `ident` again and again.
@@ -3497,8 +3495,8 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ {
34973495
}
34983496
(FIRST_VARIANT, def.non_enum_variant())
34993497
};
3500-
let block = tcx.local_def_id_to_hir_id(item_def_id);
3501-
let (ident, def_scope) = tcx.adjust_ident_and_get_scope(field, def.did(), block);
3498+
let (ident, def_scope) =
3499+
tcx.adjust_ident_and_get_scope(field, def.did(), item_def_id);
35023500
if let Some((field_idx, field)) = variant
35033501
.fields
35043502
.iter_enumerated()

‎compiler/rustc_hir_typeck/src/expr.rs‎

Lines changed: 8 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -2764,9 +2764,8 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
27642764
return Ty::new_error(self.tcx(), guar);
27652765
}
27662766

2767-
let fn_body_hir_id = self.tcx.local_def_id_to_hir_id(self.body_id);
27682767
let (ident, def_scope) =
2769-
self.tcx.adjust_ident_and_get_scope(field, base_def.did(), fn_body_hir_id);
2768+
self.tcx.adjust_ident_and_get_scope(field, base_def.did(), self.body_id);
27702769

27712770
if let Some((idx, field)) = self.find_adt_field(*base_def, ident) {
27722771
self.write_field_index(expr.hir_id, idx);
@@ -3768,9 +3767,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
37683767

37693768
match container.kind() {
37703769
ty::Adt(container_def, args) if container_def.is_enum() => {
3771-
let block = self.tcx.local_def_id_to_hir_id(self.body_id);
3772-
let (ident, _def_scope) =
3773-
self.tcx.adjust_ident_and_get_scope(field, container_def.did(), block);
3770+
let ident = self.tcx.adjust_ident(field, container_def.did());
37743771

37753772
if !self.tcx.features().offset_of_enum() {
37763773
rustc_session::errors::feature_err(
@@ -3806,7 +3803,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
38063803
break;
38073804
};
38083805
let (subident, sub_def_scope) =
3809-
self.tcx.adjust_ident_and_get_scope(subfield, variant.def_id, block);
3806+
self.tcx.adjust_ident_and_get_scope(subfield, variant.def_id, self.body_id);
38103807

38113808
let Some((subindex, field)) = variant
38123809
.fields
@@ -3854,9 +3851,11 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
38543851
continue;
38553852
}
38563853
ty::Adt(container_def, args) => {
3857-
let block = self.tcx.local_def_id_to_hir_id(self.body_id);
3858-
let (ident, def_scope) =
3859-
self.tcx.adjust_ident_and_get_scope(field, container_def.did(), block);
3854+
let (ident, def_scope) = self.tcx.adjust_ident_and_get_scope(
3855+
field,
3856+
container_def.did(),
3857+
self.body_id,
3858+
);
38603859

38613860
let fields = &container_def.non_enum_variant().fields;
38623861
if let Some((index, field)) = fields

‎compiler/rustc_hir_typeck/src/method/probe.rs‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -810,9 +810,8 @@ impl<'a, 'tcx> ProbeContext<'a, 'tcx> {
810810
fn push_candidate(&mut self, candidate: Candidate<'tcx>, is_inherent: bool) {
811811
let is_accessible = if let Some(name) = self.method_name {
812812
let item = candidate.item;
813-
let hir_id = self.tcx.local_def_id_to_hir_id(self.body_id);
814-
let def_scope =
815-
self.tcx.adjust_ident_and_get_scope(name, item.container_id(self.tcx), hir_id).1;
813+
let container_id = item.container_id(self.tcx);
814+
let def_scope = self.tcx.adjust_ident_and_get_scope(name, container_id, self.body_id).1;
816815
item.visibility(self.tcx).is_accessible_from(def_scope, self.tcx)
817816
} else {
818817
true

‎compiler/rustc_middle/src/ty/mod.rs‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2137,18 +2137,17 @@ impl<'tcx> TyCtxt<'tcx> {
21372137
ident
21382138
}
21392139

2140-
// FIXME(vincenzopalazzo): move the HirId to a LocalDefId
21412140
pub fn adjust_ident_and_get_scope(
21422141
self,
21432142
mut ident: Ident,
21442143
scope: DefId,
2145-
block: hir::HirId,
2144+
item_id: LocalDefId,
21462145
) -> (Ident, DefId) {
21472146
let scope = ident
21482147
.span
21492148
.normalize_to_macros_2_0_and_adjust(self.expn_that_defined(scope))
21502149
.and_then(|actual_expansion| actual_expansion.expn_data().parent_module)
2151-
.unwrap_or_else(|| self.parent_module(block).to_def_id());
2150+
.unwrap_or_else(|| self.parent_module_from_def_id(item_id).to_def_id());
21522151
(ident, scope)
21532152
}
21542153

‎compiler/rustc_privacy/src/lib.rs‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -948,7 +948,8 @@ impl<'tcx> NamePrivacyVisitor<'tcx> {
948948

949949
// definition of the field
950950
let ident = Ident::new(sym::dummy, use_ctxt);
951-
let (_, def_id) = self.tcx.adjust_ident_and_get_scope(ident, def.did(), hir_id);
951+
let (_, def_id) =
952+
self.tcx.adjust_ident_and_get_scope(ident, def.did(), hir_id.owner.def_id);
952953
!field.vis.is_accessible_from(def_id, self.tcx)
953954
}
954955

‎compiler/rustc_sanitizers/Cargo.toml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,5 +14,5 @@ rustc_span = { path = "../rustc_span" }
1414
rustc_target = { path = "../rustc_target" }
1515
rustc_trait_selection = { path = "../rustc_trait_selection" }
1616
tracing = "0.1"
17-
twox-hash = "1.6.3"
17+
twox-hash = { version = "1.6.3", default-features = false }
1818
# tidy-alphabetical-end

‎compiler/rustc_span/src/symbol.rs‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1170,6 +1170,7 @@ symbols! {
11701170
lang_items,
11711171
large_assignments,
11721172
last,
1173+
lasx,
11731174
lateout,
11741175
lazy_normalization_consts,
11751176
lazy_type_alias,
@@ -1227,6 +1228,7 @@ symbols! {
12271228
loop_hints,
12281229
loop_match,
12291230
lr,
1231+
lsx,
12301232
lt,
12311233
m68k,
12321234
m68k_target_feature,
@@ -2374,6 +2376,7 @@ symbols! {
23742376
xloop,
23752377
xmm_reg,
23762378
xop_target_feature,
2379+
xreg,
23772380
xtensa,
23782381
xtensa_target_feature,
23792382
yeet_desugar_details,

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