From 971a69e2623b4f5e72b600205b1b0f8306093570 Mon Sep 17 00:00:00 2001 From: Kamal Wadhwa Date: Thu, 2 Jul 2026 15:10:53 +0530 Subject: [PATCH 1/4] FROMLIST: arm64: dts: qcom: glymur-crd: Update VREG l2b_e0 and l9b_e0 voltage for SD-card SD cards may need 1.8v VDDIO also to be supported, to accommodate this requirement reduce the min voltage to 1.8v for `vreg_l2b_e0` which supplies to VDDIO pin of SD card. NOTE - Since this SD card is the only client on this regulator, this change should not have any side effect on any other clients. moreover, SD card driver takes care to explicitly vote for the regulator voltage based on the SD card detection sequence. Also for stable operation of the SD card increase VDD voltage supplied by `vreg_l9b_e0` to 2.96v. Signed-off-by: Kamal Wadhwa Signed-off-by: Monish Chunara Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/all/20260702094056.3755467-2-mchunara@oss.qualcomm.com/ Signed-off-by: Pradeep P V K --- arch/arm64/boot/dts/qcom/glymur-crd.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dtsi b/arch/arm64/boot/dts/qcom/glymur-crd.dtsi index f9b840454898..3dbe44463cf2 100644 --- a/arch/arm64/boot/dts/qcom/glymur-crd.dtsi +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dtsi @@ -372,7 +372,7 @@ vreg_l2b_e0_2p9: ldo2 { regulator-name = "vreg_l2b_e0_2p9"; - regulator-min-microvolt = <2904000>; + regulator-min-microvolt = <1804000>; regulator-max-microvolt = <2904000>; regulator-initial-mode = ; }; @@ -391,10 +391,10 @@ regulator-initial-mode = ; }; - vreg_l9b_e0_2p7: ldo9 { - regulator-name = "vreg_l9b_e0_2p7"; - regulator-min-microvolt = <2704000>; - regulator-max-microvolt = <2704000>; + vreg_l9b_e0_2p9: ldo9 { + regulator-name = "vreg_l9b_e0_2p9"; + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <2960000>; regulator-initial-mode = ; }; From 1727d610b780474d4ae53d2c85565b3d723424a2 Mon Sep 17 00:00:00 2001 From: Monish Chunara Date: Thu, 2 Jul 2026 15:10:54 +0530 Subject: [PATCH 2/4] FROMLIST: dt-bindings: mmc: sdhci-msm: Document the Glymur compatible Document the Glymur-specific SDHCI compatible in the sdhci-msm binding. Use "qcom,sdhci-msm-v5" as the fallback compatible for the MSM SDHCI v5 controller used on Glymur. Signed-off-by: Monish Chunara Link: https://lore.kernel.org/all/20260703-loutish-stimulating-hummingbird-aada5e@quoll/ Signed-off-by: Pradeep P V K --- Documentation/devicetree/bindings/mmc/qcom,sdhci-msm.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mmc/qcom,sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/qcom,sdhci-msm.yaml index bd558a11b792..6a8ef84617a9 100644 --- a/Documentation/devicetree/bindings/mmc/qcom,sdhci-msm.yaml +++ b/Documentation/devicetree/bindings/mmc/qcom,sdhci-msm.yaml @@ -38,6 +38,7 @@ properties: - items: - enum: - qcom,eliza-sdhci + - qcom,glymur-sdhci - qcom,hawi-sdhci - qcom,ipq5018-sdhci - qcom,ipq5210-sdhci From cf3671a6ddbda69a1a6e0f1b26390ef9a3f91f19 Mon Sep 17 00:00:00 2001 From: Monish Chunara Date: Thu, 2 Jul 2026 15:10:55 +0530 Subject: [PATCH 3/4] FROMLIST: arm64: dts: qcom: Add SD Card support for Glymur SoC Add support for SD card on Glymur SoC and enable the required pinctrl configurations. Co-developed-by: Sachin Rathore Signed-off-by: Sachin Rathore Signed-off-by: Monish Chunara Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/all/20260702094056.3755467-4-mchunara@oss.qualcomm.com/ Signed-off-by: Pradeep P V K --- arch/arm64/boot/dts/qcom/glymur.dtsi | 91 ++++++++++++++++++++++++++++ 1 file changed, 91 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi index 87761cc44f8b..b6fbd802a51b 100644 --- a/arch/arm64/boot/dts/qcom/glymur.dtsi +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi @@ -4743,6 +4743,58 @@ #interconnect-cells = <2>; }; + sdhc_2: mmc@8804000 { + compatible = "qcom,glymur-sdhci", "qcom,sdhci-msm-v5"; + + reg = <0x0 0x08804000 0x0 0x1000>; + interrupts = , + ; + interrupt-names = "hc_irq", + "pwr_irq"; + + clocks = <&gcc GCC_SDCC2_AHB_CLK>, + <&gcc GCC_SDCC2_APPS_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", + "core", + "xo"; + + iommus = <&apps_smmu 0xd00 0x0>; + qcom,dll-config = <0x0007442c>; + qcom,ddr-config = <0x80040868>; + + power-domains = <&rpmhpd RPMHPD_CX>; + operating-points-v2 = <&sdhc2_opp_table>; + + interconnects = <&aggre3_noc MASTER_SDCC_2 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&hsc_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_SDCC_2 QCOM_ICC_TAG_ACTIVE_ONLY>; + interconnect-names = "sdhc-ddr", + "cpu-sdhc"; + + bus-width = <4>; + dma-coherent; + + resets = <&gcc GCC_SDCC2_BCR>; + + status = "disabled"; + + sdhc2_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-202000000 { + opp-hz = /bits/ 64 <202000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + usb_2_hsphy: phy@88e0000 { compatible = "qcom,glymur-m31-eusb2-phy", "qcom,sm8750-m31-eusb2-phy"; @@ -6835,6 +6887,45 @@ bias-disable; }; }; + sdc2_default_state: sdc2-default-state { + clk-pins { + pins = "sdc2_clk"; + drive-strength = <16>; + bias-disable; + }; + + cmd-pins { + pins = "sdc2_cmd"; + drive-strength = <10>; + bias-pull-up; + }; + + data-pins { + pins = "sdc2_data"; + drive-strength = <10>; + bias-pull-up; + }; + }; + + sdc2_sleep_state: sdc2-sleep-state { + clk-pins { + pins = "sdc2_clk"; + drive-strength = <2>; + bias-disable; + }; + + cmd-pins { + pins = "sdc2_cmd"; + drive-strength = <2>; + bias-pull-up; + }; + + data-pins { + pins = "sdc2_data"; + drive-strength = <2>; + bias-pull-up; + }; + }; }; stm: stm@10002000 { From a7014503240dbd4b871f7670e082482590398a50 Mon Sep 17 00:00:00 2001 From: Monish Chunara Date: Thu, 2 Jul 2026 15:10:56 +0530 Subject: [PATCH 4/4] FROMLIST: arm64: dts: qcom: Enable SD card for Glymur CRD Enable SD card for Glymur CRD platform. Configure the vmmc/vqmmc regulators and gpio-based card detection for the platform. Co-developed-by: Sachin Rathore Signed-off-by: Sachin Rathore Signed-off-by: Monish Chunara Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/all/20260702094056.3755467-5-mchunara@oss.qualcomm.com/ Signed-off-by: Pradeep P V K --- arch/arm64/boot/dts/qcom/glymur-crd.dts | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/qcom/glymur-crd.dts index 44766a73b0d1..d7471c823e4d 100644 --- a/arch/arm64/boot/dts/qcom/glymur-crd.dts +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts @@ -48,3 +48,28 @@ vdda-refgen4-0p9-supply = <&vreg_l1f_e1_0p82>; vdda-refgen4-1p2-supply = <&vreg_l4f_e1_1p08>; }; + +&sdhc_2 { + vmmc-supply = <&vreg_l9b_e0_2p9>; + vqmmc-supply = <&vreg_l2b_e0_2p9>; + + pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; + pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>; + pinctrl-names = "default", "sleep"; + + cd-gpios = <&tlmm 221 GPIO_ACTIVE_LOW>; + + no-mmc; + no-sdio; + + status = "okay"; +}; + +&tlmm { + sdc2_card_det_n: sd-card-det-n-state { + pins = "gpio221"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; +};