diff --git a/CMakeLists.txt b/CMakeLists.txt index 816ea8a9e965..f0427e45656c 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -118,58 +118,12 @@ function(set_halide_compiler_warnings NAME) # GCC warns when these warnings are given to plain-C sources $<$:-Woverloaded-virtual> $<$:-Wsuggest-override> - $<$:-Wno-old-style-cast> $<$:-Winconsistent-missing-destructor-override> $<$:-Winconsistent-missing-override> $<$:-Wdeprecated-declarations> - $<$:-Wno-double-promotion> - $<$:-Wno-float-conversion> - $<$:-Wno-float-equal> - $<$:-Wno-missing-field-initializers> - $<$:-Wno-shadow> - $<$:-Wno-sign-conversion> - $<$:-Wno-switch-enum> - $<$:-Wno-undef> - $<$:-Wno-unused-function> - $<$:-Wno-unused-macros> - $<$:-Wno-unused-parameter> - - $<$:-Wno-c++98-compat-pedantic> - $<$:-Wno-c++98-compat> - $<$:-Wno-cast-align> - $<$:-Wno-comma> - $<$:-Wno-covered-switch-default> - $<$:-Wno-documentation-unknown-command> - $<$:-Wno-documentation> - $<$:-Wno-exit-time-destructors> - $<$:-Wno-global-constructors> - $<$:-Wno-implicit-float-conversion> - $<$:-Wno-implicit-int-conversion> - $<$:-Wno-implicit-int-float-conversion> - $<$:-Wno-missing-prototypes> - $<$:-Wno-nonportable-system-include-path> - $<$:-Wno-reserved-id-macro> - $<$:-Wno-shadow-field-in-constructor> - $<$:-Wno-shadow-field> - $<$:-Wno-shorten-64-to-32> - $<$:-Wno-undefined-func-template> - $<$:-Wno-unused-member-function> - $<$:-Wno-unused-template> - $<$:/W3> - $<$:/wd4018> # 4018: disable "signed/unsigned mismatch" - $<$:/wd4141> # 4141: 'inline' used more than once - $<$:/wd4146> # 4146: unary minus applied to unsigned type - $<$:/wd4244> # 4244: conversion, possible loss of data - $<$:/wd4267> # 4267: conversion from 'size_t' to 'int', possible loss of data - $<$:/wd4291> # 4291: No matching operator delete found - $<$:/wd4503> # 4503: disable "decorated name length exceeded, name was truncated" - $<$:/wd4800> # 4800: forcing value to bool 'true' or 'false' (performance warning) - - # No: enable deprecation warnings - # $<$:/wd4996> # 4996: compiler encountered deprecated declaration ) endfunction() diff --git a/src/AlignLoads.cpp b/src/AlignLoads.cpp index 9801411341dd..467984923f36 100644 --- a/src/AlignLoads.cpp +++ b/src/AlignLoads.cpp @@ -21,12 +21,10 @@ namespace { class AlignLoads : public IRMutator { public: AlignLoads(int alignment, int min_bytes) - : alignment_analyzer(alignment), required_alignment(alignment), min_bytes_to_align(min_bytes) { + : required_alignment(alignment), min_bytes_to_align(min_bytes) { } private: - HexagonAlignmentAnalyzer alignment_analyzer; - // Loads and stores should ideally be aligned to the vector width in bytes. int required_alignment; @@ -82,12 +80,10 @@ class AlignLoads : public IRMutator { return IRMutator::visit(op); } - int64_t aligned_offset = 0; - bool is_aligned = - alignment_analyzer.is_aligned(op, &aligned_offset); + int aligned_offset = 0; + bool is_aligned = is_hexagon_aligned(op, required_alignment, &aligned_offset); // We know the alignment_analyzer has been able to reason about alignment // if the following is true. - bool known_alignment = is_aligned || (!is_aligned && aligned_offset != 0); int lanes = ramp->lanes; int native_lanes = required_alignment / op->type.bytes(); int stride = static_cast(*const_stride); @@ -99,7 +95,7 @@ class AlignLoads : public IRMutator { // without requiring more vectors from the dense // load. This makes loads like f(2*x + 1) into an aligned // load of double length, with a single shuffle. - int shift = known_alignment && aligned_offset < stride ? aligned_offset : 0; + int shift = aligned_offset < stride ? aligned_offset : 0; // Load a dense vector covering all of the addresses in the load. Expr dense_base = simplify(ramp->base - shift); @@ -122,8 +118,8 @@ class AlignLoads : public IRMutator { // If load is smaller than a native vector and can fully fit inside of it and offset is known, // we can simply offset the native load and slice. - if (!is_aligned && aligned_offset != 0 && Int(32).can_represent(aligned_offset) && (aligned_offset + lanes <= native_lanes)) { - ramp_base = simplify(ramp_base - (int)aligned_offset); + if (!is_aligned && aligned_offset != 0 && (aligned_offset + lanes <= native_lanes)) { + ramp_base = simplify(ramp_base - aligned_offset); alignment = alignment - aligned_offset; slice_offset = aligned_offset; } @@ -147,15 +143,15 @@ class AlignLoads : public IRMutator { return Shuffle::make_concat(slices); } - if (!is_aligned && aligned_offset != 0 && Int(32).can_represent(aligned_offset)) { + if (!is_aligned && aligned_offset != 0) { // We know the offset of this load from an aligned // address. Rewrite this is an aligned load of two // native vectors, followed by a shuffle. - Expr aligned_base = simplify(ramp->base - (int)aligned_offset); - ModulusRemainder alignment = op->alignment - (int)aligned_offset; + Expr aligned_base = simplify(ramp->base - aligned_offset); + ModulusRemainder alignment = op->alignment - aligned_offset; Expr aligned_load = make_load(op, Ramp::make(aligned_base, 1, lanes * 2), alignment); - return Shuffle::make_slice(aligned_load, (int)aligned_offset, 1, lanes); + return Shuffle::make_slice(aligned_load, aligned_offset, 1, lanes); } return IRMutator::visit(op); diff --git a/src/CodeGen_PTX_Dev.cpp b/src/CodeGen_PTX_Dev.cpp index 8f9fbb774f36..7f12fcb3eb7e 100644 --- a/src/CodeGen_PTX_Dev.cpp +++ b/src/CodeGen_PTX_Dev.cpp @@ -551,7 +551,7 @@ void CodeGen_PTX_Dev::codegen_vector_reduce(const VectorReduce *op, const Expr & CodeGen_LLVM::codegen_vector_reduce(op, init); } -string CodeGen_PTX_Dev::march() const { +[[maybe_unused]] string CodeGen_PTX_Dev::march() const { return "nvptx64"; } diff --git a/src/CodeGen_Vulkan_Dev.cpp b/src/CodeGen_Vulkan_Dev.cpp index a1de1be84099..d35c623e973c 100644 --- a/src/CodeGen_Vulkan_Dev.cpp +++ b/src/CodeGen_Vulkan_Dev.cpp @@ -476,7 +476,7 @@ void CodeGen_Vulkan_Dev::SPIRV_Emitter::scalarize(const Expr &e) { builder.update_id(result_id); } -SpvId CodeGen_Vulkan_Dev::SPIRV_Emitter::map_type_to_pair(const Type &t) { +[[maybe_unused]] SpvId CodeGen_Vulkan_Dev::SPIRV_Emitter::map_type_to_pair(const Type &t) { debug(2) << "CodeGen_Vulkan_Dev::SPIRV_Emitter::map_type_to_pair(): " << t << "\n"; SpvId base_type_id = builder.declare_type(t); SpvBuilder::StructMemberTypes member_type_ids = {base_type_id, base_type_id}; diff --git a/src/HexagonAlignment.h b/src/HexagonAlignment.h index e071e61fcb2b..e48aa593c307 100644 --- a/src/HexagonAlignment.h +++ b/src/HexagonAlignment.h @@ -10,59 +10,40 @@ namespace Halide { namespace Internal { -// TODO: This class is barely stateful, and could probably be replaced with free functions. -class HexagonAlignmentAnalyzer { - const int required_alignment; - -public: - HexagonAlignmentAnalyzer(int required_alignment) - : required_alignment(required_alignment) { - internal_assert(required_alignment != 0); +template +bool is_hexagon_aligned(const T *op, int required_alignment, int *aligned_offset) { + int native_lanes; + if constexpr (std::is_same_v) { + native_lanes = required_alignment / op->type.bytes(); + } else { + native_lanes = required_alignment / op->value.type().bytes(); } - /** Analyze the index of a load/store instruction for alignment - * Returns true if it can determining that the address of the store or load is aligned, false otherwise. - */ - template - bool is_aligned_impl(const T *op, int native_lanes, int64_t *aligned_offset) { - debug(3) << "HexagonAlignmentAnalyzer: Check if " << op->index << " is aligned to a " - << required_alignment << " byte boundary\n" - << "native_lanes: " << native_lanes << "\n"; - Expr index = op->index; - const Ramp *ramp = index.as(); - if (ramp) { - index = ramp->base; - } else if (index.type().is_vector()) { - debug(3) << "Is Unaligned\n"; - return false; - } - - internal_assert(native_lanes != 0) << "Type is larger than required alignment of " << required_alignment << " bytes\n"; + debug(3) << "HexagonAlignmentAnalyzer: Check if " << op->index << " is aligned to a " + << required_alignment << " byte boundary\n" + << "native_lanes: " << native_lanes << "\n"; - // If this is a parameter, the base_alignment should be - // host_alignment. Otherwise, this is an internal buffer, - // which we assume has been aligned to the required alignment. - if (op->param.defined() && ((op->param.host_alignment() % required_alignment) != 0)) { - return false; - } - - bool known_alignment = (op->alignment.modulus % native_lanes) == 0; - if (known_alignment) { - *aligned_offset = op->alignment.remainder % native_lanes; - } - return known_alignment && (*aligned_offset == 0); + if (Expr index = op->index; !index.as() && index.type().is_vector()) { + debug(3) << "Is Unaligned\n"; + return false; } - bool is_aligned(const Load *op, int64_t *aligned_offset) { - int native_lanes = required_alignment / op->type.bytes(); - return is_aligned_impl(op, native_lanes, aligned_offset); + internal_assert(native_lanes != 0) << "Type is larger than required alignment of " << required_alignment << " bytes\n"; + + // If this is a parameter, the base_alignment should be + // host_alignment. Otherwise, this is an internal buffer, + // which we assume has been aligned to the required alignment. + if (op->param.defined() && ((op->param.host_alignment() % required_alignment) != 0)) { + return false; } - bool is_aligned(const Store *op, int64_t *aligned_offset) { - int native_lanes = required_alignment / op->value.type().bytes(); - return is_aligned_impl(op, native_lanes, aligned_offset); + bool known_alignment = (op->alignment.modulus % native_lanes) == 0; + int64_t remainder = op->alignment.remainder % native_lanes; + if (known_alignment && aligned_offset != nullptr) { + *aligned_offset = static_cast(remainder); } -}; + return known_alignment && remainder == 0; +} } // namespace Internal } // namespace Halide diff --git a/src/HexagonOptimize.cpp b/src/HexagonOptimize.cpp index 745dd9a6e808..a24e00ec2dc7 100644 --- a/src/HexagonOptimize.cpp +++ b/src/HexagonOptimize.cpp @@ -1404,9 +1404,6 @@ class EliminateInterleaves : public IRMutator { // We need to know when loads are a multiple of 2 native vectors. int native_vector_bits; - // Alignment analyzer for loads and stores - HexagonAlignmentAnalyzer alignment_analyzer; - // Check if x is an expression that is either an interleave, or // transitively is an interleave. bool yields_removable_interleave(const Expr &x) { @@ -1920,9 +1917,8 @@ class EliminateInterleaves : public IRMutator { } bool *aligned_accesses = aligned_buffer_access.shallow_find(op->name); internal_assert(aligned_accesses) << "Buffer not found in scope"; - int64_t aligned_offset = 0; - if (!alignment_analyzer.is_aligned(op, &aligned_offset)) { + if (!is_hexagon_aligned(op, native_vector_bits / 8, nullptr)) { *aligned_accesses = false; } } @@ -1955,9 +1951,7 @@ class EliminateInterleaves : public IRMutator { bool *aligned_accesses = aligned_buffer_access.shallow_find(op->name); internal_assert(aligned_accesses) << "Buffer not found in scope"; - int64_t aligned_offset = 0; - - if (!alignment_analyzer.is_aligned(op, &aligned_offset)) { + if (!is_hexagon_aligned(op, native_vector_bits / 8, nullptr)) { *aligned_accesses = false; } } else { @@ -1977,7 +1971,7 @@ class EliminateInterleaves : public IRMutator { public: EliminateInterleaves(const Target &t, int native_vector_bytes) - : native_vector_bits(native_vector_bytes * 8), alignment_analyzer(native_vector_bytes) { + : native_vector_bits(native_vector_bytes * 8) { if (t.features_any_of({Target::HVX_v65})) { hvx_target = HvxTarget::v65orLater; } else if (t.features_any_of({Target::HVX_v66})) { diff --git a/src/Target.cpp b/src/Target.cpp index c73215f40282..6ba2ae2044a4 100644 --- a/src/Target.cpp +++ b/src/Target.cpp @@ -223,11 +223,11 @@ std::optional getsysctl(const char *name) { return std::make_optional(value); } -bool sysctl_is_set(const char *name) { +[[maybe_unused]] bool sysctl_is_set(const char *name) { return getsysctl(name).value_or(0); } -bool is_armv7s() { +[[maybe_unused]] bool is_armv7s() { return getsysctl("hw.cputype") == CPU_TYPE_ARM && getsysctl("hw.cpusubtype") == CPU_SUBTYPE_ARM_V7S; } diff --git a/test/correctness/compute_with.cpp b/test/correctness/compute_with.cpp index e8157d61ddb2..177bfd53cec4 100644 --- a/test/correctness/compute_with.cpp +++ b/test/correctness/compute_with.cpp @@ -1016,7 +1016,7 @@ int multi_tile_mixed_tile_factor_test() { return 0; } -int only_some_are_tiled_test() { +[[maybe_unused]] int only_some_are_tiled_test() { const int size = 256; Buffer f_im(size, size), g_im(size / 2, size / 2), h_im(size / 2, size / 2); Buffer f_im_ref(size, size), g_im_ref(size / 2, size / 2), h_im_ref(size / 2, size / 2); @@ -1527,7 +1527,7 @@ int update_stage_pairwise_test() { return 0; } -int update_stage_pairwise_zigzag_test() { +[[maybe_unused]] int update_stage_pairwise_zigzag_test() { const int f_size = 128; const int g_size = 128; const int base = 31; diff --git a/test/correctness/simd_op_check.h b/test/correctness/simd_op_check.h index 0fe23f1c1ef9..b8ed0118c9b3 100644 --- a/test/correctness/simd_op_check.h +++ b/test/correctness/simd_op_check.h @@ -18,16 +18,16 @@ using namespace Halide; Expr input(const Type &t, const Expr &arg) { return Internal::Call::make(t, "input", {arg}, Internal::Call::Extern); } -Expr in_f16(const Expr &arg) { +[[maybe_unused]] Expr in_f16(const Expr &arg) { return input(Float(16), arg); } -Expr in_bf16(const Expr &arg) { +[[maybe_unused]] Expr in_bf16(const Expr &arg) { return input(BFloat(16), arg); } -Expr in_f32(const Expr &arg) { +[[maybe_unused]] Expr in_f32(const Expr &arg) { return input(Float(32), arg); } -Expr in_f64(const Expr &arg) { +[[maybe_unused]] Expr in_f64(const Expr &arg) { return input(Float(64), arg); } Expr in_i8(const Expr &arg) { diff --git a/test/generator/metadata_tester_aottest.cpp b/test/generator/metadata_tester_aottest.cpp index 9170cc3d01bd..49845aeb32f8 100644 --- a/test/generator/metadata_tester_aottest.cpp +++ b/test/generator/metadata_tester_aottest.cpp @@ -340,6 +340,7 @@ const halide_scalar_value_t *make_scalar(double v) { } template<> +[[maybe_unused]] const halide_scalar_value_t *make_scalar(void *v) { halide_scalar_value_t *s = new halide_scalar_value_t(); s->u.handle = v; diff --git a/test/runtime/block_allocator.cpp b/test/runtime/block_allocator.cpp index 94f3a31f3e6e..0a488835201a 100644 --- a/test/runtime/block_allocator.cpp +++ b/test/runtime/block_allocator.cpp @@ -43,7 +43,7 @@ int deallocate_block(void *user_context, MemoryBlock *block) { return halide_error_code_success; } -int conform_block(void *user_context, MemoryRequest *request) { +[[maybe_unused]] int conform_block(void *user_context, MemoryRequest *request) { debug(user_context) << "Test : conform_block (" << "request_size=" << int32_t(request->size) << " "