diff --git a/Documentation/platforms/risc-v/esp32p4/boards/esp32p4-function-ev-board/index.rst b/Documentation/platforms/risc-v/esp32p4/boards/esp32p4-function-ev-board/index.rst
index 1ece4a287a9a1..54a3b0a3b4052 100644
--- a/Documentation/platforms/risc-v/esp32p4/boards/esp32p4-function-ev-board/index.rst
+++ b/Documentation/platforms/risc-v/esp32p4/boards/esp32p4-function-ev-board/index.rst
@@ -295,6 +295,17 @@ To save power without using sleep modes, lowering the clock speed is another app
 ``CONFIG_ESPRESSIF_DFS`` option needs to enabled and minimum CPU frequency needs to set under ``CONFIG_ESPRESSIF_MIN_CPU_FREQ`` option.
 With these options, the device scales the CPU clock according to workload.
 
+psram_usrheap
+-------------
+
+This configuration enables allocating the userspace heap into SPIRAM and reserves the
+internal RAM for kernel heap. For instance, for a 32MB PSRAM::
+
+    nsh> free
+          total       used       free    maxused    maxfree  nused  nfree name
+        602004       6492     595512       6872     595512     36      1 Kmem
+      33554428       4276   33550152       4656   33550152      8      1 Umem
+
 pwm
 ---
 
diff --git a/Documentation/platforms/risc-v/esp32p4/index.rst b/Documentation/platforms/risc-v/esp32p4/index.rst
index 7a4b6bbdcab4f..1952ce368a661 100644
--- a/Documentation/platforms/risc-v/esp32p4/index.rst
+++ b/Documentation/platforms/risc-v/esp32p4/index.rst
@@ -348,6 +348,7 @@ Parallel IO        No
 LCD Interface      No
 MIPI DSI           No
 Timers             Yes
+SPIRAM / PSRAM     Yes
 Watchdog           Yes     MWDT0/1 and RWDT
 Ethernet           No
 Brownout           No
diff --git a/arch/risc-v/src/common/espressif/CMakeLists.txt b/arch/risc-v/src/common/espressif/CMakeLists.txt
index c9e75969c0814..c948bd9b3852a 100644
--- a/arch/risc-v/src/common/espressif/CMakeLists.txt
+++ b/arch/risc-v/src/common/espressif/CMakeLists.txt
@@ -209,7 +209,7 @@ if(DEFINED ENV{ESP_HAL_3RDPARTY_VERSION})
       CACHE STRING "ESP HAL 3rdparty version")
 else()
   set(ESP_HAL_3RDPARTY_VERSION
-      2209449c9864c6d83a0ee2295f5b5299a2c6fb39
+      d41c921a724da2b4955832ca9d4b117b004b61c6
       CACHE STRING "ESP HAL 3rdparty version")
 endif()
 
diff --git a/arch/risc-v/src/common/espressif/Kconfig b/arch/risc-v/src/common/espressif/Kconfig
index 4b058db0ff04d..65d93931503ad 100644
--- a/arch/risc-v/src/common/espressif/Kconfig
+++ b/arch/risc-v/src/common/espressif/Kconfig
@@ -34,6 +34,92 @@ config ESPRESSIF_FLASH_32M
 
 endchoice # ESPRESSIF_FLASH
 
+config ESPRESSIF_DONT_USE_ROM_LIBC
+	bool "Don't use ROM libc functions"
+	default n
+	---help---
+		If enabled, NuttX libc will be used instead of ROM newlib
+		functions (strdup, strndup, atoi, etc.).
+
+		This prevents cross-heap allocation issues when ROM newlib
+		allocators are not mapped to the same heap as NuttX libc.
+
+menuconfig ESPRESSIF_SPIRAM
+	bool "External SPI RAM (SPIRAM)"
+	depends on ARCH_CHIP_ESP32P4
+	default n
+	---help---
+		Enable external PSRAM support through the ESP HAL component.
+
+if ESPRESSIF_SPIRAM
+
+config ESPRESSIF_SPIRAM_BOOT_INIT
+	bool "Initialize SPIRAM during early boot"
+	default y
+	---help---
+		Initialize and map external PSRAM before heap region registration.
+
+config ESPRESSIF_SPIRAM_IGNORE_NOTFOUND
+	bool "Ignore SPIRAM not found"
+	default n
+	---help---
+		Keep booting even if PSRAM detection fails.
+
+config ESPRESSIF_SPIRAM_MEMTEST
+	bool "Run SPIRAM memory test at boot"
+	default y
+	---help---
+		Run a basic memory test before adding PSRAM to the allocator.
+
+config ESPRESSIF_SPIRAM_USE_8LINE_MODE
+	bool "Use x8 line mode"
+	default n
+	---help---
+		Enable x8 line mode instead of x16 line mode.
+
+config ESPRESSIF_SPIRAM_ECC
+	bool "Enable SPIRAM ECC"
+	default n
+	---help---
+		Enable ECC for external PSRAM accesses.
+
+choice ESPRESSIF_SPIRAM_SPEED
+	prompt "SPIRAM speed"
+	default ESPRESSIF_SPIRAM_SPEED_200M if !ESP32P4_REV_MIN_0
+	default ESPRESSIF_SPIRAM_SPEED_80M
+
+config ESPRESSIF_SPIRAM_SPEED_20M
+	bool "20 MHz"
+
+config ESPRESSIF_SPIRAM_SPEED_80M
+	bool "80 MHz"
+
+config ESPRESSIF_SPIRAM_SPEED_200M
+	bool "200 MHz"
+	depends on !ESP32P4_REV_MIN_0
+
+config ESPRESSIF_SPIRAM_SPEED_250M
+	bool "250 MHz"
+	depends on !ESP32P4_REV_MIN_0
+
+endchoice # ESPRESSIF_SPIRAM_SPEED
+
+config ESPRESSIF_SPIRAM_SPEED
+	int
+	default 20 if ESPRESSIF_SPIRAM_SPEED_20M
+	default 80 if ESPRESSIF_SPIRAM_SPEED_80M
+	default 200 if ESPRESSIF_SPIRAM_SPEED_200M
+	default 250 if ESPRESSIF_SPIRAM_SPEED_250M
+
+config ESPRESSIF_SPIRAM_USER_HEAP
+	bool "Add SPIRAM to user heap"
+	default y
+	select ESPRESSIF_DONT_USE_ROM_LIBC
+	---help---
+		Add SPIRAM as an additional NuttX heap region.
+
+endif # ESPRESSIF_SPIRAM
+
 config ESPRESSIF_IDF_ENV_FPGA
 	bool "IDF FPGA Environment"
 	default n
diff --git a/arch/risc-v/src/common/espressif/Make.defs b/arch/risc-v/src/common/espressif/Make.defs
index e91515f85f22a..0415b73b4099e 100644
--- a/arch/risc-v/src/common/espressif/Make.defs
+++ b/arch/risc-v/src/common/espressif/Make.defs
@@ -217,7 +217,7 @@ endif
 
 ESP_HAL_3RDPARTY_REPO   = esp-hal-3rdparty
 ifndef ESP_HAL_3RDPARTY_VERSION
-	ESP_HAL_3RDPARTY_VERSION = 2209449c9864c6d83a0ee2295f5b5299a2c6fb39
+	ESP_HAL_3RDPARTY_VERSION = d41c921a724da2b4955832ca9d4b117b004b61c6
 endif
 
 ifndef ESP_HAL_3RDPARTY_URL
diff --git a/arch/risc-v/src/common/espressif/esp_allocateheap.c b/arch/risc-v/src/common/espressif/esp_allocateheap.c
index df06f360e47be..5e562aedf49e7 100644
--- a/arch/risc-v/src/common/espressif/esp_allocateheap.c
+++ b/arch/risc-v/src/common/espressif/esp_allocateheap.c
@@ -39,6 +39,10 @@
 #ifdef CONFIG_ESPRESSIF_RETENTION_HEAP
 #  include "esp_retentionheap.h"
 #endif
+#if defined(CONFIG_ESPRESSIF_SPIRAM)
+#  include "esp_psram.h"
+#  include "esp_private/esp_psram_extram.h"
+#endif
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -90,9 +94,25 @@ void up_allocate_heap(void **heap_start, size_t *heap_size)
   uintptr_t rstart;
   uintptr_t rend;
 #endif
+#if defined(CONFIG_MM_KERNEL_HEAP) && \
+    defined(CONFIG_ESPRESSIF_SPIRAM) && \
+    defined(CONFIG_ESPRESSIF_SPIRAM_USER_HEAP)
+  uintptr_t ubase;
+  uintptr_t utop;
+#endif
 
   board_autoled_on(LED_HEAPALLOCATE);
 
+#if defined(CONFIG_MM_KERNEL_HEAP) && \
+    defined(CONFIG_ESPRESSIF_SPIRAM) && \
+    defined(CONFIG_ESPRESSIF_SPIRAM_USER_HEAP)
+  DEBUGASSERT(esp_psram_is_initialized());
+  ubase = esp_psram_extram_vaddr_start();
+  utop  = esp_psram_extram_vaddr_end();
+
+  *heap_start = (void *)ubase;
+  *heap_size  = utop - ubase;
+#else
   *heap_start = (void *)g_idle_topstack;
 #ifdef CONFIG_ESPRESSIF_RETENTION_HEAP
   esp_retentionheap_find_region(&rstart, &rend);
@@ -101,8 +121,48 @@ void up_allocate_heap(void **heap_start, size_t *heap_size)
   *heap_size  = (uintptr_t)ets_rom_layout_p->dram0_rtos_reserved_start -
                            g_idle_topstack;
 #endif
-  _heap_start = g_idle_topstack;
+#endif
+  _heap_start = (uintptr_t)*heap_start;
+}
+
+/****************************************************************************
+ * Name: up_allocate_kheap
+ *
+ * Description:
+ *   For the kernel builds (CONFIG_BUILD_PROTECTED=y or
+ *   CONFIG_BUILD_KERNEL=y) there may be both kernel- and user-space heaps
+ *   as determined by CONFIG_MM_KERNEL_HEAP=y.  This function allocates (and
+ *   protects) the kernel-space heap.
+ *
+ *   For Flat build (CONFIG_BUILD_FLAT=y), this function enables a separate
+ *   (although unprotected) heap for the kernel.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_MM_KERNEL_HEAP
+void up_allocate_kheap(void **heap_start, size_t *heap_size)
+{
+  uintptr_t kbase = g_idle_topstack;
+  uintptr_t ktop;
+
+#ifdef CONFIG_ESPRESSIF_RETENTION_HEAP
+  uintptr_t rstart;
+  uintptr_t rend;
+
+  esp_retentionheap_find_region(&rstart, &rend);
+  ktop = rstart;
+#else
+  ktop = (uintptr_t)ets_rom_layout_p->dram0_rtos_reserved_start;
+#endif
+
+  DEBUGASSERT(ktop > kbase);
+
+  board_autoled_on(LED_HEAPALLOCATE);
+
+  *heap_start = (void *)kbase;
+  *heap_size  = ktop - kbase;
 }
+#endif
 
 /****************************************************************************
  * Name: riscv_addregion
@@ -134,9 +194,27 @@ void riscv_addregion(void)
 
   if (region_size > 0)
     {
+#ifdef CONFIG_MM_KERNEL_HEAP
+      kmm_addregion(_sram_high_heap_start, region_size);
+#else
       kumm_addregion(_sram_high_heap_start, region_size);
+#endif
     }
 #endif
+
+#if !defined(CONFIG_MM_KERNEL_HEAP)
+#  if defined(CONFIG_ESPRESSIF_SPIRAM_USER_HEAP)
+  if (esp_psram_is_initialized())
+    {
+      uintptr_t start = esp_psram_extram_vaddr_start();
+      uintptr_t end = esp_psram_extram_vaddr_end();
+
+      if (end > start)
+        {
+          kumm_addregion((void *)start, end - start);
+        }
+    }
+#  endif
+#endif
 }
 #endif
-
diff --git a/arch/risc-v/src/common/espressif/esp_start.c b/arch/risc-v/src/common/espressif/esp_start.c
index f170532a7db2a..4c11918994dc2 100644
--- a/arch/risc-v/src/common/espressif/esp_start.c
+++ b/arch/risc-v/src/common/espressif/esp_start.c
@@ -72,9 +72,14 @@
 #include "esp_app_format.h"
 #endif
 
+#include "bootloader_mem.h"
 #include "bootloader_flash_priv.h"
 #include "esp_private/startup_internal.h"
 #include "esp_private/spi_flash_os.h"
+#ifdef CONFIG_ESPRESSIF_SPIRAM
+#  include "esp_psram.h"
+#  include "esp_private/esp_psram_extram.h"
+#endif
 
 #if SOC_APM_SUPPORTED
 #  include "hal/apm_hal.h"
@@ -475,6 +480,8 @@ void sys_startup_fn(void)
 
 void __esp_start(void)
 {
+  esp_err_t ret;
+
   esp_cpu_intr_set_ivt_addr(&_vector_table);
 
 #if SOC_INT_CLIC_SUPPORTED
@@ -550,18 +557,54 @@ void __esp_start(void)
 
   esp_rtc_init();
 
+  esp_mspi_pin_init();
+
   /* Configure SPI Flash chip state */
 
   spi_flash_init_chip_state();
 
   esp_mmu_map_init();
 
+#ifdef CONFIG_ESPRESSIF_SPIRAM
+  ret = esp_psram_chip_init();
+  if (ret != ESP_OK)
+    {
+#  ifndef CONFIG_ESPRESSIF_SPIRAM_IGNORE_NOTFOUND
+      PANIC();
+#  endif
+    }
+
+#  ifdef CONFIG_ESPRESSIF_SPIRAM_BOOT_INIT
+  if (ret == ESP_OK)
+    {
+      ret = esp_psram_init();
+      if (ret != ESP_OK)
+        {
+#    ifndef CONFIG_ESPRESSIF_SPIRAM_IGNORE_NOTFOUND
+          PANIC();
+#    endif
+        }
+    }
+#  endif
+#endif
+
   /* Configures the CPU clock, RTC slow and fast clocks, and performs
    * RTC slow clock calibration.
    */
 
   esp_clk_init();
 
+  esp_mspi_pin_reserve();
+
+  bootloader_init_mem();
+
+#ifdef CONFIG_ESPRESSIF_SPIRAM_MEMTEST
+  if (esp_psram_is_initialized() && !esp_psram_extram_test())
+    {
+      PANIC();
+    }
+#endif
+
   /* Disable clock of unused peripherals */
 
   esp_perip_clk_init();
@@ -613,5 +656,7 @@ void __esp_start(void)
 
   nx_start();
 
+  UNUSED(ret);
+
   for (; ; );
 }
diff --git a/arch/risc-v/src/esp32c3/hal_esp32c3.cmake b/arch/risc-v/src/esp32c3/hal_esp32c3.cmake
index ff897a59fe3e3..4c76692e83cc5 100644
--- a/arch/risc-v/src/esp32c3/hal_esp32c3.cmake
+++ b/arch/risc-v/src/esp32c3/hal_esp32c3.cmake
@@ -511,6 +511,11 @@ list(
 list(APPEND HAL_SRCS
      ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/flash_encrypt.c)
 
+# Bootloader common
+list(
+  APPEND HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_mem.c)
+
 # ##############################################################################
 # Simple Boot Sources
 # ##############################################################################
@@ -529,7 +534,6 @@ if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${CHIP_SERIES}.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/flash_qio_mode.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_clock_init.c
-    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_mem.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random_${CHIP_SERIES}.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/esp_image_format.c
diff --git a/arch/risc-v/src/esp32c3/hal_esp32c3.mk b/arch/risc-v/src/esp32c3/hal_esp32c3.mk
index 2ac5e04f16a58..088761c60f065 100644
--- a/arch/risc-v/src/esp32c3/hal_esp32c3.mk
+++ b/arch/risc-v/src/esp32c3/hal_esp32c3.mk
@@ -352,6 +352,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)uppe
 # Bootloader files
 
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)flash_encrypt.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_mem.c
 
 ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)bootloader_banner_wrap.c
@@ -364,7 +365,6 @@ ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash_config_${CHIP_SERIES}.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)flash_qio_mode.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_clock_init.c
-  CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_mem.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random_${CHIP_SERIES}.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)esp_image_format.c
diff --git a/arch/risc-v/src/esp32c6/hal_esp32c6.cmake b/arch/risc-v/src/esp32c6/hal_esp32c6.cmake
index 32dd2cdc926fa..643e41997800c 100644
--- a/arch/risc-v/src/esp32c6/hal_esp32c6.cmake
+++ b/arch/risc-v/src/esp32c6/hal_esp32c6.cmake
@@ -537,6 +537,11 @@ list(
 list(APPEND HAL_SRCS
      ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/flash_encrypt.c)
 
+# Bootloader common
+list(
+  APPEND HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_mem.c)
+
 # ##############################################################################
 # Simple Boot
 # ##############################################################################
@@ -555,7 +560,6 @@ if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${CHIP_SERIES}.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/flash_qio_mode.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_clock_init.c
-    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_mem.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random_${CHIP_SERIES}.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/esp_image_format.c
diff --git a/arch/risc-v/src/esp32c6/hal_esp32c6.mk b/arch/risc-v/src/esp32c6/hal_esp32c6.mk
index 578c936a74721..b7af0247826a9 100644
--- a/arch/risc-v/src/esp32c6/hal_esp32c6.mk
+++ b/arch/risc-v/src/esp32c6/hal_esp32c6.mk
@@ -385,6 +385,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELI
 # Bootloader files
 
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)flash_encrypt.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_mem.c
 
 ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)bootloader_banner_wrap.c
@@ -397,7 +398,6 @@ ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash_config_${CHIP_SERIES}.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)flash_qio_mode.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_clock_init.c
-  CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_mem.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random_${CHIP_SERIES}.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)esp_image_format.c
diff --git a/arch/risc-v/src/esp32h2/hal_esp32h2.cmake b/arch/risc-v/src/esp32h2/hal_esp32h2.cmake
index 986d772b2c634..dde8f481fe85d 100644
--- a/arch/risc-v/src/esp32h2/hal_esp32h2.cmake
+++ b/arch/risc-v/src/esp32h2/hal_esp32h2.cmake
@@ -496,6 +496,11 @@ list(
 list(APPEND HAL_SRCS
      ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/flash_encrypt.c)
 
+# Bootloader common
+list(
+  APPEND HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_mem.c)
+
 # ##############################################################################
 # Simple Boot
 # ##############################################################################
@@ -514,7 +519,6 @@ if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${CHIP_SERIES}.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/flash_qio_mode.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_clock_init.c
-    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_mem.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random_${CHIP_SERIES}.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/esp_image_format.c
diff --git a/arch/risc-v/src/esp32h2/hal_esp32h2.mk b/arch/risc-v/src/esp32h2/hal_esp32h2.mk
index 8888da1aad080..60f12a61968ad 100644
--- a/arch/risc-v/src/esp32h2/hal_esp32h2.mk
+++ b/arch/risc-v/src/esp32h2/hal_esp32h2.mk
@@ -363,6 +363,7 @@ CHIP_ASRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
 # Bootloader files
 
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)flash_encrypt.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_mem.c
 
 ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)bootloader_banner_wrap.c
@@ -375,7 +376,6 @@ ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash_config_${CHIP_SERIES}.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)flash_qio_mode.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_clock_init.c
-  CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_mem.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random_${CHIP_SERIES}.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)esp_image_format.c
diff --git a/arch/risc-v/src/esp32p4/Kconfig b/arch/risc-v/src/esp32p4/Kconfig
index f1cfa5cdd17fc..1dd503c00e616 100644
--- a/arch/risc-v/src/esp32p4/Kconfig
+++ b/arch/risc-v/src/esp32p4/Kconfig
@@ -18,7 +18,7 @@ config ESP32P4_SELECTS_REV_LESS_V3
 
 choice ESP32P4_REV_MIN
 	prompt "Minimum Supported ESP32-P4 Revision"
-	default ESP32P4_REV_MIN_1
+	default ESP32P4_REV_MIN_301
 	---help---
 		Required minimum chip revision. ESP-IDF will check for it and
 		reject to boot if the chip revision fails the check.
@@ -43,6 +43,10 @@ config ESP32P4_REV_MIN_300
 	bool "Rev v3.0"
 	depends on !ESP32P4_SELECTS_REV_LESS_V3
 
+config ESP32P4_REV_MIN_301
+	bool "Rev v3.1"
+	depends on !ESP32P4_SELECTS_REV_LESS_V3
+
 endchoice # ESP32P4_REV_MIN
 
 config ESP32P4_REV_MIN_FULL
@@ -51,6 +55,7 @@ config ESP32P4_REV_MIN_FULL
 	default 1 if ESP32P4_REV_MIN_1
 	default 100 if ESP32P4_REV_MIN_100
 	default 300 if ESP32P4_REV_MIN_300
+	default 301 if ESP32P4_REV_MIN_301
 
 config ESP_REV_MIN_FULL
 	int
diff --git a/arch/risc-v/src/esp32p4/hal_esp32p4.cmake b/arch/risc-v/src/esp32p4/hal_esp32p4.cmake
index 2bafc54031acc..375a34cff74b8 100644
--- a/arch/risc-v/src/esp32p4/hal_esp32p4.cmake
+++ b/arch/risc-v/src/esp32p4/hal_esp32p4.cmake
@@ -118,6 +118,9 @@ set(ESP32P4_INCLUDES
     ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/include
     ${ESP_HAL_3RDPARTY_REPO}/components/esp_pm
     ${ESP_HAL_3RDPARTY_REPO}/components/esp_pm/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_psram/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_psram/device/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_psram/xip_impl/include
     ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}
     ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/include
     ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/include/${CHIP_SERIES}
@@ -182,18 +185,24 @@ set(ESP_ROM_LD_DIR
 set(ESP_SOC_LD_DIR ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/ld)
 set(ESP_RISCV_LD_DIR ${ESP_HAL_3RDPARTY_REPO}/components/riscv/ld)
 
-if(CONFIG_ESP32P4_REV_MIN_300)
+if(NOT "${CONFIG_ESP32P4_SELECTS_REV_LESS_V3}" STREQUAL "y")
   set(_esp32p4_rom_ld_files
       ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.eco5.ld
       ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.eco5.libc.ld
-      ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.eco5.libgcc.ld
-      ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.eco5.newlib.ld)
+      ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.eco5.libgcc.ld)
+  if(NOT "${CONFIG_ESPRESSIF_DONT_USE_ROM_LIBC}" STREQUAL "y")
+    list(APPEND _esp32p4_rom_ld_files
+         ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.eco5.newlib.ld)
+  endif()
 else()
   set(_esp32p4_rom_ld_files
       ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.ld
       ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libc.ld
-      ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libgcc.ld
-      ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.newlib.ld)
+      ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libgcc.ld)
+  if(NOT "${CONFIG_ESPRESSIF_DONT_USE_ROM_LIBC}" STREQUAL "y")
+    list(APPEND _esp32p4_rom_ld_files
+         ${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.newlib.ld)
+  endif()
 endif()
 
 list(
@@ -303,6 +312,7 @@ list(
   ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mac_addr.c
   ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/mspi_timing_tuning.c
   ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/periph_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/ldo/esp_ldo_regulator.c
   ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/lowpower/port/${CHIP_SERIES}/sleep_cpu_asm.S
   ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/lowpower/port/${CHIP_SERIES}/sleep_cpu.c
   ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/lowpower/port/${CHIP_SERIES}/sleep_cpu_static.c
@@ -426,6 +436,11 @@ list(
   ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/heap_caps.c
   ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/platform/os.c)
 
+# Bootloader common
+list(
+  APPEND HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_mem.c)
+
 if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
   list(
     APPEND
@@ -441,7 +456,6 @@ if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_common.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_console_loader.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_console.c
-    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_mem.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random_${CHIP_SERIES}.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random.c
     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_sha.c
@@ -450,6 +464,29 @@ if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
   target_link_options(nuttx PRIVATE -Wl,--wrap=bootloader_print_banner)
 endif()
 
+if(CONFIG_ESPRESSIF_SPIRAM)
+  list(
+    APPEND
+    HAL_SRCS
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${CHIP_SERIES}.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/${CHIP_SERIES}/mspi_periph.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/port/${CHIP_SERIES}/mspi_timing_config.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/tuning_scheme_impl/mspi_timing_by_dqs.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/tuning_scheme_impl/mspi_timing_by_flash_delay.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_psram/system_layer/esp_psram_mspi.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_psram/system_layer/esp_psram.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_psram/device/esp_psram_impl_ap_hex.c
+  )
+
+  if(CONFIG_SPIRAM_FLASH_LOAD_TO_PSRAM)
+    list(
+      APPEND
+      HAL_SRCS
+      ${ESP_HAL_3RDPARTY_REPO}/components/esp_psram/xip_impl/mmu_psram_flash_v2.c
+    )
+  endif()
+endif()
+
 if(CONFIG_ESPRESSIF_IDF_ENV_FPGA)
   list(APPEND HAL_SRCS
        ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/fpga_overrides_clk.c
diff --git a/arch/risc-v/src/esp32p4/hal_esp32p4.mk b/arch/risc-v/src/esp32p4/hal_esp32p4.mk
index e9d1f703163b0..31bfede5c088d 100644
--- a/arch/risc-v/src/esp32p4/hal_esp32p4.mk
+++ b/arch/risc-v/src/esp32p4/hal_esp32p4.mk
@@ -108,6 +108,9 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_pm
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_pm$(DELIM)include
+INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_psram$(DELIM)include
+INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_psram$(DELIM)device$(DELIM)include
+INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_psram$(DELIM)xip_impl$(DELIM)include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include$(DELIM)$(CHIP_SERIES)
@@ -160,18 +163,26 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
 
 # Linker scripts
 
-ifeq ($(CONFIG_ESP32P4_REV_MIN_300),y)
+ifneq ($(CONFIG_ESP32P4_SELECTS_REV_LESS_V3),y)
 ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco5.ld
 ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco5.libc.ld
 ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco5.libgcc.ld
+ifeq ($(CONFIG_ESPRESSIF_DONT_USE_ROM_LIBC),y)
+ # Use NuttX libc instead of ROM newlib functions
+else
 ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco5.newlib.ld
+endif
 else
 ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
 ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc.ld
 ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libgcc.ld
+ifeq ($(CONFIG_ESPRESSIF_DONT_USE_ROM_LIBC),y)
+ # Use NuttX libc instead of ROM newlib functions
+else
 ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib.ld
-
 endif
+endif
+
 ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.api.ld
 ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.version.ld
 ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc-suboptimal_for_misaligned_mem.ld
@@ -263,6 +274,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mac_addr.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_timing_tuning$(DELIM)mspi_timing_tuning.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)periph_ctrl.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)ldo$(DELIM)esp_ldo_regulator.c
 CHIP_ASRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)lowpower$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sleep_cpu_asm.S
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)lowpower$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sleep_cpu.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)lowpower$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sleep_cpu_static.c
@@ -304,6 +316,18 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)ext_mem_layout.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_pm$(DELIM)pm_impl.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_pm$(DELIM)pm_locks.c
+ifeq ($(CONFIG_ESPRESSIF_SPIRAM),y)
+  CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)$(CHIP_SERIES)$(DELIM)mspi_periph.c
+  CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_timing_tuning$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)mspi_timing_config.c
+  CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_timing_tuning$(DELIM)tuning_scheme_impl$(DELIM)mspi_timing_by_dqs.c
+  CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_timing_tuning$(DELIM)tuning_scheme_impl$(DELIM)mspi_timing_by_flash_delay.c
+  CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_psram$(DELIM)system_layer$(DELIM)esp_psram_mspi.c
+  CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_psram$(DELIM)system_layer$(DELIM)esp_psram.c
+  CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_psram$(DELIM)device$(DELIM)esp_psram_impl_ap_hex.c
+ifeq ($(CONFIG_SPIRAM_FLASH_LOAD_TO_PSRAM),y)
+  CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_psram$(DELIM)xip_impl$(DELIM)mmu_psram_flash_v2.c
+endif
+endif
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_clic.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_crc.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_efuse.c
@@ -388,6 +412,8 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELI
 
 # Bootloader files
 
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_mem.c
+
 ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash_config_${CHIP_SERIES}.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash.c
@@ -400,7 +426,6 @@ ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_common.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_console_loader.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_console.c
-  CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_mem.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random_${CHIP_SERIES}.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random.c
   CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_sha.c
diff --git a/boards/risc-v/esp32p4/common/scripts/esp32p4_sections.rev3.ld b/boards/risc-v/esp32p4/common/scripts/esp32p4_sections.rev3.ld
index 278a0eb62945f..70b244bf5efc8 100644
--- a/boards/risc-v/esp32p4/common/scripts/esp32p4_sections.rev3.ld
+++ b/boards/risc-v/esp32p4/common/scripts/esp32p4_sections.rev3.ld
@@ -303,6 +303,8 @@ SECTIONS
     *libarch.a:esp_cache.*(.literal .literal.* .text .text.*)
     *libarch.a:cache_utils.*(.literal .literal.* .text .text.*)
     *libarch.a:memspi_host_driver.*(.literal .literal.* .text .text.*)
+    *libarch.a:esp_psram_impl_ap_hex.*(.literal .literal.* .text .text.*)
+    *libarch.a:esp_psram.*(.literal.esp_psram_get_heap_size_to_protect .text.esp_psram_get_heap_size_to_protect)
 
     *libc.a:sq_remlast.*(.literal .text .literal.* .text.*)
 
@@ -470,6 +472,8 @@ SECTIONS
     *libarch.a:esp_cache.*(.rodata .rodata.*)
     *libarch.a:cache_utils.*(.rodata .rodata.*)
     *libarch.a:memspi_host_driver.*(.rodata .rodata.*)
+    *libarch.a:esp_psram_impl_ap_hex.*(.rodata .rodata.*)
+    *libarch.a:cpu_region_protect.*(.rodata .rodata.*)
 
     esp_head.*(.rodata .rodata.*)
     esp_start.*(.rodata .rodata.*)
diff --git a/boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/psram_usrheap/defconfig b/boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/psram_usrheap/defconfig
new file mode 100644
index 0000000000000..c5401e9910034
--- /dev/null
+++ b/boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/psram_usrheap/defconfig
@@ -0,0 +1,60 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_ARCH="risc-v"
+CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
+CONFIG_ARCH_BOARD_COMMON=y
+CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
+CONFIG_ARCH_CHIP="esp32p4"
+CONFIG_ARCH_CHIP_ESP32P4=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_IRQ_TO_NDX=y
+CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
+CONFIG_ARCH_NUSER_INTERRUPTS=17
+CONFIG_ARCH_RISCV=y
+CONFIG_BOARDCTL_RESET=y
+CONFIG_BOARD_LATE_INITIALIZE=y
+CONFIG_BOARD_LOOPSPERMSEC=15000
+CONFIG_BUILTIN=y
+CONFIG_ESPRESSIF_SPIFLASH=y
+CONFIG_ESPRESSIF_SPIFLASH_SMARTFS=y
+CONFIG_ESPRESSIF_SPIRAM=y
+CONFIG_ESPRESSIF_STORAGE_MTD_OFFSET=0x110000
+CONFIG_ESPRESSIF_STORAGE_MTD_SIZE=0xf0000
+CONFIG_EXPERIMENTAL=y
+CONFIG_FS_PROCFS=y
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LIBC_PERROR_STDOUT=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_MM_KERNEL_HEAP=y
+CONFIG_MM_REGIONS=2
+CONFIG_NAME_MAX=48
+CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_DISABLE_LOSMART=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_NSH_STRERROR=y
+CONFIG_PREALLOC_TIMERS=0
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_BACKTRACE=y
+CONFIG_SCHED_WAITPID=y
+CONFIG_SMARTFS_MAXNAMLEN=48
+CONFIG_START_DAY=29
+CONFIG_START_MONTH=11
+CONFIG_START_YEAR=2019
+CONFIG_SYSTEM_DUMPSTACK=y
+CONFIG_SYSTEM_FLASH_ERASEALL=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TESTING_FSTEST=y
+CONFIG_TESTING_FSTEST_MOUNTPT="/mnt"
+CONFIG_TESTING_HEAP=y
+CONFIG_UART0_SERIAL_CONSOLE=y
diff --git a/boards/risc-v/esp32p4/esp32p4-function-ev-board/scripts/Make.defs b/boards/risc-v/esp32p4/esp32p4-function-ev-board/scripts/Make.defs
index ee4c3a313f3fa..573d5bbbf4cb7 100644
--- a/boards/risc-v/esp32p4/esp32p4-function-ev-board/scripts/Make.defs
+++ b/boards/risc-v/esp32p4/esp32p4-function-ev-board/scripts/Make.defs
@@ -36,7 +36,7 @@ ARCHSCRIPT += $(BOARD_COMMON_DIR)/scripts/$(CHIP_SERIES)_aliases.ld
 
 ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_flat_memory.ld)
 
-ifeq ($(CONFIG_ESP32P4_REV_MIN_300),y)
+ifneq ($(CONFIG_ESP32P4_SELECTS_REV_LESS_V3),y)
   BOARD_REV = .rev3
 endif
 
diff --git a/boards/risc-v/esp32p4/esp32p4-function-ev-board/src/CMakeLists.txt b/boards/risc-v/esp32p4/esp32p4-function-ev-board/src/CMakeLists.txt
index da332467cbb94..3e523e9a2873e 100644
--- a/boards/risc-v/esp32p4/esp32p4-function-ev-board/src/CMakeLists.txt
+++ b/boards/risc-v/esp32p4/esp32p4-function-ev-board/src/CMakeLists.txt
@@ -52,7 +52,7 @@ set(LDSCRIPTS "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_aliases.ld"
               "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_flat_memory.ld")
 
 if(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT OR CONFIG_ESPRESSIF_SIMPLE_BOOT)
-  if(CONFIG_ESP32P4_REV_MIN_300)
+  if(NOT "${CONFIG_ESP32P4_SELECTS_REV_LESS_V3}" STREQUAL "y")
     list(APPEND LDSCRIPTS
          "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_sections.rev3.ld")
   else()
diff --git a/boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_boot.c b/boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_boot.c
index 11f3692632996..8dcfa968e337e 100644
--- a/boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_boot.c
+++ b/boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_boot.c
@@ -26,6 +26,8 @@
 
 #include <nuttx/config.h>
 
+#include "esp32p4-function-ev-board.h"
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/