From 13666dc20d630c5cc97c968740bd7639e9177221 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Thu, 5 Apr 2018 10:47:46 +0200 Subject: [PATCH 1/2] spi flash write operations --- hw/xtensa/esp8266.c | 45 +++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 41 insertions(+), 4 deletions(-) diff --git a/hw/xtensa/esp8266.c b/hw/xtensa/esp8266.c index 726d1eddafa..449d2bc0325 100644 --- a/hw/xtensa/esp8266.c +++ b/hw/xtensa/esp8266.c @@ -41,7 +41,7 @@ #include "qemu/error-report.h" #include "bootparam.h" -#define DEBUG_LOG(...) fprintf(stderr, __VA_ARGS__) +#define DEBUG_LOG(...) // fprintf(stderr, __VA_ARGS__) #define DEFINE_BITS(prefix, reg, field, shift, len) \ prefix##_##reg##_##field##_SHIFT = shift, \ @@ -372,6 +372,10 @@ enum { enum { ESP8266_SPI_FLASH_BITS(CMD, USR, 18, 1), + ESP8266_SPI_FLASH_BITS(CMD, CE, 22, 1), + ESP8266_SPI_FLASH_BITS(CMD, BE, 23, 1), + ESP8266_SPI_FLASH_BITS(CMD, SE, 24, 1), + ESP8266_SPI_FLASH_BITS(CMD, PP, 25, 1), ESP8266_SPI_FLASH_BITS(CMD, WRDI, 29, 1), ESP8266_SPI_FLASH_BITS(CMD, WREN, 30, 1), ESP8266_SPI_FLASH_BITS(CMD, READ, 31, 1), @@ -422,12 +426,19 @@ static uint64_t esp8266_spi_read(void *opaque, hwaddr addr, unsigned size) Esp8266SpiState *s = opaque; DEBUG_LOG("%s: +0x%02x: ", __func__, (uint32_t)addr); - if (addr / 4 >= ESP8266_SPI_MAX || addr % 4 || size != 4) { + if (addr / 4 >= ESP8266_SPI_MAX || addr % 4 || size > 4) { DEBUG_LOG("0\n"); return 0; } - DEBUG_LOG("0x%08x\n", s->reg[addr / 4]); - return s->reg[addr / 4]; + else if (size == 4) { + DEBUG_LOG("0x%08x\n", s->reg[addr / 4]); + return s->reg[addr / 4]; + } + + uint32_t ret = 0; + memcpy(&ret, s->reg + ESP8266_SPI_FLASH_C0, size); + DEBUG_LOG("0x%08x\n", ret); + return ret; } static void esp8266_spi_cmd(Esp8266SpiState *s, hwaddr addr, @@ -458,6 +469,32 @@ static void esp8266_spi_cmd(Esp8266SpiState *s, hwaddr addr, ESP8266_SPI_GET(s, USER2, COMMAND_VALUE), ESP8266_SPI_GET(s, USER2, COMMAND_BITLEN)); } + if (val & ESP8266_SPI_FLASH_CMD_SE) { + DEBUG_LOG("%s: SECTOR ERASE @0x%08x\n", + __func__, + ESP8266_SPI_GET(s, ADDR, OFFSET) & 0xfff); + memset(s->flash_image + (ESP8266_SPI_GET(s, ADDR, OFFSET) & ~0xfff), 0xff, 4096); + } + if (val & ESP8266_SPI_FLASH_CMD_BE) { + DEBUG_LOG("%s: BLOCK ERASE @0x%08x\n", + __func__, + ESP8266_SPI_GET(s, ADDR, OFFSET) & 0xffff); + memset(s->flash_image + (ESP8266_SPI_GET(s, ADDR, OFFSET) & ~0xffff), 0xff, 65536); + } + if (val & ESP8266_SPI_FLASH_CMD_BE) { + DEBUG_LOG("%s: CHIP ERASE\n", + __func__); + memset(s->flash_image, 0xff, ESP8266_MAX_FLASH_SZ); + } + if (val & ESP8266_SPI_FLASH_CMD_PP) { + DEBUG_LOG("%s: WRITE FLASH 0x%02x@0x%08x\n", + __func__, + ESP8266_SPI_GET(s, ADDR, LENGTH), + ESP8266_SPI_GET(s, ADDR, OFFSET)); + memcpy(s->flash_image + ESP8266_SPI_GET(s, ADDR, OFFSET), + s->reg + ESP8266_SPI_FLASH_C0, + (ESP8266_SPI_GET(s, ADDR, LENGTH) + 3) & 0x3c); + } } static void esp8266_spi_write_ctrl(Esp8266SpiState *s, hwaddr addr, From afdb2baa7a0779a07186a93f8e95f5be2d6c86d0 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Mon, 18 Jun 2018 17:52:33 +0200 Subject: [PATCH 2/2] esp8266: write operation changes --- hw/xtensa/esp8266.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/xtensa/esp8266.c b/hw/xtensa/esp8266.c index 449d2bc0325..d6582beb018 100644 --- a/hw/xtensa/esp8266.c +++ b/hw/xtensa/esp8266.c @@ -41,7 +41,7 @@ #include "qemu/error-report.h" #include "bootparam.h" -#define DEBUG_LOG(...) // fprintf(stderr, __VA_ARGS__) +#define DEBUG_LOG(...) fprintf(stderr, __VA_ARGS__) #define DEFINE_BITS(prefix, reg, field, shift, len) \ prefix##_##reg##_##field##_SHIFT = shift, \ @@ -436,7 +436,7 @@ static uint64_t esp8266_spi_read(void *opaque, hwaddr addr, unsigned size) } uint32_t ret = 0; - memcpy(&ret, s->reg + ESP8266_SPI_FLASH_C0, size); + memcpy(&ret, &s->reg[addr / 4], size); DEBUG_LOG("0x%08x\n", ret); return ret; } @@ -481,7 +481,7 @@ static void esp8266_spi_cmd(Esp8266SpiState *s, hwaddr addr, ESP8266_SPI_GET(s, ADDR, OFFSET) & 0xffff); memset(s->flash_image + (ESP8266_SPI_GET(s, ADDR, OFFSET) & ~0xffff), 0xff, 65536); } - if (val & ESP8266_SPI_FLASH_CMD_BE) { + if (val & ESP8266_SPI_FLASH_CMD_CE) { DEBUG_LOG("%s: CHIP ERASE\n", __func__); memset(s->flash_image, 0xff, ESP8266_MAX_FLASH_SZ);