diff --git a/ARM/gcc_clang/cmake/coreUtils.cmake b/ARM/gcc_clang/cmake/coreUtils.cmake
index e20cb5c366..5e012bd8f8 100644
--- a/ARM/gcc_clang/cmake/coreUtils.cmake
+++ b/ARM/gcc_clang/cmake/coreUtils.cmake
@@ -201,6 +201,8 @@ function(get_mcu_vendor vendor)
         set(${vendor} mindmotion PARENT_SCOPE)
     elseif(${MCU_NAME} MATCHES "^SN32F.+$")
         set(${vendor} sonix PARENT_SCOPE)
+    elseif(${MCU_NAME} MATCHES "^[MAX|AD].+$")
+        set(${vendor} ad PARENT_SCOPE)
     else()
         message(FATAL_ERROR "${MCU_NAME} not supported in GCC by NECTO.")
     endif()
diff --git a/ARM/gcc_clang/def/R7FA6M2AD2CLK.json b/ARM/gcc_clang/def/R7FA6M2AD2CLK.json
index 8601956d95..bfdcd15305 100644
--- a/ARM/gcc_clang/def/R7FA6M2AD2CLK.json
+++ b/ARM/gcc_clang/def/R7FA6M2AD2CLK.json
@@ -536,7 +536,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1",
                     "key": "PLIDIV",
                     "label": "PLL Input Frequency Division Ratio Select",
                     "mask": "3",
diff --git a/ARM/gcc_clang/def/R7FA6M2AD3CFB.json b/ARM/gcc_clang/def/R7FA6M2AD3CFB.json
index 199c707b27..721a09fc0e 100644
--- a/ARM/gcc_clang/def/R7FA6M2AD3CFB.json
+++ b/ARM/gcc_clang/def/R7FA6M2AD3CFB.json
@@ -536,7 +536,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1",
                     "key": "PLIDIV",
                     "label": "PLL Input Frequency Division Ratio Select",
                     "mask": "3",
diff --git a/ARM/gcc_clang/def/R7FA6M2AD3CFP.json b/ARM/gcc_clang/def/R7FA6M2AD3CFP.json
index 7d64894e87..2ad1856b5e 100644
--- a/ARM/gcc_clang/def/R7FA6M2AD3CFP.json
+++ b/ARM/gcc_clang/def/R7FA6M2AD3CFP.json
@@ -536,7 +536,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1",
                     "key": "PLIDIV",
                     "label": "PLL Input Frequency Division Ratio Select",
                     "mask": "3",
diff --git a/ARM/gcc_clang/def/R7FA6M2AD3CLK.json b/ARM/gcc_clang/def/R7FA6M2AD3CLK.json
index 31758816c7..f1be5ecf72 100644
--- a/ARM/gcc_clang/def/R7FA6M2AD3CLK.json
+++ b/ARM/gcc_clang/def/R7FA6M2AD3CLK.json
@@ -536,7 +536,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1",
                     "key": "PLIDIV",
                     "label": "PLL Input Frequency Division Ratio Select",
                     "mask": "3",
diff --git a/ARM/gcc_clang/def/R7FA6M2AF2CLK.json b/ARM/gcc_clang/def/R7FA6M2AF2CLK.json
index 14f8c0c598..d1e7326893 100644
--- a/ARM/gcc_clang/def/R7FA6M2AF2CLK.json
+++ b/ARM/gcc_clang/def/R7FA6M2AF2CLK.json
@@ -536,7 +536,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1",
                     "key": "PLIDIV",
                     "label": "PLL Input Frequency Division Ratio Select",
                     "mask": "3",
diff --git a/ARM/gcc_clang/def/R7FA6M2AF3CFB.json b/ARM/gcc_clang/def/R7FA6M2AF3CFB.json
index 7952beb717..edb4ceb409 100644
--- a/ARM/gcc_clang/def/R7FA6M2AF3CFB.json
+++ b/ARM/gcc_clang/def/R7FA6M2AF3CFB.json
@@ -536,7 +536,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1",
                     "key": "PLIDIV",
                     "label": "PLL Input Frequency Division Ratio Select",
                     "mask": "3",
diff --git a/ARM/gcc_clang/def/R7FA6M2AF3CFP.json b/ARM/gcc_clang/def/R7FA6M2AF3CFP.json
index 1c60589c4b..4ea9909fe5 100644
--- a/ARM/gcc_clang/def/R7FA6M2AF3CFP.json
+++ b/ARM/gcc_clang/def/R7FA6M2AF3CFP.json
@@ -536,7 +536,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1",
                     "key": "PLIDIV",
                     "label": "PLL Input Frequency Division Ratio Select",
                     "mask": "3",
diff --git a/ARM/gcc_clang/def/R7FA6M2AF3CLK.json b/ARM/gcc_clang/def/R7FA6M2AF3CLK.json
index 20bd9400ac..c670fb37ca 100644
--- a/ARM/gcc_clang/def/R7FA6M2AF3CLK.json
+++ b/ARM/gcc_clang/def/R7FA6M2AF3CLK.json
@@ -536,7 +536,7 @@
                 },
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1",
                     "key": "PLIDIV",
                     "label": "PLL Input Frequency Division Ratio Select",
                     "mask": "3",
diff --git a/ARM/gcc_clang/def/R7FA6T3BB3CFJ.json b/ARM/gcc_clang/def/R7FA6T3BB3CFJ.json
index d2ee25f0c2..1ce15c0ea4 100644
--- a/ARM/gcc_clang/def/R7FA6T3BB3CFJ.json
+++ b/ARM/gcc_clang/def/R7FA6T3BB3CFJ.json
@@ -729,7 +729,7 @@
             "fields": [
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "2",
                     "key": "I3CCKDIV",
                     "label": "I3C clock (I3CCLK) division select",
                     "mask": "7",
diff --git a/ARM/gcc_clang/def/R7FA6T3BB3CFL.json b/ARM/gcc_clang/def/R7FA6T3BB3CFL.json
index 230da4309c..019aa9da73 100644
--- a/ARM/gcc_clang/def/R7FA6T3BB3CFL.json
+++ b/ARM/gcc_clang/def/R7FA6T3BB3CFL.json
@@ -729,7 +729,7 @@
             "fields": [
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "2",
                     "key": "I3CCKDIV",
                     "label": "I3C clock (I3CCLK) division select",
                     "mask": "7",
diff --git a/ARM/gcc_clang/def/R7FA6T3BB3CFM.json b/ARM/gcc_clang/def/R7FA6T3BB3CFM.json
index b3b6ace03f..21f2b20ee1 100644
--- a/ARM/gcc_clang/def/R7FA6T3BB3CFM.json
+++ b/ARM/gcc_clang/def/R7FA6T3BB3CFM.json
@@ -729,7 +729,7 @@
             "fields": [
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "2",
                     "key": "I3CCKDIV",
                     "label": "I3C clock (I3CCLK) division select",
                     "mask": "7",
diff --git a/ARM/gcc_clang/def/R7FA6T3BB3CNE.json b/ARM/gcc_clang/def/R7FA6T3BB3CNE.json
index 4138751123..d79c354613 100644
--- a/ARM/gcc_clang/def/R7FA6T3BB3CNE.json
+++ b/ARM/gcc_clang/def/R7FA6T3BB3CNE.json
@@ -729,7 +729,7 @@
             "fields": [
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "2",
                     "key": "I3CCKDIV",
                     "label": "I3C clock (I3CCLK) division select",
                     "mask": "7",
diff --git a/ARM/gcc_clang/def/R7FA6T3BB3CNH.json b/ARM/gcc_clang/def/R7FA6T3BB3CNH.json
index 56be998578..a3d6f569e8 100644
--- a/ARM/gcc_clang/def/R7FA6T3BB3CNH.json
+++ b/ARM/gcc_clang/def/R7FA6T3BB3CNH.json
@@ -729,7 +729,7 @@
             "fields": [
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "2",
                     "key": "I3CCKDIV",
                     "label": "I3C clock (I3CCLK) division select",
                     "mask": "7",
diff --git a/ARM/gcc_clang/def/R7FA8E1AFDCFB.json b/ARM/gcc_clang/def/R7FA8E1AFDCFB.json
index 11ead852a3..ebb487f8b4 100644
--- a/ARM/gcc_clang/def/R7FA8E1AFDCFB.json
+++ b/ARM/gcc_clang/def/R7FA8E1AFDCFB.json
@@ -407,7 +407,7 @@
             "fields": [
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1",
                     "key": "CPUCK",
                     "label": "CPU Clock (CPUCLK) Select",
                     "mask": "f",
diff --git a/ARM/gcc_clang/def/R7FA8E1AFDCFP.json b/ARM/gcc_clang/def/R7FA8E1AFDCFP.json
index 2fc01bf1ed..2460e8004b 100644
--- a/ARM/gcc_clang/def/R7FA8E1AFDCFP.json
+++ b/ARM/gcc_clang/def/R7FA8E1AFDCFP.json
@@ -407,7 +407,7 @@
             "fields": [
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1",
                     "key": "CPUCK",
                     "label": "CPU Clock (CPUCLK) Select",
                     "mask": "f",
diff --git a/ARM/gcc_clang/def/R7FA8E2AFDCBD.json b/ARM/gcc_clang/def/R7FA8E2AFDCBD.json
index 292846b088..616127d92a 100644
--- a/ARM/gcc_clang/def/R7FA8E2AFDCBD.json
+++ b/ARM/gcc_clang/def/R7FA8E2AFDCBD.json
@@ -407,7 +407,7 @@
             "fields": [
                 {
                     "hidden": false,
-                    "init": "0",
+                    "init": "1",
                     "key": "CPUCK",
                     "label": "CPU Clock (CPUCLK) Select",
                     "mask": "f",