runtime/platforms/impala/intrinsics_thorin.impala at 3c6e9a407dda298aa4a0baede9eb9a3f02820ca3 · AnyDSL/runtime · GitHub

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extern "thorin" {
    fn pe_info[T](&[u8], T) -> ();

    fn alignof[T]() -> i64;
    fn sizeof[T]() -> i64;
    fn undef[T]() -> T;

    fn bitcast[D, S](S) -> D;
    fn select[T, U](T, U, U) -> U;
    fn insert[T, U](T, i32, U) -> T;
    //fn shuffle[T](T, T, T) -> T;

    fn "cuda" cuda_with_lmem(i32, (i32, i32, i32), (i32, i32, i32), i32, fn() -> ()) -> ();
    fn "nvvm" nvvm_with_lmem(i32, (i32, i32, i32), (i32, i32, i32), i32, fn() -> ()) -> ();
    fn "opencl" opencl_with_lmem(i32, (i32, i32, i32), (i32, i32, i32), i32, fn() -> ()) -> ();
    fn "amdgpu_hsa" amdgpu_hsa_with_lmem(i32, (i32, i32, i32), (i32, i32, i32), i32, fn() -> ()) -> ();
    fn "amdgpu_pal" amdgpu_pal_with_lmem(i32, (i32, i32, i32), (i32, i32, i32), i32, fn() -> ()) -> ();
    fn local_memory_base() -> &mut[3][u8];
    fn reserve_shared[T](i32) -> &mut[3][T];

    fn hls(dev: i32, body: fn() -> ()) -> ();
    fn pipeline(i32, i32, i32, fn(i32) -> ()) -> (); // only for HLS/OpenCL backend
    fn parallel(num_threads: i32, lower: i32, upper: i32, body: fn(i32) -> ()) -> ();
    fn spawn(body: fn() -> ()) -> i32;
    fn sync(id: i32) -> ();

    fn atomic[T](binop: u32, addr: &mut T, val: T, order: u32, scope: &[u8]) -> T; // Xchg Add Sub And Nand Or Xor Max Min UMax UMin FAdd FSub
    fn atomic_load[T](addr: &T, order: u32, scope: &[u8]) -> T;
    fn atomic_store[T](addr: &mut T, val: T, order: u32, scope: &[u8]) -> ();
    fn cmpxchg[T](addr: &mut T, cmp: T, new: T, success_order: u32, failure_order: u32, scope: &[u8]) -> (T, bool); // only for integer data types
    fn cmpxchg_weak[T](addr: &mut T, cmp: T, new: T, success_order: u32, failure_order: u32, scope: &[u8]) -> (T, bool); // only for integer data types
    fn fence(order: u32, scope: &[u8]) -> ();

    fn "atomic" atomic_p1[T](binop: u32, addr: &mut [1]T, val: T, order: u32, scope: &[u8]) -> T;
    fn "atomic" atomic_p3[T](binop: u32, addr: &mut [3]T, val: T, order: u32, scope: &[u8]) -> T;
    fn "atomic_load" atomic_load_p1[T](addr: &[1]T, order: u32, scope: &[u8]) -> T;
    fn "atomic_load" atomic_load_p3[T](addr: &[3]T, order: u32, scope: &[u8]) -> T;
    fn "atomic_store" atomic_store_p1[T](addr: &mut [1]T, val: T, order: u32, scope: &[u8]) -> ();
    fn "atomic_store" atomic_store_p3[T](addr: &mut [3]T, val: T, order: u32, scope: &[u8]) -> ();
    fn "cmpxchg" cmpxchg_p1[T](addr: &mut [1]T, cmp: T, new: T, success_order: u32, failure_order: u32, scope: &[u8]) -> (T, bool);
    fn "cmpxchg" cmpxchg_p3[T](addr: &mut [3]T, cmp: T, new: T, success_order: u32, failure_order: u32, scope: &[u8]) -> (T, bool);
    fn "cmpxchg_weak" cmpxchg_weak_p1[T](addr: &mut [1]T, cmp: T, new: T, success_order: u32, failure_order: u32, scope: &[u8]) -> (T, bool);
    fn "cmpxchg_weak" cmpxchg_weak_p3[T](addr: &mut [3]T, cmp: T, new: T, success_order: u32, failure_order: u32, scope: &[u8]) -> (T, bool);

    fn vectorize(vector_length: i32, body: fn(i32) -> ()) -> ();
}

fn @cuda(dev: i32, grid: (i32, i32, i32), block: (i32, i32, i32), body: fn() -> ()) { cuda_with_lmem(dev, grid, block, 0, body) }
fn @nvvm(dev: i32, grid: (i32, i32, i32), block: (i32, i32, i32), body: fn() -> ()) { nvvm_with_lmem(dev, grid, block, 0, body) }
fn @opencl(dev: i32, grid: (i32, i32, i32), block: (i32, i32, i32), body: fn() -> ()) { opencl_with_lmem(dev, grid, block, 0, body) }
fn @amdgpu_hsa(dev: i32, grid: (i32, i32, i32), block: (i32, i32, i32), body: fn() -> ()) { amdgpu_hsa_with_lmem(dev, grid, block, 0, body) }
fn @amdgpu_pal(dev: i32, grid: (i32, i32, i32), block: (i32, i32, i32), body: fn() -> ()) { amdgpu_pal_with_lmem(dev, grid, block, 0, body) }