diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..85e7c1d --- /dev/null +++ b/.gitignore @@ -0,0 +1 @@ +/.idea/ diff --git a/16550.yaml b/16550.yaml index ee75571..d598077 100644 --- a/16550.yaml +++ b/16550.yaml @@ -1,144 +1,143 @@ ---- -description: "Universal asynchronous receiver-transmitter with FIFOs" -aliases: ["16C550"] -package: DIP -pincount: 40 -family: "uart" -datasheet: "http://www.national.com/ds/PC/PC16550D.pdf" +description: 'Universal asynchronous receiver-transmitter with FIFOs' +aliases: + - 16C550 +family: uart +datasheet: 'http://www.national.com/ds/PC/PC16550D.pdf' pins: - - num: 1 - sym: D__0 - desc: data bus - - num: 2 - sym: D__1 - desc: data bus - - num: 3 - sym: D__2 - desc: data bus - - num: 4 - sym: D__3 - desc: data bus - - num: 5 - sym: D__4 - desc: data bus - - num: 6 - sym: D__5 - desc: data bus - - num: 7 - sym: D__6 - desc: data bus - - num: 8 - sym: D__7 - desc: data bus - - num: 9 - sym: RCLK - desc: receiver clock input (16x baud rate) - - num: 10 - sym: RX - desc: serial input - - num: 11 - sym: TX - desc: serial output - - num: 12 - sym: CS0 - desc: chip select (active high) - - num: 13 - sym: CS1 - desc: chip select (active high) - - num: 14 - sym: ~CS2 - desc: chip select (active low) - - num: 15 - sym: ~BAUDOUT - desc: baud rate generator output - - num: 16 - sym: XIN - desc: external crystal input - - num: 17 - sym: XOUT - desc: external crystal output - - num: 18 - sym: ~WR - desc: write enable (active low) - - num: 19 - sym: WR - desc: write enable (active high) - - num: 20 - sym: GND + 'D__0': + desc: 'data bus' + 'D__1': + desc: 'data bus' + 'D__2': + desc: 'data bus' + 'D__3': + desc: 'data bus' + 'D__4': + desc: 'data bus' + 'D__5': + desc: 'data bus' + 'D__6': + desc: 'data bus' + 'D__7': + desc: 'data bus' + RCLK: + desc: 'receiver clock input (16x baud rate)' + RX: + desc: 'serial input' + TX: + desc: 'serial output' + CS0: + desc: 'chip select (active high)' + CS1: + desc: 'chip select (active high)' + '~CS2': + desc: 'chip select (active low)' + '~BAUDOUT': + desc: 'baud rate generator output' + XIN: + desc: 'external crystal input' + XOUT: + desc: 'external crystal output' + '~WR': + desc: 'write enable (active low)' + WR: + desc: 'write enable (active high)' + GND: desc: ground - - num: 21 - sym: ~RD - desc: read enable (active low) - - num: 22 - sym: RD - desc: read enable (active high) - - num: 23 - sym: DDIS - desc: driver disable - - num: 24 - sym: ~TXRDY - desc: TX DMA signal - - num: 25 - sym: ~ADS - desc: address strobe input - - num: 26 - sym: A__2 - desc: register select - - num: 27 - sym: A__1 - desc: register select - - num: 28 - sym: A__0 - desc: register select - - num: 29 - sym: ~RXRDY - desc: RX DMA signal - - num: 30 - sym: INTR - desc: interrupt output (active high) - - num: 31 - sym: ~OUT2 - desc: general purpose output - - num: 32 - sym: ~RTS - desc: request to send (output to modem) - - num: 33 - sym: ~DTR - desc: data terminal ready (output to modem) - - num: 34 - sym: ~OUT1 - desc: general purpose output - - num: 35 - sym: MR - desc: master reset (active high) - - num: 36 - sym: ~CTS - desc: clear to send (input from modem) - - num: 37 - sym: ~DSR - desc: data set ready (input from modem) - - num: 38 - sym: ~DCD - desc: data carrier detect (input from modem) - - num: 39 - sym: ~RI - desc: ring indicator (input from modem) - - num: 40 - sym: Vcc - desc: supply voltage + '~RD': + desc: 'read enable (active low)' + RD: + desc: 'read enable (active high)' + DDIS: + desc: 'driver disable' + '~TXRDY': + desc: 'TX DMA signal' + '~ADS': + desc: 'address strobe input' + 'A__2': + desc: 'register select' + 'A__1': + desc: 'register select' + 'A__0': + desc: 'register select' + '~RXRDY': + desc: 'RX DMA signal' + INTR: + desc: 'interrupt output (active high)' + '~OUT2': + desc: 'general purpose output' + '~RTS': + desc: 'request to send (output to modem)' + '~DTR': + desc: 'data terminal ready (output to modem)' + '~OUT1': + desc: 'general purpose output' + MR: + desc: 'master reset (active high)' + '~CTS': + desc: 'clear to send (input from modem)' + '~DSR': + desc: 'data set ready (input from modem)' + '~DCD': + desc: 'data carrier detect (input from modem)' + '~RI': + desc: 'ring indicator (input from modem)' + Vcc: + desc: 'supply voltage' specs: - - param: "maximum baud rate" - val: 1.5 - unit: Mbaud + - + param: 'maximum baud rate' + val: '1.5' + unit: Mbaud notes: - - "Register 000: receive buffer (read), transmit holding register (write)" - - "Register 001: interrupt enable" - - "Register 010: interrupt identification (read), FIFO control (write)" - - "Register 011: line control" - - "Register 100: modem control" - - "Register 101: line status" - - "Register 110: modem status" - - "Register 111: scratch register" - - "When bit 7 in the Line Control Register is set, the baud rate divisor latch is enabled. (register 000=LSB, register 001=MSB)" -... - + - 'Register 000: receive buffer (read), transmit holding register (write)' + - 'Register 001: interrupt enable' + - 'Register 010: interrupt identification (read), FIFO control (write)' + - 'Register 011: line control' + - 'Register 100: modem control' + - 'Register 101: line status' + - 'Register 110: modem status' + - 'Register 111: scratch register' + - 'When bit 7 in the Line Control Register is set, the baud rate divisor latch is enabled. (register 000=LSB, register 001=MSB)' +packages: + DIP: + - 'D__0' + - 'D__1' + - 'D__2' + - 'D__3' + - 'D__4' + - 'D__5' + - 'D__6' + - 'D__7' + - RCLK + - RX + - TX + - CS0 + - CS1 + - '~CS2' + - '~BAUDOUT' + - XIN + - XOUT + - '~WR' + - WR + - GND + - '~RD' + - RD + - DDIS + - '~TXRDY' + - '~ADS' + - 'A__2' + - 'A__1' + - 'A__0' + - '~RXRDY' + - INTR + - '~OUT2' + - '~RTS' + - '~DTR' + - '~OUT1' + - MR + - '~CTS' + - '~DSR' + - '~DCD' + - '~RI' + - Vcc diff --git a/1802.yaml b/1802.yaml index 8b5d1f5..fcbfd70 100644 --- a/1802.yaml +++ b/1802.yaml @@ -1,142 +1,144 @@ ---- -description: "CDP1802 CMOS 8-bit microprocessor" -aliases: [ "CDP1802A", "CDP1802AC", "CDP1802BC" ] -package: DIP -pincount: 40 -family: "RCA" -datasheet: "pdf_datasheet_url" +description: 'CDP1802 CMOS 8-bit microprocessor' +aliases: + - CDP1802A + - CDP1802AC + - CDP1802BC +family: RCA +datasheet: 'pdf_datasheet_url' pins: - - num: 1 - sym: CLOCK - desc: input for externally generated single-phase clock - - num: 2 - sym: ~WAIT~ - desc: control line - - num: 3 - sym: ~CLEAR~ - desc: control line - - num: 4 - sym: Q - desc: general output - - num: 5 - sym: SC1 - desc: state code - - num: 6 - sym: SC0 - desc: state code - - num: 7 - sym: ~MRD~ - desc: read pulse - - num: 8 - sym: BUS 7 - desc: data bus - - num: 9 - sym: BUS 6 - desc: data bus - - num: 10 - sym: BUS 5 - desc: data bus - - num: 11 - sym: BUS 4 - desc: data bus - - num: 12 - sym: BUS 3 - desc: data bus - - num: 13 - sym: BUS 2 - desc: data bus - - num: 14 - sym: BUS 1 - desc: data bus - - num: 15 - sym: BUS 0 - desc: data bus - - num: 16 - sym: V__CC - desc: I/O voltage supply - - num: 17 - sym: N2 - desc: I/O control line - - num: 18 - sym: N1 - desc: I/O control line - - num: 19 - sym: N0 - desc: I/O control line - - num: 20 - sym: V__SS + CLOCK: + desc: 'input for externally generated single-phase clock' + '~WAIT~': + desc: 'control line' + '~CLEAR~': + desc: 'control line' + Q: + desc: 'general output' + SC1: + desc: 'state code' + SC0: + desc: 'state code' + '~MRD~': + desc: 'read pulse' + 'BUS 7': + desc: 'data bus' + 'BUS 6': + desc: 'data bus' + 'BUS 5': + desc: 'data bus' + 'BUS 4': + desc: 'data bus' + 'BUS 3': + desc: 'data bus' + 'BUS 2': + desc: 'data bus' + 'BUS 1': + desc: 'data bus' + 'BUS 0': + desc: 'data bus' + 'V__CC': + desc: 'I/O voltage supply' + N2: + desc: 'I/O control line' + N1: + desc: 'I/O control line' + N0: + desc: 'I/O control line' + 'V__SS': desc: ground - - num: 21 - sym: ~EF4~ - desc: I/O flag - - num: 22 - sym: ~EF3~ - desc: I/O flag - - num: 23 - sym: ~EF2~ - desc: I/O flag - - num: 24 - sym: ~EF1~ - desc: I/O flag - - num: 25 - sym: MA0 - desc: memory address - - num: 26 - sym: MA1 - desc: memory address - - num: 27 - sym: MA2 - desc: memory address - - num: 28 - sym: MA3 - desc: memory address - - num: 29 - sym: MA4 - desc: memory address - - num: 30 - sym: MA5 - desc: memory address - - num: 31 - sym: MA6 - desc: memory address - - num: 32 - sym: MA7 - desc: memory address - - num: 33 - sym: TPB - desc: timing pulse - - num: 34 - sym: TPA - desc: timing pulse - - num: 35 - sym: ~MWR~ - desc: write pulse - - num: 36 - sym: ~INTERRUPT~ + '~EF4~': + desc: 'I/O flag' + '~EF3~': + desc: 'I/O flag' + '~EF2~': + desc: 'I/O flag' + '~EF1~': + desc: 'I/O flag' + MA0: + desc: 'memory address' + MA1: + desc: 'memory address' + MA2: + desc: 'memory address' + MA3: + desc: 'memory address' + MA4: + desc: 'memory address' + MA5: + desc: 'memory address' + MA6: + desc: 'memory address' + MA7: + desc: 'memory address' + TPB: + desc: 'timing pulse' + TPA: + desc: 'timing pulse' + '~MWR~': + desc: 'write pulse' + '~INTERRUPT~': desc: interrupt - - num: 37 - sym: ~DMA_OUT~ - desc: DMA out - - num: 38 - sym: ~DMA_IN~ - desc: DMA in - - num: 39 - sym: ~XTAL~ - desc: crystal input, for on-chip oscillator - - num: 40 - sym: V__DD - desc: internal voltage supply + '~DMA_OUT~': + desc: 'DMA out' + '~DMA_IN~': + desc: 'DMA in' + '~XTAL~': + desc: 'crystal input, for on-chip oscillator' + 'V__DD': + desc: 'internal voltage supply' specs: - - param: "Maximum input clock maximum frequency at 5V" - val: 3.2 - unit: MHz - - param: "Maximum input clock maximum frequency at 10V" - val: 6.4 - unit: MHz - - param: "Minimum instruction fetch-execute time at 5V" - val: 5.0 - unit: "µs" -notes: -... - - + - + param: 'Maximum input clock maximum frequency at 5V' + val: '3.2' + unit: MHz + - + param: 'Maximum input clock maximum frequency at 10V' + val: '6.4' + unit: MHz + - + param: 'Minimum instruction fetch-execute time at 5V' + val: '5' + unit: 'µs' +notes: { } +packages: + DIP: + - CLOCK + - '~WAIT~' + - '~CLEAR~' + - Q + - SC1 + - SC0 + - '~MRD~' + - 'BUS 7' + - 'BUS 6' + - 'BUS 5' + - 'BUS 4' + - 'BUS 3' + - 'BUS 2' + - 'BUS 1' + - 'BUS 0' + - 'V__CC' + - N2 + - N1 + - N0 + - 'V__SS' + - '~EF4~' + - '~EF3~' + - '~EF2~' + - '~EF1~' + - MA0 + - MA1 + - MA2 + - MA3 + - MA4 + - MA5 + - MA6 + - MA7 + - TPB + - TPA + - '~MWR~' + - '~INTERRUPT~' + - '~DMA_OUT~' + - '~DMA_IN~' + - '~XTAL~' + - 'V__DD' diff --git a/24LC256.yaml b/24LC256.yaml index 3ebbcce..90f8f93 100644 --- a/24LC256.yaml +++ b/24LC256.yaml @@ -1,47 +1,57 @@ ---- -description: "256K I2C CMOS serial EEPROM" -aliases: [24AA256, 24FC256] -package: DIP -pincount: 8 -family: Microchip -datasheet: "http://ww1.microchip.com/downloads/en/DeviceDoc/21203P.pdf" +description: '256K I2C CMOS serial EEPROM' +aliases: + - 24AA256 + - 24FC256 +family: Microchip +datasheet: 'http://ww1.microchip.com/downloads/en/DeviceDoc/21203P.pdf' pins: - - num: 1 - sym: A0 - desc: user-configurable chip select - - num: 2 - sym: A1 - desc: user-configurable chip select - - num: 3 - sym: A2 - desc: user-configurable chip select - - num: 4 - sym: GND + A0: + desc: 'user-configurable chip select' + A1: + desc: 'user-configurable chip select' + A2: + desc: 'user-configurable chip select' + GND: desc: ground - - num: 5 - sym: SDA - desc: serial data input/output - - num: 6 - sym: SCL - desc: serial clock input - - num: 7 - sym: WP - desc: write protect (active high) - - num: 8 - sym: Vcc - desc: supply voltage + SDA: + desc: 'serial data input/output' + SCL: + desc: 'serial clock input' + WP: + desc: 'write protect (active high)' + Vcc: + desc: 'supply voltage' specs: - - param: Minimum supply voltage - val: [1.7 (24AA256), 2.5 (24LC256), 1.7 (24FC256)] - unit: V - - param: Maximum clock frequency - val: [100k (Vcc < 2.5V), 400k (24AA256), 400k (24LC256), 1M (24FC256)] - unit: Hz - - param: Maximum write cycle time - val: 5 - unit: ms - - param: Endurance - val: 1 000 000 - unit: cycles -... - + - + param: 'Minimum supply voltage' + val: + - '1.7 (24AA256)' + - '2.5 (24LC256)' + - '1.7 (24FC256)' + unit: V + - + param: 'Maximum clock frequency' + val: + - '100k (Vcc < 2.5V)' + - '400k (24AA256)' + - '400k (24LC256)' + - '1M (24FC256)' + unit: Hz + - + param: 'Maximum write cycle time' + val: '5' + unit: ms + - + param: Endurance + val: '1 000 000' + unit: cycles +packages: + DIP: + - A0 + - A1 + - A2 + - GND + - SDA + - SCL + - WP + - Vcc diff --git a/28C64.yaml b/28C64.yaml index 4630fbd..fd0573f 100644 --- a/28C64.yaml +++ b/28C64.yaml @@ -1,95 +1,89 @@ ---- -description: "8K x 8 parallel EEPROM" -aliases: [] -package: DIP -pincount: 28 -family: "memory" -datasheet: "http://www.atmel.com/dyn/resources/prod_documents/doc0001H.pdf" +description: '8K x 8 parallel EEPROM' +aliases: { } +family: memory +datasheet: 'http://www.atmel.com/dyn/resources/prod_documents/doc0001H.pdf' pins: - - num: 1 - sym: RDY/~BUSY~ - desc: device status - - num: 2 - sym: A__12 - desc: address input - - num: 3 - sym: A__7 - desc: address input - - num: 4 - sym: A__6 - desc: address input - - num: 5 - sym: A__5 - desc: address input - - num: 6 - sym: A__4 - desc: address input - - num: 7 - sym: A__3 - desc: address input - - num: 8 - sym: A__2 - desc: address input - - num: 9 - sym: A__1 - desc: address input - - num: 10 - sym: A__0 - desc: address input - - num: 11 - sym: I/O__0 - desc: data input/output - - num: 12 - sym: I/O__1 - desc: data input/output - - num: 13 - sym: I/O__2 - desc: data input/output - - num: 14 - sym: GND + 'RDY/~BUSY~': + desc: 'device status' + 'A__12': + desc: 'address input' + 'A__7': + desc: 'address input' + 'A__6': + desc: 'address input' + 'A__5': + desc: 'address input' + 'A__4': + desc: 'address input' + 'A__3': + desc: 'address input' + 'A__2': + desc: 'address input' + 'A__1': + desc: 'address input' + 'A__0': + desc: 'address input' + 'I/O__0': + desc: 'data input/output' + 'I/O__1': + desc: 'data input/output' + 'I/O__2': + desc: 'data input/output' + GND: desc: ground - - num: 15 - sym: I/O__3 - desc: data input/output - - num: 16 - sym: I/O__4 - desc: data input/output - - num: 17 - sym: I/O__5 - desc: data input/output - - num: 18 - sym: I/O__6 - desc: data input/output - - num: 19 - sym: I/O__7 - desc: data input/output - - num: 20 - sym: ~CE - desc: chip enable (active low) - - num: 21 - sym: A__10 - desc: address input - - num: 22 - sym: ~OE - desc: output enable (active low) - - num: 23 - sym: A__11 - desc: address input - - num: 24 - sym: A__9 - desc: address input - - num: 25 - sym: A__8 - desc: address input - - num: 26 - sym: NC - desc: no connection - - num: 27 - sym: ~WE - desc: write enable (active low) - - num: 28 - sym: Vcc - desc: supply voltage -... - - + 'I/O__3': + desc: 'data input/output' + 'I/O__4': + desc: 'data input/output' + 'I/O__5': + desc: 'data input/output' + 'I/O__6': + desc: 'data input/output' + 'I/O__7': + desc: 'data input/output' + '~CE': + desc: 'chip enable (active low)' + 'A__10': + desc: 'address input' + '~OE': + desc: 'output enable (active low)' + 'A__11': + desc: 'address input' + 'A__9': + desc: 'address input' + 'A__8': + desc: 'address input' + '~WE': + desc: 'write enable (active low)' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 'RDY/~BUSY~' + - 'A__12' + - 'A__7' + - 'A__6' + - 'A__5' + - 'A__4' + - 'A__3' + - 'A__2' + - 'A__1' + - 'A__0' + - 'I/O__0' + - 'I/O__1' + - 'I/O__2' + - GND + - 'I/O__3' + - 'I/O__4' + - 'I/O__5' + - 'I/O__6' + - 'I/O__7' + - '~CE' + - 'A__10' + - '~OE' + - 'A__11' + - 'A__9' + - 'A__8' + - NC + - '~WE' + - Vcc diff --git a/4001.yaml b/4001.yaml index a1d7256..cb0a603 100644 --- a/4001.yaml +++ b/4001.yaml @@ -1,51 +1,48 @@ ---- -description: Quad 2-input NOR gate -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4001b.pdf" +description: 'Quad 2-input NOR gate' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4001b.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: 1Y - desc: data output - - num: 4 - sym: 2Y - desc: data output - - num: 5 - sym: 2A - desc: data input - - num: 6 - sym: 2B - desc: data input - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1Y: + desc: 'data output' + 2Y: + desc: 'data output' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + GND: desc: ground - - num: 8 - sym: 3A - desc: data input - - num: 9 - sym: 3B - desc: data input - - num: 10 - sym: 3Y - desc: data output - - num: 11 - sym: 4Y - desc: data output - - num: 12 - sym: 4A - desc: data input - - num: 13 - sym: 4B - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage -... - + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3Y: + desc: 'data output' + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 4B: + desc: 'data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 1A + - 1B + - 1Y + - 2Y + - 2A + - 2B + - GND + - 3A + - 3B + - 3Y + - 4Y + - 4A + - 4B + - Vcc diff --git a/4002.yaml b/4002.yaml index 9b71780..20108c9 100644 --- a/4002.yaml +++ b/4002.yaml @@ -1,51 +1,44 @@ ---- -description: Dual 4-input NOR gate -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4002b.pdf" +description: 'Dual 4-input NOR gate' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4002b.pdf' pins: - - num: 1 - sym: 1Y - desc: data output - - num: 2 - sym: 1A - desc: data input - - num: 3 - sym: 1B - desc: data input - - num: 4 - sym: 1C - desc: data input - - num: 5 - sym: 1D - desc: data input - - num: 6 - sym: NC - desc: no connection - - num: 7 - sym: GND + 1Y: + desc: 'data output' + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1C: + desc: 'data input' + 1D: + desc: 'data input' + GND: desc: ground - - num: 8 - sym: NC - desc: no connection - - num: 9 - sym: 2A - desc: data input - - num: 10 - sym: 2B - desc: data input - - num: 11 - sym: 2C - desc: data input - - num: 12 - sym: 2D - desc: data input - - num: 13 - sym: 2Y - desc: data output - - num: 14 - sym: Vcc - desc: supply voltage -... - + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 2C: + desc: 'data input' + 2D: + desc: 'data input' + 2Y: + desc: 'data output' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 1Y + - 1A + - 1B + - 1C + - 1D + - NC + - GND + - NC + - 2A + - 2B + - 2C + - 2D + - 2Y + - Vcc diff --git a/40106.yaml b/40106.yaml index d9893b1..f1c993f 100644 --- a/40106.yaml +++ b/40106.yaml @@ -1,51 +1,48 @@ ---- -description: Hex inverting Schmitt trigger -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef40106b.pdf" +description: 'Hex inverting Schmitt trigger' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef40106b.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1Y - desc: data output - - num: 3 - sym: 2A - desc: data input - - num: 4 - sym: 2Y - desc: data output - - num: 5 - sym: 3A - desc: data input - - num: 6 - sym: 3Y - desc: data output - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1Y: + desc: 'data output' + 2A: + desc: 'data input' + 2Y: + desc: 'data output' + 3A: + desc: 'data input' + 3Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 4Y - desc: data output - - num: 9 - sym: 4A - desc: data input - - num: 10 - sym: 5Y - desc: data output - - num: 11 - sym: 5A - desc: data input - - num: 12 - sym: 6Y - desc: data output - - num: 13 - sym: 6A - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage -... - + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 5Y: + desc: 'data output' + 5A: + desc: 'data input' + 6Y: + desc: 'data output' + 6A: + desc: 'data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 1A + - 1Y + - 2A + - 2Y + - 3A + - 3Y + - GND + - 4Y + - 4A + - 5Y + - 5A + - 6Y + - 6A + - Vcc diff --git a/4011.yaml b/4011.yaml index 4efeb17..3a19e2b 100644 --- a/4011.yaml +++ b/4011.yaml @@ -1,51 +1,48 @@ ---- -description: Quad 2-input NAND gate -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4011b.pdf" +description: 'Quad 2-input NAND gate' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4011b.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: 1Y - desc: data output - - num: 4 - sym: 2Y - desc: data output - - num: 5 - sym: 2A - desc: data input - - num: 6 - sym: 2B - desc: data input - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1Y: + desc: 'data output' + 2Y: + desc: 'data output' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + GND: desc: ground - - num: 8 - sym: 3A - desc: data input - - num: 9 - sym: 3B - desc: data input - - num: 10 - sym: 3Y - desc: data output - - num: 11 - sym: 4Y - desc: data output - - num: 12 - sym: 4A - desc: data input - - num: 13 - sym: 4B - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage -... - + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3Y: + desc: 'data output' + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 4B: + desc: 'data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 1A + - 1B + - 1Y + - 2Y + - 2A + - 2B + - GND + - 3A + - 3B + - 3Y + - 4Y + - 4A + - 4B + - Vcc diff --git a/4013.yaml b/4013.yaml index 1f9c88b..0f2b375 100644 --- a/4013.yaml +++ b/4013.yaml @@ -1,51 +1,48 @@ ---- -description: Dual D-type flip-flop with set and clear -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4013b.pdf" +description: 'Dual D-type flip-flop with set and clear' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4013b.pdf' pins: - - num: 1 - sym: 1Q - desc: true output - - num: 2 - sym: 1~Q - desc: complement output - - num: 3 - sym: 1CP - desc: clock input (low-to-high edge-triggered) - - num: 4 - sym: 1CD - desc: asynchronous clear-direct input - - num: 5 - sym: 1D - desc: data input - - num: 6 - sym: 1SD - desc: asynchronous set-direct input - - num: 7 - sym: GND + 1Q: + desc: 'true output' + '1~Q': + desc: 'complement output' + 1CP: + desc: 'clock input (low-to-high edge-triggered)' + 1CD: + desc: 'asynchronous clear-direct input' + 1D: + desc: 'data input' + 1SD: + desc: 'asynchronous set-direct input' + GND: desc: ground - - num: 8 - sym: 2SD - desc: asynchronous set-direct input - - num: 9 - sym: 2D - desc: data input - - num: 10 - sym: 2CD - desc: asynchronous clear-direct input - - num: 11 - sym: 2CP - desc: clock input (low-to-high edge-triggered) - - num: 12 - sym: 2~Q - desc: complement output - - num: 13 - sym: 2Q - desc: true output - - num: 14 - sym: Vcc - desc: supply voltage -... - + 2SD: + desc: 'asynchronous set-direct input' + 2D: + desc: 'data input' + 2CD: + desc: 'asynchronous clear-direct input' + 2CP: + desc: 'clock input (low-to-high edge-triggered)' + '2~Q': + desc: 'complement output' + 2Q: + desc: 'true output' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 1Q + - '1~Q' + - 1CP + - 1CD + - 1D + - 1SD + - GND + - 2SD + - 2D + - 2CD + - 2CP + - '2~Q' + - 2Q + - Vcc diff --git a/4014.yaml b/4014.yaml index 5e9d7b0..62b7b0d 100644 --- a/4014.yaml +++ b/4014.yaml @@ -1,57 +1,54 @@ ---- -description: 8-bit static shift register -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4014b.pdf" +description: '8-bit static shift register' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4014b.pdf' pins: - - num: 1 - sym: D7 - desc: parallel data input - - num: 2 - sym: Q5 + D7: + desc: 'parallel data input' + Q5: desc: output - - num: 3 - sym: Q7 + Q7: desc: output - - num: 4 - sym: D3 - desc: parallel data input - - num: 5 - sym: D2 - desc: parallel data input - - num: 6 - sym: D1 - desc: parallel data input - - num: 7 - sym: D0 - desc: parallel data input - - num: 8 - sym: GND + D3: + desc: 'parallel data input' + D2: + desc: 'parallel data input' + D1: + desc: 'parallel data input' + D0: + desc: 'parallel data input' + GND: desc: ground - - num: 9 - sym: PE - desc: parallel enable input - - num: 10 - sym: CP - desc: clock input (low-to-high edge-triggered) - - num: 11 - sym: DS - desc: serial data input - - num: 12 - sym: Q6 + PE: + desc: 'parallel enable input' + CP: + desc: 'clock input (low-to-high edge-triggered)' + DS: + desc: 'serial data input' + Q6: desc: output - - num: 13 - sym: D4 - desc: parallel data input - - num: 14 - sym: D5 - desc: parallel data input - - num: 15 - sym: D6 - desc: parallel data input - - num: 16 - sym: Vcc - desc: supply voltage -... - + D4: + desc: 'parallel data input' + D5: + desc: 'parallel data input' + D6: + desc: 'parallel data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - D7 + - Q5 + - Q7 + - D3 + - D2 + - D1 + - D0 + - GND + - PE + - CP + - DS + - Q6 + - D4 + - D5 + - D6 + - Vcc diff --git a/4015.yaml b/4015.yaml index 577be60..392daa4 100644 --- a/4015.yaml +++ b/4015.yaml @@ -1,57 +1,54 @@ ---- -description: "Dual 4-bit serial-in/parallel-out shift register" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4015b.pdf" +description: 'Dual 4-bit serial-in/parallel-out shift register' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4015b.pdf' pins: - - num: 1 - sym: 2CP - desc: clock input (low-to-high edge-triggered) - - num: 2 - sym: 2Q3 - desc: parallel output - - num: 3 - sym: 1Q2 - desc: parallel output - - num: 4 - sym: 1Q1 - desc: parallel output - - num: 5 - sym: 1Q0 - desc: parallel output - - num: 6 - sym: 1MR - desc: master reset - - num: 7 - sym: 1D - desc: serial data input - - num: 8 - sym: GND + 2CP: + desc: 'clock input (low-to-high edge-triggered)' + 2Q3: + desc: 'parallel output' + 1Q2: + desc: 'parallel output' + 1Q1: + desc: 'parallel output' + 1Q0: + desc: 'parallel output' + 1MR: + desc: 'master reset' + 1D: + desc: 'serial data input' + GND: desc: ground - - num: 9 - sym: 1CP - desc: clock input (low-to-high edge-triggered) - - num: 10 - sym: 1Q3 - desc: parallel output - - num: 11 - sym: 2Q2 - desc: parallel output - - num: 12 - sym: 2Q1 - desc: parallel output - - num: 13 - sym: 2Q0 - desc: parallel output - - num: 14 - sym: 2MR - desc: master reset - - num: 15 - sym: 2D - desc: serial data input - - num: 16 - sym: Vcc - desc: supply voltage -... - + 1CP: + desc: 'clock input (low-to-high edge-triggered)' + 1Q3: + desc: 'parallel output' + 2Q2: + desc: 'parallel output' + 2Q1: + desc: 'parallel output' + 2Q0: + desc: 'parallel output' + 2MR: + desc: 'master reset' + 2D: + desc: 'serial data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 2CP + - 2Q3 + - 1Q2 + - 1Q1 + - 1Q0 + - 1MR + - 1D + - GND + - 1CP + - 1Q3 + - 2Q2 + - 2Q1 + - 2Q0 + - 2MR + - 2D + - Vcc diff --git a/4017.yaml b/4017.yaml index c784de0..b845cdd 100644 --- a/4017.yaml +++ b/4017.yaml @@ -1,61 +1,61 @@ ---- -description: "Decade counter/divider with 10 decoded outputs" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.national.com/ds/CD/CD4017BC.pdf" +description: 'Decade counter/divider with 10 decoded outputs' +family: '4000' +datasheet: 'http://www.national.com/ds/CD/CD4017BC.pdf' pins: - - num: 1 - sym: Q5 + Q5: desc: output - - num: 2 - sym: Q1 + Q1: desc: output - - num: 3 - sym: Q0 + Q0: desc: output - - num: 4 - sym: Q2 + Q2: desc: output - - num: 5 - sym: Q6 + Q6: desc: output - - num: 6 - sym: Q7 + Q7: desc: output - - num: 7 - sym: Q3 + Q3: desc: output - - num: 8 - sym: GND + GND: desc: ground - - num: 9 - sym: Q8 - desc: output - - num: 10 - sym: Q4 - desc: output - - num: 11 - sym: Q9 - desc: output - - num: 12 - sym: CARRY - desc: carry output - - num: 13 - sym: ~CE - desc: clock enable (active low) - - num: 14 - sym: CLOCK - desc: clock input (low-to-high, positive edge triggered) - - num: 15 - sym: RESET - desc: reset (active high) - - num: 16 - sym: Vcc - desc: supply voltage + Q8: + desc: output + Q4: + desc: output + Q9: + desc: output + CARRY: + desc: 'carry output' + '~CE': + desc: 'clock enable (active low)' + CLOCK: + desc: 'clock input (low-to-high, positive edge triggered)' + RESET: + desc: 'reset (active high)' + Vcc: + desc: 'supply voltage' specs: - - param: Maximum clock frequency - val: [2 (CD4017), 77 (74HC4017)] - unit: MHz -... - + - + param: 'Maximum clock frequency' + val: + - '2 (CD4017)' + - '77 (74HC4017)' + unit: MHz +packages: + DIP: + - Q5 + - Q1 + - Q0 + - Q2 + - Q6 + - Q7 + - Q3 + - GND + - Q8 + - Q4 + - Q9 + - CARRY + - '~CE' + - CLOCK + - RESET + - Vcc diff --git a/40193.yaml b/40193.yaml index cbcf7cb..c8c3e70 100644 --- a/40193.yaml +++ b/40193.yaml @@ -1,60 +1,57 @@ ---- -description: "4-bit up/down binary counter" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef40193b.pdf" +description: '4-bit up/down binary counter' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef40193b.pdf' pins: - - num: 1 - sym: D1 - desc: parallel data input - - num: 2 - sym: Q1 - desc: count output - - num: 3 - sym: Q0 - desc: count output - - num: 4 - sym: CPD - desc: count-down clock input (low-to-high edge-triggered) - - num: 5 - sym: CPU - desc: count-up clock input (low-to-high edge-triggered) - - num: 6 - sym: Q2 - desc: count output - - num: 7 - sym: Q3 - desc: count output - - num: 8 - sym: GND + D1: + desc: 'parallel data input' + Q1: + desc: 'count output' + Q0: + desc: 'count output' + CPD: + desc: 'count-down clock input (low-to-high edge-triggered)' + CPU: + desc: 'count-up clock input (low-to-high edge-triggered)' + Q2: + desc: 'count output' + Q3: + desc: 'count output' + GND: desc: ground - - num: 9 - sym: D3 - desc: parallel data input - - num: 10 - sym: D2 - desc: parallel data input - - num: 11 - sym: ~PL - desc: parallel load (active low) - - num: 12 - sym: ~TCU - desc: terminal count-up (carry; active low) - - num: 13 - sym: ~TCD - desc: terminal count-down (borrow; active low) - - num: 14 - sym: MR - desc: master reset - - num: 15 - sym: D0 - desc: parallel data input - - num: 16 - sym: Vcc - desc: supply voltage + D3: + desc: 'parallel data input' + D2: + desc: 'parallel data input' + '~PL': + desc: 'parallel load (active low)' + '~TCU': + desc: 'terminal count-up (carry; active low)' + '~TCD': + desc: 'terminal count-down (borrow; active low)' + MR: + desc: 'master reset' + D0: + desc: 'parallel data input' + Vcc: + desc: 'supply voltage' notes: - - ~TCU goes low when the count is 15. - - ~TCD goes low when the count is 0. -... - + - '~TCU goes low when the count is 15.' + - '~TCD goes low when the count is 0.' +packages: + DIP: + - D1 + - Q1 + - Q0 + - CPD + - CPU + - Q2 + - Q3 + - GND + - D3 + - D2 + - '~PL' + - '~TCU' + - '~TCD' + - MR + - D0 + - Vcc diff --git a/4020.yaml b/4020.yaml index f5518d1..64f1384 100644 --- a/4020.yaml +++ b/4020.yaml @@ -1,57 +1,54 @@ ---- -description: "14-stage binary counter" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4020b.pdf" +description: '14-stage binary counter' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4020b.pdf' pins: - - num: 1 - sym: Q11 + Q11: desc: output - - num: 2 - sym: Q12 + Q12: desc: output - - num: 3 - sym: Q13 + Q13: desc: output - - num: 4 - sym: Q5 + Q5: desc: output - - num: 5 - sym: Q4 + Q4: desc: output - - num: 6 - sym: Q6 + Q6: desc: output - - num: 7 - sym: Q3 + Q3: desc: output - - num: 8 - sym: GND + GND: desc: ground - - num: 9 - sym: Q0 - desc: output - - num: 10 - sym: ~CP - desc: clock input (high-to-low edge-triggered) - - num: 11 - sym: MR - desc: master reset - - num: 12 - sym: Q8 - desc: output - - num: 13 - sym: Q7 - desc: output - - num: 14 - sym: Q9 - desc: output - - num: 15 - sym: Q10 - desc: output - - num: 16 - sym: Vcc - desc: supply voltage -... - + Q0: + desc: output + '~CP': + desc: 'clock input (high-to-low edge-triggered)' + MR: + desc: 'master reset' + Q8: + desc: output + Q7: + desc: output + Q9: + desc: output + Q10: + desc: output + Vcc: + desc: 'supply voltage' +packages: + DIP: + - Q11 + - Q12 + - Q13 + - Q5 + - Q4 + - Q6 + - Q3 + - GND + - Q0 + - '~CP' + - MR + - Q8 + - Q7 + - Q9 + - Q10 + - Vcc diff --git a/4021.yaml b/4021.yaml index 152c4cf..52c6890 100644 --- a/4021.yaml +++ b/4021.yaml @@ -1,58 +1,54 @@ ---- -description: 8-bit static shift register -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4021b.pdf" +description: '8-bit static shift register' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4021b.pdf' pins: - - num: 1 - sym: D7 - desc: parallel data input - - num: 2 - sym: Q5 + D7: + desc: 'parallel data input' + Q5: desc: output - - num: 3 - sym: Q7 + Q7: desc: output - - num: 4 - sym: D3 - desc: parallel data input - - num: 5 - sym: D2 - desc: parallel data input - - num: 6 - sym: D1 - desc: parallel data input - - num: 7 - sym: D0 - desc: parallel data input - - num: 8 - sym: GND + D3: + desc: 'parallel data input' + D2: + desc: 'parallel data input' + D1: + desc: 'parallel data input' + D0: + desc: 'parallel data input' + GND: desc: ground - - num: 9 - sym: PL - desc: parallel load - - num: 10 - sym: CP - desc: clock input (low-to-high edge-triggered) - - num: 11 - sym: DS - desc: serial data input - - num: 12 - sym: Q6 + PL: + desc: 'parallel load' + CP: + desc: 'clock input (low-to-high edge-triggered)' + DS: + desc: 'serial data input' + Q6: desc: output - - num: 13 - sym: D4 - desc: parallel data input - - num: 14 - sym: D5 - desc: parallel data input - - num: 15 - sym: D6 - desc: parallel data input - - num: 16 - sym: Vcc - desc: supply voltage -... - - + D4: + desc: 'parallel data input' + D5: + desc: 'parallel data input' + D6: + desc: 'parallel data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - D7 + - Q5 + - Q7 + - D3 + - D2 + - D1 + - D0 + - GND + - PL + - CP + - DS + - Q6 + - D4 + - D5 + - D6 + - Vcc diff --git a/4023.yaml b/4023.yaml index 972fd22..b9829b9 100644 --- a/4023.yaml +++ b/4023.yaml @@ -1,51 +1,48 @@ ---- -description: "Triple 3-input NAND gate" -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4023b.pdf" +description: 'Triple 3-input NAND gate' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4023b.pdf' pins: - - num: 1 - sym: 2A - desc: data input - - num: 2 - sym: 2B - desc: data input - - num: 3 - sym: 1A - desc: data input - - num: 4 - sym: 1B - desc: data input - - num: 5 - sym: 1C - desc: data input - - num: 6 - sym: 1Y - desc: data output - - num: 7 - sym: GND + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1C: + desc: 'data input' + 1Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 2C - desc: data input - - num: 9 - sym: 2Y - desc: data output - - num: 10 - sym: 3Y - desc: data output - - num: 11 - sym: 3A - desc: data input - - num: 12 - sym: 3B - desc: data input - - num: 13 - sym: 3C - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage -... - + 2C: + desc: 'data input' + 2Y: + desc: 'data output' + 3Y: + desc: 'data output' + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3C: + desc: 'data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 2A + - 2B + - 1A + - 1B + - 1C + - 1Y + - GND + - 2C + - 2Y + - 3Y + - 3A + - 3B + - 3C + - Vcc diff --git a/4024.yaml b/4024.yaml index e1a829b..c1ba883 100644 --- a/4024.yaml +++ b/4024.yaml @@ -1,51 +1,42 @@ ---- -description: 7-stage binary ripple counter -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4024b.pdf" +description: '7-stage binary ripple counter' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4024b.pdf' pins: - - num: 1 - sym: ~CP - desc: clock input (high-to-low edge-triggered) - - num: 2 - sym: MR - desc: master reset - - num: 3 - sym: Q6 - desc: buffered parallel output - - num: 4 - sym: Q5 - desc: buffered parallel output - - num: 5 - sym: Q4 - desc: buffered parallel output - - num: 6 - sym: Q3 - desc: buffered parallel output - - num: 7 - sym: GND + '~CP': + desc: 'clock input (high-to-low edge-triggered)' + MR: + desc: 'master reset' + Q6: + desc: 'buffered parallel output' + Q5: + desc: 'buffered parallel output' + Q4: + desc: 'buffered parallel output' + Q3: + desc: 'buffered parallel output' + GND: desc: ground - - num: 8 - sym: NC - desc: no connection - - num: 9 - sym: Q2 - desc: buffered parallel output - - num: 10 - sym: NC - desc: no connection - - num: 11 - sym: Q1 - desc: buffered parallel output - - num: 12 - sym: Q0 - desc: buffered parallel output - - num: 13 - sym: NC - desc: no connection - - num: 14 - sym: Vcc - desc: supply voltage -... - + Q2: + desc: 'buffered parallel output' + Q1: + desc: 'buffered parallel output' + Q0: + desc: 'buffered parallel output' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - '~CP' + - MR + - Q6 + - Q5 + - Q4 + - Q3 + - GND + - NC + - Q2 + - NC + - Q1 + - Q0 + - NC + - Vcc diff --git a/4025.yaml b/4025.yaml index 795bc5e..e7b46bd 100644 --- a/4025.yaml +++ b/4025.yaml @@ -1,52 +1,48 @@ ---- -description: "Triple 3-input NOR gate" -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4025b.pdf" +description: 'Triple 3-input NOR gate' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4025b.pdf' pins: - - num: 1 - sym: 2A - desc: data input - - num: 2 - sym: 2B - desc: data input - - num: 3 - sym: 1A - desc: data input - - num: 4 - sym: 1B - desc: data input - - num: 5 - sym: 1C - desc: data input - - num: 6 - sym: 1Y - desc: data output - - num: 7 - sym: GND + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1C: + desc: 'data input' + 1Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 2C - desc: data input - - num: 9 - sym: 2Y - desc: data output - - num: 10 - sym: 3Y - desc: data output - - num: 11 - sym: 3A - desc: data input - - num: 12 - sym: 3B - desc: data input - - num: 13 - sym: 3C - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage -... - - + 2C: + desc: 'data input' + 2Y: + desc: 'data output' + 3Y: + desc: 'data output' + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3C: + desc: 'data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 2A + - 2B + - 1A + - 1B + - 1C + - 1Y + - GND + - 2C + - 2Y + - 3Y + - 3A + - 3B + - 3C + - Vcc diff --git a/4027.yaml b/4027.yaml index 9326bf7..f720a69 100644 --- a/4027.yaml +++ b/4027.yaml @@ -1,57 +1,54 @@ ---- -description: Dual J-K flip-flop with set and clear -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4027b.pdf" +description: 'Dual J-K flip-flop with set and clear' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4027b.pdf' pins: - - num: 1 - sym: 2Q - desc: true output - - num: 2 - sym: 2~Q - desc: complement output - - num: 3 - sym: 2CP - desc: clock input (low-to-high edge-triggered) - - num: 4 - sym: 2CD - desc: asynchronous clear-direct input - - num: 5 - sym: 2K - desc: synchronous input - - num: 6 - sym: 2J - desc: synchronous input - - num: 7 - sym: 2SD - desc: asynchronous set-direct input - - num: 8 - sym: GND + 2Q: + desc: 'true output' + '2~Q': + desc: 'complement output' + 2CP: + desc: 'clock input (low-to-high edge-triggered)' + 2CD: + desc: 'asynchronous clear-direct input' + 2K: + desc: 'synchronous input' + 2J: + desc: 'synchronous input' + 2SD: + desc: 'asynchronous set-direct input' + GND: desc: ground - - num: 9 - sym: 1SD - desc: asynchronous set-direct input - - num: 10 - sym: 1J - desc: asynchronous input - - num: 11 - sym: 1K - desc: asynchronous input - - num: 12 - sym: 1CD - desc: asynchronous clear-direct input - - num: 13 - sym: 1CP - desc: clock input (low-to-high edge-triggered) - - num: 14 - sym: 1~Q - desc: complement output - - num: 15 - sym: 1Q - desc: true output - - num: 16 - sym: Vcc - desc: supply voltage -... - + 1SD: + desc: 'asynchronous set-direct input' + 1J: + desc: 'asynchronous input' + 1K: + desc: 'asynchronous input' + 1CD: + desc: 'asynchronous clear-direct input' + 1CP: + desc: 'clock input (low-to-high edge-triggered)' + '1~Q': + desc: 'complement output' + 1Q: + desc: 'true output' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 2Q + - '2~Q' + - 2CP + - 2CD + - 2K + - 2J + - 2SD + - GND + - 1SD + - 1J + - 1K + - 1CD + - 1CP + - '1~Q' + - 1Q + - Vcc diff --git a/4028.yaml b/4028.yaml index 6b76174..360eb70 100644 --- a/4028.yaml +++ b/4028.yaml @@ -1,60 +1,57 @@ ---- -description: BCD to decimal decoder -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4028b.pdf" +description: 'BCD to decimal decoder' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4028b.pdf' pins: - - num: 1 - sym: Y4 + Y4: desc: output - - num: 2 - sym: Y2 + Y2: desc: output - - num: 3 - sym: Y0 + Y0: desc: output - - num: 4 - sym: Y7 + Y7: desc: output - - num: 5 - sym: Y9 + Y9: desc: output - - num: 6 - sym: Y5 + Y5: desc: output - - num: 7 - sym: Y6 + Y6: desc: output - - num: 8 - sym: GND + GND: desc: ground - - num: 9 - sym: Y8 - desc: output - - num: 10 - sym: A0 - desc: BCD input - - num: 11 - sym: A3 - desc: BCD input - - num: 12 - sym: A2 - desc: BCD input - - num: 13 - sym: A1 - desc: BCD input - - num: 14 - sym: Y1 - desc: output - - num: 15 - sym: Y3 - desc: output - - num: 16 - sym: Vcc - desc: supply voltage + Y8: + desc: output + A0: + desc: 'BCD input' + A3: + desc: 'BCD input' + A2: + desc: 'BCD input' + A1: + desc: 'BCD input' + Y1: + desc: output + Y3: + desc: output + Vcc: + desc: 'supply voltage' notes: - - Outputs are active high. - - All outputs are low for BCD inputs greater than 9. -... - + - 'Outputs are active high.' + - 'All outputs are low for BCD inputs greater than 9.' +packages: + DIP: + - Y4 + - Y2 + - Y0 + - Y7 + - Y9 + - Y5 + - Y6 + - GND + - Y8 + - A0 + - A3 + - A2 + - A1 + - Y1 + - Y3 + - Vcc diff --git a/4029.yaml b/4029.yaml index f13ae6a..135f012 100644 --- a/4029.yaml +++ b/4029.yaml @@ -1,57 +1,54 @@ ---- -description: Synchronous 4-bit up/down binary/decade counter -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4029b.pdf" +description: 'Synchronous 4-bit up/down binary/decade counter' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4029b.pdf' pins: - - num: 1 - sym: PL - desc: parallel load - - num: 2 - sym: Q3 - desc: buffered parallel output - - num: 3 - sym: P3 - desc: parallel data input - - num: 4 - sym: P0 - desc: parallel data input - - num: 5 - sym: ~CE - desc: count enable (active low) - - num: 6 - sym: Q0 - desc: buffered parallel output - - num: 7 - sym: ~TC - desc: terminal count output (active low) - - num: 8 - sym: GND + PL: + desc: 'parallel load' + Q3: + desc: 'buffered parallel output' + P3: + desc: 'parallel data input' + P0: + desc: 'parallel data input' + '~CE': + desc: 'count enable (active low)' + Q0: + desc: 'buffered parallel output' + '~TC': + desc: 'terminal count output (active low)' + GND: desc: ground - - num: 9 - sym: BIN/~DEC - desc: binary/decade control input - - num: 10 - sym: UP/~DN - desc: up/down control input - - num: 11 - sym: Q1 - desc: buffered parallel output - - num: 12 - sym: P1 - desc: parallel data input - - num: 13 - sym: P2 - desc: parallel data input - - num: 14 - sym: Q2 - desc: buffered parallel output - - num: 15 - sym: CP - desc: clock input (low-to-high edge-triggered) - - num: 16 - sym: Vcc - desc: supply voltage -... - + 'BIN/~DEC': + desc: 'binary/decade control input' + 'UP/~DN': + desc: 'up/down control input' + Q1: + desc: 'buffered parallel output' + P1: + desc: 'parallel data input' + P2: + desc: 'parallel data input' + Q2: + desc: 'buffered parallel output' + CP: + desc: 'clock input (low-to-high edge-triggered)' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - PL + - Q3 + - P3 + - P0 + - '~CE' + - Q0 + - '~TC' + - GND + - 'BIN/~DEC' + - 'UP/~DN' + - Q1 + - P1 + - P2 + - Q2 + - CP + - Vcc diff --git a/4030.yaml b/4030.yaml index 2ce9957..1e39b9f 100644 --- a/4030.yaml +++ b/4030.yaml @@ -1,52 +1,48 @@ ---- -description: Quad 2-input XOR gate -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4030b.pdf" +description: 'Quad 2-input XOR gate' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4030b.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: 1Y - desc: data output - - num: 4 - sym: 2Y - desc: data output - - num: 5 - sym: 2A - desc: data input - - num: 6 - sym: 2B - desc: data input - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1Y: + desc: 'data output' + 2Y: + desc: 'data output' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + GND: desc: ground - - num: 8 - sym: 3A - desc: data input - - num: 9 - sym: 3B - desc: data input - - num: 10 - sym: 3Y - desc: data output - - num: 11 - sym: 4Y - desc: data output - - num: 12 - sym: 4A - desc: data input - - num: 13 - sym: 4B - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage -... - - + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3Y: + desc: 'data output' + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 4B: + desc: 'data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 1A + - 1B + - 1Y + - 2Y + - 2A + - 2B + - GND + - 3A + - 3B + - 3Y + - 4Y + - 4A + - 4B + - Vcc diff --git a/4040.yaml b/4040.yaml index 22f4b5f..05b234f 100644 --- a/4040.yaml +++ b/4040.yaml @@ -1,57 +1,54 @@ ---- -description: 12-stage binary ripple counter -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4040b.pdf" +description: '12-stage binary ripple counter' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4040b.pdf' pins: - - num: 1 - sym: Q11 + Q11: desc: output - - num: 2 - sym: Q5 + Q5: desc: output - - num: 3 - sym: Q4 + Q4: desc: output - - num: 4 - sym: Q6 + Q6: desc: output - - num: 5 - sym: Q3 + Q3: desc: output - - num: 6 - sym: Q2 + Q2: desc: output - - num: 7 - sym: Q1 + Q1: desc: output - - num: 8 - sym: GND + GND: desc: ground - - num: 9 - sym: Q0 - desc: output - - num: 10 - sym: ~CP - desc: clock input (high-to-low edge-triggered) - - num: 11 - sym: MR - desc: master reset (active high) - - num: 12 - sym: Q8 - desc: output - - num: 13 - sym: Q7 - desc: output - - num: 14 - sym: Q9 - desc: output - - num: 15 - sym: Q10 - desc: output - - num: 16 - sym: Vcc - desc: supply voltage -... - + Q0: + desc: output + '~CP': + desc: 'clock input (high-to-low edge-triggered)' + MR: + desc: 'master reset (active high)' + Q8: + desc: output + Q7: + desc: output + Q9: + desc: output + Q10: + desc: output + Vcc: + desc: 'supply voltage' +packages: + DIP: + - Q11 + - Q5 + - Q4 + - Q6 + - Q3 + - Q2 + - Q1 + - GND + - Q0 + - '~CP' + - MR + - Q8 + - Q7 + - Q9 + - Q10 + - Vcc diff --git a/4046.yaml b/4046.yaml index 13a872a..167f4d7 100644 --- a/4046.yaml +++ b/4046.yaml @@ -1,57 +1,54 @@ ---- -description: "Phase-locked loop" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4046b.pdf" +description: 'Phase-locked loop' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4046b.pdf' pins: - - num: 1 - sym: PCP__OUT - desc: phase comparator pulse output - - num: 2 - sym: PC1__OUT - desc: phase comparator 1 output - - num: 3 - sym: COMP__IN - desc: comparator input - - num: 4 - sym: VCO__OUT - desc: VCO output - - num: 5 - sym: INH + 'PCP__OUT': + desc: 'phase comparator pulse output' + 'PC1__OUT': + desc: 'phase comparator 1 output' + 'COMP__IN': + desc: 'comparator input' + 'VCO__OUT': + desc: 'VCO output' + INH: desc: inhibit - - num: 6 - sym: C1__A - desc: capacitor C1 connection A - - num: 7 - sym: C1__B - desc: capacitor C1 Connection B - - num: 8 - sym: GND + 'C1__A': + desc: 'capacitor C1 connection A' + 'C1__B': + desc: 'capacitor C1 Connection B' + GND: desc: ground - - num: 9 - sym: VCO__IN - desc: VCO input - - num: 10 - sym: SF__OUT - desc: source-follower output - - num: 11 - sym: R__1 - desc: resistor R1 connection - - num: 12 - sym: R__2 - desc: resistor R2 connection - - num: 13 - sym: PC2__OUT - desc: phase comparator 2 output - - num: 14 - sym: SIGN__IN - desc: signal input - - num: 15 - sym: ZENER - desc: zener diode input for regulated supply - - num: 16 - sym: Vcc - desc: supply voltage -... - + 'VCO__IN': + desc: 'VCO input' + 'SF__OUT': + desc: 'source-follower output' + 'R__1': + desc: 'resistor R1 connection' + 'R__2': + desc: 'resistor R2 connection' + 'PC2__OUT': + desc: 'phase comparator 2 output' + 'SIGN__IN': + desc: 'signal input' + ZENER: + desc: 'zener diode input for regulated supply' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 'PCP__OUT' + - 'PC1__OUT' + - 'COMP__IN' + - 'VCO__OUT' + - INH + - 'C1__A' + - 'C1__B' + - GND + - 'VCO__IN' + - 'SF__OUT' + - 'R__1' + - 'R__2' + - 'PC2__OUT' + - 'SIGN__IN' + - ZENER + - Vcc diff --git a/4047.yaml b/4047.yaml index e8f7ab2..3b89588 100644 --- a/4047.yaml +++ b/4047.yaml @@ -1,51 +1,48 @@ ---- -description: Monostable/astable multivibrator -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4047b.pdf" +description: 'Monostable/astable multivibrator' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4047b.pdf' pins: - - num: 1 - sym: C - desc: capacitor connection - - num: 2 - sym: R - desc: resistor connection - - num: 3 - sym: RC COMMON - desc: resistor and capacitor common connection - - num: 4 - sym: ~ASTABLE - desc: astable enable (active low) - - num: 5 - sym: ASTABLE - desc: astable enable (active high) - - num: 6 - sym: "-TRIGGER" - desc: monostable negative-edge trigger - - num: 7 - sym: GND + C: + desc: 'capacitor connection' + R: + desc: 'resistor connection' + 'RC COMMON': + desc: 'resistor and capacitor common connection' + '~ASTABLE': + desc: 'astable enable (active low)' + ASTABLE: + desc: 'astable enable (active high)' + '-TRIGGER': + desc: 'monostable negative-edge trigger' + GND: desc: ground - - num: 8 - sym: "+TRIGGER" - desc: monostable positive-edge trigger - - num: 9 - sym: RESET - desc: external reset - - num: 10 - sym: Q + +TRIGGER: + desc: 'monostable positive-edge trigger' + RESET: + desc: 'external reset' + Q: desc: output - - num: 11 - sym: ~Q - desc: complement output - - num: 12 - sym: RETRIGGER - desc: monostable retrigger input - - num: 13 - sym: OSC OUT - desc: oscillator (double frequency) output - - num: 14 - sym: Vcc - desc: supply voltage -... - + '~Q': + desc: 'complement output' + RETRIGGER: + desc: 'monostable retrigger input' + 'OSC OUT': + desc: 'oscillator (double frequency) output' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - C + - R + - 'RC COMMON' + - '~ASTABLE' + - ASTABLE + - '-TRIGGER' + - GND + - +TRIGGER + - RESET + - Q + - '~Q' + - RETRIGGER + - 'OSC OUT' + - Vcc diff --git a/4049.yaml b/4049.yaml index 47b429a..eeb8739 100644 --- a/4049.yaml +++ b/4049.yaml @@ -1,57 +1,50 @@ ---- -description: Hex inverting buffer -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4049b.pdf" +description: 'Hex inverting buffer' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4049b.pdf' pins: - - num: 1 - sym: Vcc - desc: supply voltage - - num: 2 - sym: 1Y - desc: data output - - num: 3 - sym: 1A - desc: data input - - num: 4 - sym: 2Y - desc: data output - - num: 5 - sym: 2A - desc: data input - - num: 6 - sym: 3Y - desc: data output - - num: 7 - sym: 3A - desc: data input - - num: 8 - sym: GND + Vcc: + desc: 'supply voltage' + 1Y: + desc: 'data output' + 1A: + desc: 'data input' + 2Y: + desc: 'data output' + 2A: + desc: 'data input' + 3Y: + desc: 'data output' + 3A: + desc: 'data input' + GND: desc: ground - - num: 9 - sym: 4A - desc: data input - - num: 10 - sym: 4Y - desc: data output - - num: 11 - sym: 5A - desc: data input - - num: 12 - sym: 5Y - desc: data output - - num: 13 - sym: NC - desc: no connection - - num: 14 - sym: 6A - desc: data input - - num: 15 - sym: 6Y - desc: data output - - num: 16 - sym: NC - desc: no connection -... - + 4A: + desc: 'data input' + 4Y: + desc: 'data output' + 5A: + desc: 'data input' + 5Y: + desc: 'data output' + 6A: + desc: 'data input' + 6Y: + desc: 'data output' +packages: + DIP: + - Vcc + - 1Y + - 1A + - 2Y + - 2A + - 3Y + - 3A + - GND + - 4A + - 4Y + - 5A + - 5Y + - NC + - 6A + - 6Y + - NC diff --git a/4050.yaml b/4050.yaml index 3bc2c29..6ee35dc 100644 --- a/4050.yaml +++ b/4050.yaml @@ -1,58 +1,50 @@ ---- -description: Hex non-inverting buffer -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4050b.pdf" +description: 'Hex non-inverting buffer' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4050b.pdf' pins: - - num: 1 - sym: Vcc - desc: supply voltage - - num: 2 - sym: 1Y - desc: data output - - num: 3 - sym: 1A - desc: data input - - num: 4 - sym: 2Y - desc: data output - - num: 5 - sym: 2A - desc: data input - - num: 6 - sym: 3Y - desc: data output - - num: 7 - sym: 3A - desc: data input - - num: 8 - sym: GND + Vcc: + desc: 'supply voltage' + 1Y: + desc: 'data output' + 1A: + desc: 'data input' + 2Y: + desc: 'data output' + 2A: + desc: 'data input' + 3Y: + desc: 'data output' + 3A: + desc: 'data input' + GND: desc: ground - - num: 9 - sym: 4A - desc: data input - - num: 10 - sym: 4Y - desc: data output - - num: 11 - sym: 5A - desc: data input - - num: 12 - sym: 5Y - desc: data output - - num: 13 - sym: NC - desc: no connection - - num: 14 - sym: 6A - desc: data input - - num: 15 - sym: 6Y - desc: data output - - num: 16 - sym: NC - desc: no connection -... - - + 4A: + desc: 'data input' + 4Y: + desc: 'data output' + 5A: + desc: 'data input' + 5Y: + desc: 'data output' + 6A: + desc: 'data input' + 6Y: + desc: 'data output' +packages: + DIP: + - Vcc + - 1Y + - 1A + - 2Y + - 2A + - 3Y + - 3A + - GND + - 4A + - 4Y + - 5A + - 5Y + - NC + - 6A + - 6Y + - NC diff --git a/4051.yaml b/4051.yaml index f2a2af4..107f07c 100644 --- a/4051.yaml +++ b/4051.yaml @@ -1,61 +1,58 @@ ---- -description: "8-channel analog multiplexer/demultiplexer" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4051b.pdf" +description: '8-channel analog multiplexer/demultiplexer' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4051b.pdf' pins: - - num: 1 - sym: Y4 - desc: independent input/output - - num: 2 - sym: Y6 - desc: independent input/output - - num: 3 - sym: Z - desc: common input/output - - num: 4 - sym: Y7 - desc: independent input/output - - num: 5 - sym: Y5 - desc: independent input/output - - num: 6 - sym: ~E - desc: enable input (active low) - - num: 7 - sym: V__EE - desc: switch negative supply voltage - - num: 8 - sym: GND + Y4: + desc: 'independent input/output' + Y6: + desc: 'independent input/output' + Z: + desc: 'common input/output' + Y7: + desc: 'independent input/output' + Y5: + desc: 'independent input/output' + '~E': + desc: 'enable input (active low)' + 'V__EE': + desc: 'switch negative supply voltage' + GND: desc: ground - - num: 9 - sym: A2 - desc: address input - - num: 10 - sym: A1 - desc: address input - - num: 11 - sym: A0 - desc: address input - - num: 12 - sym: Y3 - desc: independent input/output - - num: 13 - sym: Y0 - desc: independent input/output - - num: 14 - sym: Y1 - desc: independent input/output - - num: 15 - sym: Y2 - desc: independent input/output - - num: 16 - sym: V__CC - desc: supply voltage + A2: + desc: 'address input' + A1: + desc: 'address input' + A0: + desc: 'address input' + Y3: + desc: 'independent input/output' + Y0: + desc: 'independent input/output' + Y1: + desc: 'independent input/output' + Y2: + desc: 'independent input/output' + 'V__CC': + desc: 'supply voltage' notes: - - The device contains eight bidirectional analog switches. - - The analog inputs/outputs can swing between V__CC and V__EE. - - When ~E is high, all switches are in a high-impedance off state. -... - + - 'The device contains eight bidirectional analog switches.' + - 'The analog inputs/outputs can swing between V__CC and V__EE.' + - 'When ~E is high, all switches are in a high-impedance off state.' +packages: + DIP: + - Y4 + - Y6 + - Z + - Y7 + - Y5 + - '~E' + - 'V__EE' + - GND + - A2 + - A1 + - A0 + - Y3 + - Y0 + - Y1 + - Y2 + - 'V__CC' diff --git a/4052.yaml b/4052.yaml index 8d66cec..278cd11 100644 --- a/4052.yaml +++ b/4052.yaml @@ -1,61 +1,58 @@ ---- -description: Dual 4-channel analog multiplexer/demultiplexer -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4052b.pdf" +description: 'Dual 4-channel analog multiplexer/demultiplexer' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4052b.pdf' pins: - - num: 1 - sym: Y__0B - desc: independent input/output - - num: 2 - sym: Y__2B - desc: independent input/output - - num: 3 - sym: Z__B - desc: common input/output - - num: 4 - sym: Y__3B - desc: independent input/output - - num: 5 - sym: Y__1B - desc: independent input/output - - num: 6 - sym: ~E - desc: enable input (active low) - - num: 7 - sym: V__EE - desc: switch negative supply voltage - - num: 8 - sym: GND + 'Y__0B': + desc: 'independent input/output' + 'Y__2B': + desc: 'independent input/output' + 'Z__B': + desc: 'common input/output' + 'Y__3B': + desc: 'independent input/output' + 'Y__1B': + desc: 'independent input/output' + '~E': + desc: 'enable input (active low)' + 'V__EE': + desc: 'switch negative supply voltage' + GND: desc: ground - - num: 9 - sym: A__1 - desc: address input - - num: 10 - sym: A__0 - desc: address input - - num: 11 - sym: Y__3A - desc: independent input/output - - num: 12 - sym: Y__0A - desc: independent input/output - - num: 13 - sym: Z__A - desc: common input/output - - num: 14 - sym: Y__1A - desc: independent input/output - - num: 15 - sym: Y__2A - desc: independent input/output - - num: 16 - sym: V__CC - desc: supply voltage + 'A__1': + desc: 'address input' + 'A__0': + desc: 'address input' + 'Y__3A': + desc: 'independent input/output' + 'Y__0A': + desc: 'independent input/output' + 'Z__A': + desc: 'common input/output' + 'Y__1A': + desc: 'independent input/output' + 'Y__2A': + desc: 'independent input/output' + 'V__CC': + desc: 'supply voltage' notes: - - The device contains four bidirectional analog switches. - - The analog inputs/outputs can swing between V__CC and V__EE. - - When E is high, all switches are in a high-impedance off state. -... - + - 'The device contains four bidirectional analog switches.' + - 'The analog inputs/outputs can swing between V__CC and V__EE.' + - 'When E is high, all switches are in a high-impedance off state.' +packages: + DIP: + - 'Y__0B' + - 'Y__2B' + - 'Z__B' + - 'Y__3B' + - 'Y__1B' + - '~E' + - 'V__EE' + - GND + - 'A__1' + - 'A__0' + - 'Y__3A' + - 'Y__0A' + - 'Z__A' + - 'Y__1A' + - 'Y__2A' + - 'V__CC' diff --git a/4053.yaml b/4053.yaml index e9dde81..9ca1168 100644 --- a/4053.yaml +++ b/4053.yaml @@ -1,61 +1,58 @@ ---- -description: Triple 2-channel analog multiplexer/demultiplexer (triple SPDT analog switch) -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4053b.pdf" +description: 'Triple 2-channel analog multiplexer/demultiplexer (triple SPDT analog switch)' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4053b.pdf' pins: - - num: 1 - sym: Y__1B - desc: independent input/output - - num: 2 - sym: Y__0B - desc: independent input/output - - num: 3 - sym: Y__1C - desc: independent input/output - - num: 4 - sym: Z__C - desc: common input/output - - num: 5 - sym: Y__0C - desc: independent input/output - - num: 6 - sym: ~E - desc: enable input (active low) - - num: 7 - sym: V__EE - desc: switch negative supply voltage - - num: 8 - sym: GND + 'Y__1B': + desc: 'independent input/output' + 'Y__0B': + desc: 'independent input/output' + 'Y__1C': + desc: 'independent input/output' + 'Z__C': + desc: 'common input/output' + 'Y__0C': + desc: 'independent input/output' + '~E': + desc: 'enable input (active low)' + 'V__EE': + desc: 'switch negative supply voltage' + GND: desc: ground - - num: 9 - sym: S__C - desc: select input - - num: 10 - sym: S__B - desc: select input - - num: 11 - sym: S__A - desc: select input - - num: 12 - sym: Y__0A - desc: independent input/output - - num: 13 - sym: Y__1A - desc: independent input/output - - num: 14 - sym: Z__A - desc: common input/output - - num: 15 - sym: Z__B - desc: common input/output - - num: 16 - sym: V__CC - desc: supply voltage + 'S__C': + desc: 'select input' + 'S__B': + desc: 'select input' + 'S__A': + desc: 'select input' + 'Y__0A': + desc: 'independent input/output' + 'Y__1A': + desc: 'independent input/output' + 'Z__A': + desc: 'common input/output' + 'Z__B': + desc: 'common input/output' + 'V__CC': + desc: 'supply voltage' notes: - - Each multiplexer/demultiplexer contains two bidirectional analog switches. - - The analog inputs/outputs can swing between V__CC and V__EE. - - When E is high, all switches are in a high-impedance off state. -... - + - 'Each multiplexer/demultiplexer contains two bidirectional analog switches.' + - 'The analog inputs/outputs can swing between V__CC and V__EE.' + - 'When E is high, all switches are in a high-impedance off state.' +packages: + DIP: + - 'Y__1B' + - 'Y__0B' + - 'Y__1C' + - 'Z__C' + - 'Y__0C' + - '~E' + - 'V__EE' + - GND + - 'S__C' + - 'S__B' + - 'S__A' + - 'Y__0A' + - 'Y__1A' + - 'Z__A' + - 'Z__B' + - 'V__CC' diff --git a/4060.yaml b/4060.yaml index 8b2c7d8..f9ee010 100644 --- a/4060.yaml +++ b/4060.yaml @@ -1,57 +1,54 @@ ---- -description: "14-stage ripple-carry binary counter/divider and oscillator" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4060b.pdf" +description: '14-stage ripple-carry binary counter/divider and oscillator' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4060b.pdf' pins: - - num: 1 - sym: Q11 - desc: counter output - - num: 2 - sym: Q12 - desc: counter output - - num: 3 - sym: Q13 - desc: counter output - - num: 4 - sym: Q5 - desc: counter output - - num: 5 - sym: Q4 - desc: counter output - - num: 6 - sym: Q6 - desc: counter output - - num: 7 - sym: Q3 - desc: counter output - - num: 8 - sym: GND + Q11: + desc: 'counter output' + Q12: + desc: 'counter output' + Q13: + desc: 'counter output' + Q5: + desc: 'counter output' + Q4: + desc: 'counter output' + Q6: + desc: 'counter output' + Q3: + desc: 'counter output' + GND: desc: ground - - num: 9 - sym: C__TC - desc: external capacitor connection - - num: 10 - sym: R__TC - desc: oscillator pin - - num: 11 - sym: RS - desc: clock input/oscillator pin (high-to-low edge-triggered) - - num: 12 - sym: MR - desc: master reset (active high) - - num: 13 - sym: Q__8 - desc: counter output - - num: 14 - sym: Q__7 - desc: counter output - - num: 15 - sym: Q__9 - desc: counter output - - num: 16 - sym: Vcc - desc: supply voltage -... - + 'C__TC': + desc: 'external capacitor connection' + 'R__TC': + desc: 'oscillator pin' + RS: + desc: 'clock input/oscillator pin (high-to-low edge-triggered)' + MR: + desc: 'master reset (active high)' + 'Q__8': + desc: 'counter output' + 'Q__7': + desc: 'counter output' + 'Q__9': + desc: 'counter output' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - Q11 + - Q12 + - Q13 + - Q5 + - Q4 + - Q6 + - Q3 + - GND + - 'C__TC' + - 'R__TC' + - RS + - MR + - 'Q__8' + - 'Q__7' + - 'Q__9' + - Vcc diff --git a/4066.yaml b/4066.yaml index 391947d..688d0e8 100644 --- a/4066.yaml +++ b/4066.yaml @@ -1,60 +1,61 @@ ---- -description: Quad bilateral switch -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.datasheetcatalog.org/datasheets/320/206765_DS.pdf" +description: 'Quad bilateral switch' +family: '4000' +datasheet: 'http://www.datasheetcatalog.org/datasheets/320/206765_DS.pdf' pins: - - num: 1 - sym: IN 1 - desc: switch 1 input - - num: 2 - sym: OUT 1 - desc: switch 1 output - - num: 3 - sym: OUT 2 - desc: switch 2 output - - num: 4 - sym: IN 2 - desc: switch 2 input - - num: 5 - sym: CONTROL 2 - desc: switch 2 control - - num: 6 - sym: CONTROL 3 - desc: switch 3 control - - num: 7 - sym: V__SS - desc: ground/negative supply voltage - - num: 8 - sym: IN 3 - desc: switch 3 input - - num: 9 - sym: OUT 3 - desc: switch 3 output - - num: 10 - sym: OUT 4 - desc: switch 4 output - - num: 11 - sym: IN 4 - desc: switch 4 input - - num: 12 - sym: CONTROL 4 - desc: switch 4 control - - num: 13 - sym: CONTROL 1 - desc: switch 1 control - - num: 14 - sym: V__DD - desc: positive supply voltage + 'IN 1': + desc: 'switch 1 input' + 'OUT 1': + desc: 'switch 1 output' + 'OUT 2': + desc: 'switch 2 output' + 'IN 2': + desc: 'switch 2 input' + 'CONTROL 2': + desc: 'switch 2 control' + 'CONTROL 3': + desc: 'switch 3 control' + 'V__SS': + desc: 'ground/negative supply voltage' + 'IN 3': + desc: 'switch 3 input' + 'OUT 3': + desc: 'switch 3 output' + 'OUT 4': + desc: 'switch 4 output' + 'IN 4': + desc: 'switch 4 input' + 'CONTROL 4': + desc: 'switch 4 control' + 'CONTROL 1': + desc: 'switch 1 control' + 'V__DD': + desc: 'positive supply voltage' specs: - - param: Maximum switching frequency - val: 40 - unit: MHz - - param: Maximum supply voltage - val: 18 - unit: V - - param: Maximum switch through current - val: "± 25" - unit: mA -... + - + param: 'Maximum switching frequency' + val: '40' + unit: MHz + - + param: 'Maximum supply voltage' + val: '18' + unit: V + - + param: 'Maximum switch through current' + val: '± 25' + unit: mA +packages: + DIP: + - 'IN 1' + - 'OUT 1' + - 'OUT 2' + - 'IN 2' + - 'CONTROL 2' + - 'CONTROL 3' + - 'V__SS' + - 'IN 3' + - 'OUT 3' + - 'OUT 4' + - 'IN 4' + - 'CONTROL 4' + - 'CONTROL 1' + - 'V__DD' diff --git a/4067.yaml b/4067.yaml index a5a332e..28b5fc0 100644 --- a/4067.yaml +++ b/4067.yaml @@ -1,85 +1,82 @@ ---- -description: "16-channel analog multiplexer/demultiplexer" -package: DIP -pincount: 24 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4067b.pdf" +description: '16-channel analog multiplexer/demultiplexer' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4067b.pdf' pins: - - num: 1 - sym: Z - desc: common input/output - - num: 2 - sym: Y7 - desc: independent input/output - - num: 3 - sym: Y6 - desc: independent input/output - - num: 4 - sym: Y5 - desc: independent input/output - - num: 5 - sym: Y4 - desc: independent input/output - - num: 6 - sym: Y3 - desc: independent input/output - - num: 7 - sym: Y2 - desc: independent input/output - - num: 8 - sym: Y1 - desc: independent input/output - - num: 9 - sym: Y0 - desc: independent input/output - - num: 10 - sym: A0 - desc: address input - - num: 11 - sym: A1 - desc: address input - - num: 12 - sym: GND + Z: + desc: 'common input/output' + Y7: + desc: 'independent input/output' + Y6: + desc: 'independent input/output' + Y5: + desc: 'independent input/output' + Y4: + desc: 'independent input/output' + Y3: + desc: 'independent input/output' + Y2: + desc: 'independent input/output' + Y1: + desc: 'independent input/output' + Y0: + desc: 'independent input/output' + A0: + desc: 'address input' + A1: + desc: 'address input' + GND: desc: ground - - num: 13 - sym: A3 - desc: address input - - num: 14 - sym: A2 - desc: address input - - num: 15 - sym: ~E - desc: enable input (active low) - - num: 16 - sym: Y15 - desc: independent input/output - - num: 17 - sym: Y14 - desc: independent input/output - - num: 18 - sym: Y13 - desc: independent input/output - - num: 19 - sym: Y12 - desc: independent input/output - - num: 20 - sym: Y11 - desc: independent input/output - - num: 21 - sym: Y10 - desc: independent input/output - - num: 22 - sym: Y9 - desc: independent input/output - - num: 23 - sym: Y8 - desc: independent input/output - - num: 24 - sym: V__CC - desc: supply voltage + A3: + desc: 'address input' + A2: + desc: 'address input' + '~E': + desc: 'enable input (active low)' + Y15: + desc: 'independent input/output' + Y14: + desc: 'independent input/output' + Y13: + desc: 'independent input/output' + Y12: + desc: 'independent input/output' + Y11: + desc: 'independent input/output' + Y10: + desc: 'independent input/output' + Y9: + desc: 'independent input/output' + Y8: + desc: 'independent input/output' + 'V__CC': + desc: 'supply voltage' notes: - - The device contains sixteen bidirectional analog switches. - - The analog inputs/outputs can swing between V__CC and GND. - - When ~E is high, all switches are in a high-impedance off state. -... - + - 'The device contains sixteen bidirectional analog switches.' + - 'The analog inputs/outputs can swing between V__CC and GND.' + - 'When ~E is high, all switches are in a high-impedance off state.' +packages: + DIP: + - Z + - Y7 + - Y6 + - Y5 + - Y4 + - Y3 + - Y2 + - Y1 + - Y0 + - A0 + - A1 + - GND + - A3 + - A2 + - '~E' + - Y15 + - Y14 + - Y13 + - Y12 + - Y11 + - Y10 + - Y9 + - Y8 + - 'V__CC' diff --git a/4068.yaml b/4068.yaml index 2610c8c..60c185f 100644 --- a/4068.yaml +++ b/4068.yaml @@ -1,51 +1,42 @@ ---- -description: "8-input NAND gate" -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4068b.pdf" +description: '8-input NAND gate' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4068b.pdf' pins: - - num: 1 - sym: NC - desc: no connection - - num: 2 - sym: I__0 - desc: data input - - num: 3 - sym: I__1 - desc: data input - - num: 4 - sym: I__2 - desc: data input - - num: 5 - sym: I__3 - desc: data input - - num: 6 - sym: NC - desc: no connection - - num: 7 - sym: GND + 'I__0': + desc: 'data input' + 'I__1': + desc: 'data input' + 'I__2': + desc: 'data input' + 'I__3': + desc: 'data input' + GND: desc: ground - - num: 8 - sym: NC - desc: no connection - - num: 9 - sym: I__4 - desc: data input - - num: 10 - sym: I__5 - desc: data input - - num: 11 - sym: I__6 - desc: data input - - num: 12 - sym: I__7 - desc: data input - - num: 13 - sym: Y - desc: data output - - num: 14 - sym: Vcc - desc: supply voltage -... - + 'I__4': + desc: 'data input' + 'I__5': + desc: 'data input' + 'I__6': + desc: 'data input' + 'I__7': + desc: 'data input' + 'Y': + desc: 'data output' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - NC + - 'I__0' + - 'I__1' + - 'I__2' + - 'I__3' + - NC + - GND + - NC + - 'I__4' + - 'I__5' + - 'I__6' + - 'I__7' + - 'Y' + - Vcc diff --git a/4069.yaml b/4069.yaml index f44f12b..4406114 100644 --- a/4069.yaml +++ b/4069.yaml @@ -1,51 +1,48 @@ ---- -description: Hex inverter -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4069ub.pdf" +description: 'Hex inverter' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4069ub.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1Y - desc: data output - - num: 3 - sym: 2A - desc: data input - - num: 4 - sym: 2Y - desc: data output - - num: 5 - sym: 3A - desc: data input - - num: 6 - sym: 3Y - desc: data output - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1Y: + desc: 'data output' + 2A: + desc: 'data input' + 2Y: + desc: 'data output' + 3A: + desc: 'data input' + 3Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 4Y - desc: data output - - num: 9 - sym: 4A - desc: data input - - num: 10 - sym: 5Y - desc: data output - - num: 11 - sym: 5A - desc: data input - - num: 12 - sym: 6Y - desc: data output - - num: 13 - sym: 6A - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage -... - + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 5Y: + desc: 'data output' + 5A: + desc: 'data input' + 6Y: + desc: 'data output' + 6A: + desc: 'data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 1A + - 1Y + - 2A + - 2Y + - 3A + - 3Y + - GND + - 4Y + - 4A + - 5Y + - 5A + - 6Y + - 6A + - Vcc diff --git a/4070.yaml b/4070.yaml index 07edec7..51d645c 100644 --- a/4070.yaml +++ b/4070.yaml @@ -1,53 +1,48 @@ ---- -description: Quad 2-input XOR gate -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4070b.pdf" +description: 'Quad 2-input XOR gate' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4070b.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: 1Y - desc: data output - - num: 4 - sym: 2Y - desc: data output - - num: 5 - sym: 2A - desc: data input - - num: 6 - sym: 2B - desc: data input - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1Y: + desc: 'data output' + 2Y: + desc: 'data output' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + GND: desc: ground - - num: 8 - sym: 3A - desc: data input - - num: 9 - sym: 3B - desc: data input - - num: 10 - sym: 3Y - desc: data output - - num: 11 - sym: 4Y - desc: data output - - num: 12 - sym: 4A - desc: data input - - num: 13 - sym: 4B - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage -... - - - + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3Y: + desc: 'data output' + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 4B: + desc: 'data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 1A + - 1B + - 1Y + - 2Y + - 2A + - 2B + - GND + - 3A + - 3B + - 3Y + - 4Y + - 4A + - 4B + - Vcc diff --git a/4071.yaml b/4071.yaml index 4d36f08..cd8aca7 100644 --- a/4071.yaml +++ b/4071.yaml @@ -1,54 +1,48 @@ ---- -description: Quad 2-input OR gate -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4071b.pdf" +description: 'Quad 2-input OR gate' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4071b.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: 1Y - desc: data output - - num: 4 - sym: 2Y - desc: data output - - num: 5 - sym: 2A - desc: data input - - num: 6 - sym: 2B - desc: data input - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1Y: + desc: 'data output' + 2Y: + desc: 'data output' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + GND: desc: ground - - num: 8 - sym: 3A - desc: data input - - num: 9 - sym: 3B - desc: data input - - num: 10 - sym: 3Y - desc: data output - - num: 11 - sym: 4Y - desc: data output - - num: 12 - sym: 4A - desc: data input - - num: 13 - sym: 4B - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage -... - - - - + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3Y: + desc: 'data output' + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 4B: + desc: 'data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 1A + - 1B + - 1Y + - 2Y + - 2A + - 2B + - GND + - 3A + - 3B + - 3Y + - 4Y + - 4A + - 4B + - Vcc diff --git a/4072.yaml b/4072.yaml index 3e3c4e3..1750c0d 100644 --- a/4072.yaml +++ b/4072.yaml @@ -1,52 +1,44 @@ ---- -description: Dual 4-input OR gate -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4072b.pdf" +description: 'Dual 4-input OR gate' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4072b.pdf' pins: - - num: 1 - sym: 1Y - desc: data output - - num: 2 - sym: 1A - desc: data input - - num: 3 - sym: 1B - desc: data input - - num: 4 - sym: 1C - desc: data input - - num: 5 - sym: 1D - desc: data input - - num: 6 - sym: NC - desc: no connection - - num: 7 - sym: GND + 1Y: + desc: 'data output' + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1C: + desc: 'data input' + 1D: + desc: 'data input' + GND: desc: ground - - num: 8 - sym: NC - desc: no connection - - num: 9 - sym: 2A - desc: data input - - num: 10 - sym: 2B - desc: data input - - num: 11 - sym: 2C - desc: data input - - num: 12 - sym: 2D - desc: data input - - num: 13 - sym: 2Y - desc: data output - - num: 14 - sym: Vcc - desc: supply voltage -... - - + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 2C: + desc: 'data input' + 2D: + desc: 'data input' + 2Y: + desc: 'data output' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 1Y + - 1A + - 1B + - 1C + - 1D + - NC + - GND + - NC + - 2A + - 2B + - 2C + - 2D + - 2Y + - Vcc diff --git a/4073.yaml b/4073.yaml index 4320b49..c3e4f11 100644 --- a/4073.yaml +++ b/4073.yaml @@ -1,52 +1,48 @@ ---- -description: "Triple 3-input AND gate" -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4073b.pdf" +description: 'Triple 3-input AND gate' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4073b.pdf' pins: - - num: 1 - sym: 2A - desc: data input - - num: 2 - sym: 2B - desc: data input - - num: 3 - sym: 1A - desc: data input - - num: 4 - sym: 1B - desc: data input - - num: 5 - sym: 1C - desc: data input - - num: 6 - sym: 1Y - desc: data output - - num: 7 - sym: GND + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1C: + desc: 'data input' + 1Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 2C - desc: data input - - num: 9 - sym: 2Y - desc: data output - - num: 10 - sym: 3Y - desc: data output - - num: 11 - sym: 3A - desc: data input - - num: 12 - sym: 3B - desc: data input - - num: 13 - sym: 3C - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage -... - - + 2C: + desc: 'data input' + 2Y: + desc: 'data output' + 3Y: + desc: 'data output' + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3C: + desc: 'data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 2A + - 2B + - 1A + - 1B + - 1C + - 1Y + - GND + - 2C + - 2Y + - 3Y + - 3A + - 3B + - 3C + - Vcc diff --git a/4075.yaml b/4075.yaml index e71f759..d227fa8 100644 --- a/4075.yaml +++ b/4075.yaml @@ -1,53 +1,48 @@ ---- -description: "Triple 3-input OR gate" -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4075b.pdf" +description: 'Triple 3-input OR gate' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4075b.pdf' pins: - - num: 1 - sym: 2A - desc: data input - - num: 2 - sym: 2B - desc: data input - - num: 3 - sym: 1A - desc: data input - - num: 4 - sym: 1B - desc: data input - - num: 5 - sym: 1C - desc: data input - - num: 6 - sym: 1Y - desc: data output - - num: 7 - sym: GND + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1C: + desc: 'data input' + 1Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 2C - desc: data input - - num: 9 - sym: 2Y - desc: data output - - num: 10 - sym: 3Y - desc: data output - - num: 11 - sym: 3A - desc: data input - - num: 12 - sym: 3B - desc: data input - - num: 13 - sym: 3C - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage -... - - - + 2C: + desc: 'data input' + 2Y: + desc: 'data output' + 3Y: + desc: 'data output' + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3C: + desc: 'data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 2A + - 2B + - 1A + - 1B + - 1C + - 1Y + - GND + - 2C + - 2Y + - 3Y + - 3A + - 3B + - 3C + - Vcc diff --git a/4077.yaml b/4077.yaml index fbbeb92..a3134a7 100644 --- a/4077.yaml +++ b/4077.yaml @@ -1,53 +1,48 @@ ---- -description: Quad 2-input XNOR gate -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4077b.pdf" +description: 'Quad 2-input XNOR gate' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4077b.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: 1Y - desc: data output - - num: 4 - sym: 2Y - desc: data output - - num: 5 - sym: 2A - desc: data input - - num: 6 - sym: 2B - desc: data input - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1Y: + desc: 'data output' + 2Y: + desc: 'data output' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + GND: desc: ground - - num: 8 - sym: 3A - desc: data input - - num: 9 - sym: 3B - desc: data input - - num: 10 - sym: 3Y - desc: data output - - num: 11 - sym: 4Y - desc: data output - - num: 12 - sym: 4A - desc: data input - - num: 13 - sym: 4B - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage -... - - - + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3Y: + desc: 'data output' + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 4B: + desc: 'data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 1A + - 1B + - 1Y + - 2Y + - 2A + - 2B + - GND + - 3A + - 3B + - 3Y + - 4Y + - 4A + - 4B + - Vcc diff --git a/4081.yaml b/4081.yaml index 7995e34..8da6162 100644 --- a/4081.yaml +++ b/4081.yaml @@ -1,54 +1,48 @@ ---- -description: Quad 2-input AND gate -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4081b.pdf" +description: 'Quad 2-input AND gate' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4081b.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: 1Y - desc: data output - - num: 4 - sym: 2Y - desc: data output - - num: 5 - sym: 2A - desc: data input - - num: 6 - sym: 2B - desc: data input - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1Y: + desc: 'data output' + 2Y: + desc: 'data output' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + GND: desc: ground - - num: 8 - sym: 3A - desc: data input - - num: 9 - sym: 3B - desc: data input - - num: 10 - sym: 3Y - desc: data output - - num: 11 - sym: 4Y - desc: data output - - num: 12 - sym: 4A - desc: data input - - num: 13 - sym: 4B - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage -... - - - - + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3Y: + desc: 'data output' + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 4B: + desc: 'data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 1A + - 1B + - 1Y + - 2Y + - 2A + - 2B + - GND + - 3A + - 3B + - 3Y + - 4Y + - 4A + - 4B + - Vcc diff --git a/4082.yaml b/4082.yaml index d7cd454..82f3a81 100644 --- a/4082.yaml +++ b/4082.yaml @@ -1,53 +1,44 @@ ---- -description: Dual 4-input AND gate -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4082b.pdf" +description: 'Dual 4-input AND gate' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4082b.pdf' pins: - - num: 1 - sym: 1Y - desc: data output - - num: 2 - sym: 1A - desc: data input - - num: 3 - sym: 1B - desc: data input - - num: 4 - sym: 1C - desc: data input - - num: 5 - sym: 1D - desc: data input - - num: 6 - sym: NC - desc: no connection - - num: 7 - sym: GND + 1Y: + desc: 'data output' + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1C: + desc: 'data input' + 1D: + desc: 'data input' + GND: desc: ground - - num: 8 - sym: NC - desc: no connection - - num: 9 - sym: 2A - desc: data input - - num: 10 - sym: 2B - desc: data input - - num: 11 - sym: 2C - desc: data input - - num: 12 - sym: 2D - desc: data input - - num: 13 - sym: 2Y - desc: data output - - num: 14 - sym: Vcc - desc: supply voltage -... - - - + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 2C: + desc: 'data input' + 2D: + desc: 'data input' + 2Y: + desc: 'data output' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 1Y + - 1A + - 1B + - 1C + - 1D + - NC + - GND + - NC + - 2A + - 2B + - 2C + - 2D + - 2Y + - Vcc diff --git a/4085.yaml b/4085.yaml index 6156c3c..92cea8b 100644 --- a/4085.yaml +++ b/4085.yaml @@ -1,53 +1,50 @@ ---- -description: "Dual 2-wide 2-input AND-OR-INVERT gate" -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://focus.ti.com/lit/ds/symlink/cd4085b.pdf" +description: 'Dual 2-wide 2-input AND-OR-INVERT gate' +family: '4000' +datasheet: 'http://focus.ti.com/lit/ds/symlink/cd4085b.pdf' pins: - - num: 1 - sym: A1 - desc: data input - - num: 2 - sym: B1 - desc: data input - - num: 3 - sym: Q1 - desc: data output (see note) - - num: 4 - sym: Q2 - desc: data output (see note) - - num: 5 - sym: A2 - desc: data input - - num: 6 - sym: B2 - desc: data input - - num: 7 - sym: GND + A1: + desc: 'data input' + B1: + desc: 'data input' + Q1: + desc: 'data output (see note)' + Q2: + desc: 'data output (see note)' + A2: + desc: 'data input' + B2: + desc: 'data input' + GND: desc: ground - - num: 8 - sym: C2 - desc: data input - - num: 9 - sym: D2 - desc: data input - - num: 10 - sym: INH1 + C2: + desc: 'data input' + D2: + desc: 'data input' + INH1: desc: inhibit - - num: 11 - sym: INH2 + INH2: desc: inhibit - - num: 12 - sym: C1 - desc: data input - - num: 13 - sym: D1 - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage + C1: + desc: 'data input' + D1: + desc: 'data input' + Vcc: + desc: 'supply voltage' notes: - - Q = INH OR (A AND B) OR (C AND D) -... - + - 'Q = INH OR (A AND B) OR (C AND D)' +packages: + DIP: + - A1 + - B1 + - Q1 + - Q2 + - A2 + - B2 + - GND + - C2 + - D2 + - INH1 + - INH2 + - C1 + - D1 + - Vcc diff --git a/4093.yaml b/4093.yaml index 4895ac9..c678b02 100644 --- a/4093.yaml +++ b/4093.yaml @@ -1,51 +1,48 @@ ---- -description: Quad 2-input NAND Schmitt trigger -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4093b.pdf" +description: 'Quad 2-input NAND Schmitt trigger' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4093b.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: 1Y - desc: data output - - num: 4 - sym: 2Y - desc: data output - - num: 5 - sym: 2A - desc: data input - - num: 6 - sym: 2B - desc: data input - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1Y: + desc: 'data output' + 2Y: + desc: 'data output' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + GND: desc: ground - - num: 8 - sym: 3A - desc: data input - - num: 9 - sym: 3B - desc: data input - - num: 10 - sym: 3Y - desc: data output - - num: 11 - sym: 4Y - desc: data output - - num: 12 - sym: 4A - desc: data input - - num: 13 - sym: 4B - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage -... - + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3Y: + desc: 'data output' + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 4B: + desc: 'data input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - 1A + - 1B + - 1Y + - 2Y + - 2A + - 2B + - GND + - 3A + - 3B + - 3Y + - 4Y + - 4A + - 4B + - Vcc diff --git a/4094.yaml b/4094.yaml index b5ef601..a4c4d74 100644 --- a/4094.yaml +++ b/4094.yaml @@ -1,57 +1,54 @@ ---- -description: 8-stage shift-and-store bus register -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4094b.pdf" +description: '8-stage shift-and-store bus register' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4094b.pdf' pins: - - num: 1 - sym: STR - desc: strobe input (active high) - - num: 2 - sym: D - desc: data input - - num: 3 - sym: CP - desc: clock input (low-to-high edge-triggered) - - num: 4 - sym: QP0 - desc: parallel output - - num: 5 - sym: QP1 - desc: parallel output - - num: 6 - sym: QP2 - desc: parallel output - - num: 7 - sym: QP3 - desc: parallel output - - num: 8 - sym: GND + STR: + desc: 'strobe input (active high)' + D: + desc: 'data input' + CP: + desc: 'clock input (low-to-high edge-triggered)' + QP0: + desc: 'parallel output' + QP1: + desc: 'parallel output' + QP2: + desc: 'parallel output' + QP3: + desc: 'parallel output' + GND: desc: ground - - num: 9 - sym: QS1 - desc: serial output - - num: 10 - sym: QS2 - desc: serial output - - num: 11 - sym: QP7 - desc: parallel output - - num: 12 - sym: QP6 - desc: parallel output - - num: 13 - sym: QP5 - desc: parallel output - - num: 14 - sym: QP4 - desc: parallel output - - num: 15 - sym: OE - desc: output enable - - num: 16 - sym: Vcc - desc: supply voltage (active high) -... - + QS1: + desc: 'serial output' + QS2: + desc: 'serial output' + QP7: + desc: 'parallel output' + QP6: + desc: 'parallel output' + QP5: + desc: 'parallel output' + QP4: + desc: 'parallel output' + OE: + desc: 'output enable' + Vcc: + desc: 'supply voltage (active high)' +packages: + DIP: + - STR + - D + - CP + - QP0 + - QP1 + - QP2 + - QP3 + - GND + - QS1 + - QS2 + - QP7 + - QP6 + - QP5 + - QP4 + - OE + - Vcc diff --git a/4099.yaml b/4099.yaml index 3d58815..65a79aa 100644 --- a/4099.yaml +++ b/4099.yaml @@ -1,57 +1,54 @@ ---- -description: "8-bit addressable latch" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://focus.ti.com/lit/ds/symlink/cd4099b.pdf" +description: '8-bit addressable latch' +family: '4000' +datasheet: 'http://focus.ti.com/lit/ds/symlink/cd4099b.pdf' pins: - - num: 1 - sym: Q7 - desc: latch output - - num: 2 - sym: RESET - desc: master reset (all bits to 0; active high) - - num: 3 - sym: DATA - desc: data input - - num: 4 - sym: ~WRITE - desc: write enable (active low) - - num: 5 - sym: A0 - desc: address input - - num: 6 - sym: A1 - desc: address input - - num: 7 - sym: A2 - desc: address input - - num: 8 - sym: GND + Q7: + desc: 'latch output' + RESET: + desc: 'master reset (all bits to 0; active high)' + DATA: + desc: 'data input' + '~WRITE': + desc: 'write enable (active low)' + A0: + desc: 'address input' + A1: + desc: 'address input' + A2: + desc: 'address input' + GND: desc: ground - - num: 9 - sym: Q0 - desc: latch output - - num: 10 - sym: Q1 - desc: latch output - - num: 11 - sym: Q2 - desc: latch output - - num: 12 - sym: Q3 - desc: latch output - - num: 13 - sym: Q4 - desc: latch output - - num: 14 - sym: Q5 - desc: latch output - - num: 15 - sym: Q6 - desc: latch output - - num: 16 - sym: Vcc - desc: supply voltage -... - + Q0: + desc: 'latch output' + Q1: + desc: 'latch output' + Q2: + desc: 'latch output' + Q3: + desc: 'latch output' + Q4: + desc: 'latch output' + Q5: + desc: 'latch output' + Q6: + desc: 'latch output' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - Q7 + - RESET + - DATA + - '~WRITE' + - A0 + - A1 + - A2 + - GND + - Q0 + - Q1 + - Q2 + - Q3 + - Q4 + - Q5 + - Q6 + - Vcc diff --git a/4511.yaml b/4511.yaml index 1779a04..339f89f 100644 --- a/4511.yaml +++ b/4511.yaml @@ -1,60 +1,57 @@ ---- -description: "BCD to 7-segment latch/decoder/driver" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4511b.pdf" +description: 'BCD to 7-segment latch/decoder/driver' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4511b.pdf' pins: - - num: 1 - sym: D1 - desc: BCD input - - num: 2 - sym: D2 - desc: BCD input - - num: 3 - sym: ~LT - desc: lamp test (lights all segments, active low) - - num: 4 - sym: ~BL - desc: blank (active low) - - num: 5 - sym: LE - desc: latch enable (active high) - - num: 6 - sym: D3 - desc: BCD input - - num: 7 - sym: D0 - desc: BCD input - - num: 8 - sym: GND + D1: + desc: 'BCD input' + D2: + desc: 'BCD input' + '~LT': + desc: 'lamp test (lights all segments, active low)' + '~BL': + desc: 'blank (active low)' + LE: + desc: 'latch enable (active high)' + D3: + desc: 'BCD input' + D0: + desc: 'BCD input' + GND: desc: ground - - num: 9 - sym: Qe - desc: segment output - - num: 10 - sym: Qd - desc: segment output - - num: 11 - sym: Qc - desc: segment output - - num: 12 - sym: Qb - desc: segment output - - num: 13 - sym: Qa - desc: segment output - - num: 14 - sym: Qf - desc: segment output - - num: 15 - sym: Qg - desc: segment output - - num: 16 - sym: Vcc - desc: supply voltage + Qe: + desc: 'segment output' + Qd: + desc: 'segment output' + Qc: + desc: 'segment output' + Qb: + desc: 'segment output' + Qa: + desc: 'segment output' + Qf: + desc: 'segment output' + Qg: + desc: 'segment output' + Vcc: + desc: 'supply voltage' notes: - - Pins for lit segments are high. The 4511 can directly drive a common cathode LED display. - - Display is blanked for inputs greater than 9. -... - + - 'Pins for lit segments are high. The 4511 can directly drive a common cathode LED display.' + - 'Display is blanked for inputs greater than 9.' +packages: + DIP: + - D1 + - D2 + - '~LT' + - '~BL' + - LE + - D3 + - D0 + - GND + - Qe + - Qd + - Qc + - Qb + - Qa + - Qf + - Qg + - Vcc diff --git a/4514.yaml b/4514.yaml index f097573..26276e2 100644 --- a/4514.yaml +++ b/4514.yaml @@ -1,84 +1,81 @@ ---- -description: "1-of-16 decoder/demultiplexer with input latches" -package: DIP -pincount: 24 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4514b.pdf" +description: '1-of-16 decoder/demultiplexer with input latches' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4514b.pdf' pins: - - num: 1 - sym: LE - desc: latch enable (active high) - - num: 2 - sym: A0 - desc: address input - - num: 3 - sym: A1 - desc: address input - - num: 4 - sym: Q7 + LE: + desc: 'latch enable (active high)' + A0: + desc: 'address input' + A1: + desc: 'address input' + Q7: desc: output - - num: 5 - sym: Q6 + Q6: desc: output - - num: 6 - sym: Q5 + Q5: desc: output - - num: 7 - sym: Q4 + Q4: desc: output - - num: 8 - sym: Q3 + Q3: desc: output - - num: 9 - sym: Q1 + Q1: desc: output - - num: 10 - sym: Q2 + Q2: desc: output - - num: 11 - sym: Q0 + Q0: desc: output - - num: 12 - sym: GND + GND: desc: ground - - num: 13 - sym: Q13 - desc: output - - num: 14 - sym: Q12 - desc: output - - num: 15 - sym: Q15 - desc: output - - num: 16 - sym: Q14 - desc: output - - num: 17 - sym: Q9 - desc: output - - num: 18 - sym: Q8 - desc: output - - num: 19 - sym: Q11 - desc: output - - num: 20 - sym: Q10 - desc: output - - num: 21 - sym: A2 - desc: address input - - num: 22 - sym: A3 - desc: address input - - num: 23 - sym: ~E - desc: enable (active low) - - num: 24 - sym: Vcc - desc: supply voltage + Q13: + desc: output + Q12: + desc: output + Q15: + desc: output + Q14: + desc: output + Q9: + desc: output + Q8: + desc: output + Q11: + desc: output + Q10: + desc: output + A2: + desc: 'address input' + A3: + desc: 'address input' + '~E': + desc: 'enable (active low)' + Vcc: + desc: 'supply voltage' notes: - - Outputs are mutually exclusive active high. - - When ~E is high, all outputs are low. -... - + - 'Outputs are mutually exclusive active high.' + - 'When ~E is high, all outputs are low.' +packages: + DIP: + - LE + - A0 + - A1 + - Q7 + - Q6 + - Q5 + - Q4 + - Q3 + - Q1 + - Q2 + - Q0 + - GND + - Q13 + - Q12 + - Q15 + - Q14 + - Q9 + - Q8 + - Q11 + - Q10 + - A2 + - A3 + - '~E' + - Vcc diff --git a/4515.yaml b/4515.yaml index 4f1a6ff..90cd545 100644 --- a/4515.yaml +++ b/4515.yaml @@ -1,85 +1,81 @@ ---- -description: "1-of-16 decoder/demultiplexer with input latches; inverting" -package: DIP -pincount: 24 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4515b.pdf" +description: '1-of-16 decoder/demultiplexer with input latches; inverting' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4515b.pdf' pins: - - num: 1 - sym: LE - desc: latch enable (active high) - - num: 2 - sym: A0 - desc: address input - - num: 3 - sym: A1 - desc: address input - - num: 4 - sym: ~Q~7 + LE: + desc: 'latch enable (active high)' + A0: + desc: 'address input' + A1: + desc: 'address input' + '~Q~7': desc: output - - num: 5 - sym: ~Q~6 + '~Q~6': desc: output - - num: 6 - sym: ~Q~5 + '~Q~5': desc: output - - num: 7 - sym: ~Q~4 + '~Q~4': desc: output - - num: 8 - sym: ~Q~3 + '~Q~3': desc: output - - num: 9 - sym: ~Q~1 + '~Q~1': desc: output - - num: 10 - sym: ~Q~2 + '~Q~2': desc: output - - num: 11 - sym: ~Q~0 + '~Q~0': desc: output - - num: 12 - sym: GND + GND: desc: ground - - num: 13 - sym: ~Q~13 - desc: output - - num: 14 - sym: ~Q~12 - desc: output - - num: 15 - sym: ~Q~15 - desc: output - - num: 16 - sym: ~Q~14 - desc: output - - num: 17 - sym: ~Q~9 - desc: output - - num: 18 - sym: ~Q~8 - desc: output - - num: 19 - sym: ~Q~11 - desc: output - - num: 20 - sym: ~Q~10 - desc: output - - num: 21 - sym: A2 - desc: address input - - num: 22 - sym: A3 - desc: address input - - num: 23 - sym: ~E - desc: enable (active low) - - num: 24 - sym: Vcc - desc: supply voltage + '~Q~13': + desc: output + '~Q~12': + desc: output + '~Q~15': + desc: output + '~Q~14': + desc: output + '~Q~9': + desc: output + '~Q~8': + desc: output + '~Q~11': + desc: output + '~Q~10': + desc: output + A2: + desc: 'address input' + A3: + desc: 'address input' + '~E': + desc: 'enable (active low)' + Vcc: + desc: 'supply voltage' notes: - - Outputs are mutually exclusive active low. - - When ~E is high, all outputs are high. -... - - + - 'Outputs are mutually exclusive active low.' + - 'When ~E is high, all outputs are high.' +packages: + DIP: + - LE + - A0 + - A1 + - '~Q~7' + - '~Q~6' + - '~Q~5' + - '~Q~4' + - '~Q~3' + - '~Q~1' + - '~Q~2' + - '~Q~0' + - GND + - '~Q~13' + - '~Q~12' + - '~Q~15' + - '~Q~14' + - '~Q~9' + - '~Q~8' + - '~Q~11' + - '~Q~10' + - A2 + - A3 + - '~E' + - Vcc diff --git a/4516.yaml b/4516.yaml index f6d3a03..306c694 100644 --- a/4516.yaml +++ b/4516.yaml @@ -1,61 +1,58 @@ ---- -description: "4-bit binary up/down counter" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4516b.pdf" +description: '4-bit binary up/down counter' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4516b.pdf' pins: - - num: 1 - sym: PL - desc: parallel load (active high) - - num: 2 - sym: Q3 - desc: count output - - num: 3 - sym: D3 - desc: parallel input - - num: 4 - sym: D0 - desc: parallel input - - num: 5 - sym: ~CE - desc: count enable (active low) - - num: 6 - sym: Q0 - desc: count output - - num: 7 - sym: ~TC - desc: terminal count output (active low) - - num: 8 - sym: GND + PL: + desc: 'parallel load (active high)' + Q3: + desc: 'count output' + D3: + desc: 'parallel input' + D0: + desc: 'parallel input' + '~CE': + desc: 'count enable (active low)' + Q0: + desc: 'count output' + '~TC': + desc: 'terminal count output (active low)' + GND: desc: ground - - num: 9 - sym: MR - desc: master reset (active high) - - num: 10 - sym: UP/~DN - desc: up/down count control - - num: 11 - sym: Q1 - desc: count output - - num: 12 - sym: D1 - desc: parallel input - - num: 13 - sym: D2 - desc: parallel input - - num: 14 - sym: Q2 - desc: count output - - num: 15 - sym: CP - desc: clock input (low-to-high edge-triggered) - - num: 16 - sym: Vcc - desc: supply voltage + MR: + desc: 'master reset (active high)' + 'UP/~DN': + desc: 'up/down count control' + Q1: + desc: 'count output' + D1: + desc: 'parallel input' + D2: + desc: 'parallel input' + Q2: + desc: 'count output' + CP: + desc: 'clock input (low-to-high edge-triggered)' + Vcc: + desc: 'supply voltage' notes: - - When counting up, ~TC goes low when the count is 15. - - When counting down, ~TC goes low when the count is 0. - - ~TC is always high when ~CE is high (counting is disabled). -... - + - 'When counting up, ~TC goes low when the count is 15.' + - 'When counting down, ~TC goes low when the count is 0.' + - '~TC is always high when ~CE is high (counting is disabled).' +packages: + DIP: + - PL + - Q3 + - D3 + - D0 + - '~CE' + - Q0 + - '~TC' + - GND + - MR + - 'UP/~DN' + - Q1 + - D1 + - D2 + - Q2 + - CP + - Vcc diff --git a/4518.yaml b/4518.yaml index c1dde1e..2717c95 100644 --- a/4518.yaml +++ b/4518.yaml @@ -1,63 +1,59 @@ ---- -description: "Dual synchronous BCD counter" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4518b.pdf" +description: 'Dual synchronous BCD counter' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4518b.pdf' pins: - - num: 1 - sym: 1CP0 - desc: counter 1 clock input (low-to-high triggered) - - num: 2 - sym: 1~CP~1 - desc: counter 1 clock input (high-to-low triggered) - - num: 3 - sym: 1Q0 - desc: counter 1 output - - num: 4 - sym: 1Q1 - desc: counter 1 output - - num: 5 - sym: 1Q2 - desc: counter 1 output - - num: 6 - sym: 1Q3 - desc: counter 1 output - - num: 7 - sym: 1MR - desc: counter 1 master reset (active high) - - num: 8 - sym: GND + 1CP0: + desc: 'counter 1 clock input (low-to-high triggered)' + '1~CP~1': + desc: 'counter 1 clock input (high-to-low triggered)' + 1Q0: + desc: 'counter 1 output' + 1Q1: + desc: 'counter 1 output' + 1Q2: + desc: 'counter 1 output' + 1Q3: + desc: 'counter 1 output' + 1MR: + desc: 'counter 1 master reset (active high)' + GND: desc: ground - - num: 9 - sym: 2CP0 - desc: counter 2 clock input (low-to-high triggered) - - num: 10 - sym: 2~CP~1 - desc: counter 2 clock input (high-to-low triggered) - - num: 11 - sym: 2Q0 - desc: counter 2 output - - num: 12 - sym: 2Q1 - desc: counter 2 output - - num: 13 - sym: 2Q2 - desc: counter 2 output - - num: 14 - sym: 2Q3 - desc: counter 2 output - - num: 15 - sym: 2MR - desc: counter 2 master reset (active high) - - num: 16 - sym: Vcc - desc: supply voltage + 2CP0: + desc: 'counter 2 clock input (low-to-high triggered)' + '2~CP~1': + desc: 'counter 2 clock input (high-to-low triggered)' + 2Q0: + desc: 'counter 2 output' + 2Q1: + desc: 'counter 2 output' + 2Q2: + desc: 'counter 2 output' + 2Q3: + desc: 'counter 2 output' + 2MR: + desc: 'counter 2 master reset (active high)' + Vcc: + desc: 'supply voltage' notes: - - The 4518 counts from 0 to 9. The 4520 is identical but counts from 0 to 15. - - Either nCP0 or n~CP~1 may be used as the clock input; the other can be used as a clock enable input. - - If n~CP~1 is high, the counter advances on a low-to-high transition of nCP0. - - If nCP0 is low, the counter advances on a high-to-low transition of n~CP~1. -... - - + - 'The 4518 counts from 0 to 9. The 4520 is identical but counts from 0 to 15.' + - 'Either nCP0 or n~CP~1 may be used as the clock input; the other can be used as a clock enable input.' + - 'If n~CP~1 is high, the counter advances on a low-to-high transition of nCP0.' + - 'If nCP0 is low, the counter advances on a high-to-low transition of n~CP~1.' +packages: + DIP: + - 1CP0 + - '1~CP~1' + - 1Q0 + - 1Q1 + - 1Q2 + - 1Q3 + - 1MR + - GND + - 2CP0 + - '2~CP~1' + - 2Q0 + - 2Q1 + - 2Q2 + - 2Q3 + - 2MR + - Vcc diff --git a/4520.yaml b/4520.yaml index 3fac29b..905cad5 100644 --- a/4520.yaml +++ b/4520.yaml @@ -1,63 +1,59 @@ ---- -description: "Dual 4-bit synchronous binary counter" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4520b.pdf" +description: 'Dual 4-bit synchronous binary counter' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4520b.pdf' pins: - - num: 1 - sym: 1CP0 - desc: counter 1 clock input (low-to-high triggered) - - num: 2 - sym: 1~CP~1 - desc: counter 1 clock input (high-to-low triggered) - - num: 3 - sym: 1Q0 - desc: counter 1 output - - num: 4 - sym: 1Q1 - desc: counter 1 output - - num: 5 - sym: 1Q2 - desc: counter 1 output - - num: 6 - sym: 1Q3 - desc: counter 1 output - - num: 7 - sym: 1MR - desc: counter 1 master reset (active high) - - num: 8 - sym: GND + 1CP0: + desc: 'counter 1 clock input (low-to-high triggered)' + '1~CP~1': + desc: 'counter 1 clock input (high-to-low triggered)' + 1Q0: + desc: 'counter 1 output' + 1Q1: + desc: 'counter 1 output' + 1Q2: + desc: 'counter 1 output' + 1Q3: + desc: 'counter 1 output' + 1MR: + desc: 'counter 1 master reset (active high)' + GND: desc: ground - - num: 9 - sym: 2CP0 - desc: counter 2 clock input (low-to-high triggered) - - num: 10 - sym: 2~CP~1 - desc: counter 2 clock input (high-to-low triggered) - - num: 11 - sym: 2Q0 - desc: counter 2 output - - num: 12 - sym: 2Q1 - desc: counter 2 output - - num: 13 - sym: 2Q2 - desc: counter 2 output - - num: 14 - sym: 2Q3 - desc: counter 2 output - - num: 15 - sym: 2MR - desc: counter 2 master reset (active high) - - num: 16 - sym: Vcc - desc: supply voltage + 2CP0: + desc: 'counter 2 clock input (low-to-high triggered)' + '2~CP~1': + desc: 'counter 2 clock input (high-to-low triggered)' + 2Q0: + desc: 'counter 2 output' + 2Q1: + desc: 'counter 2 output' + 2Q2: + desc: 'counter 2 output' + 2Q3: + desc: 'counter 2 output' + 2MR: + desc: 'counter 2 master reset (active high)' + Vcc: + desc: 'supply voltage' notes: - - The 4520 counts from 0 to 15. The 4518 is identical but counts from 0 to 9. - - Either nCP0 or n~CP~1 may be used as the clock input; the other can be used as a clock enable input. - - If n~CP~1 is high, the counter advances on a low-to-high transition of nCP0. - - If nCP0 is low, the counter advances on a high-to-low transition of n~CP~1. -... - - + - 'The 4520 counts from 0 to 15. The 4518 is identical but counts from 0 to 9.' + - 'Either nCP0 or n~CP~1 may be used as the clock input; the other can be used as a clock enable input.' + - 'If n~CP~1 is high, the counter advances on a low-to-high transition of nCP0.' + - 'If nCP0 is low, the counter advances on a high-to-low transition of n~CP~1.' +packages: + DIP: + - 1CP0 + - '1~CP~1' + - 1Q0 + - 1Q1 + - 1Q2 + - 1Q3 + - 1MR + - GND + - 2CP0 + - '2~CP~1' + - 2Q0 + - 2Q1 + - 2Q2 + - 2Q3 + - 2MR + - Vcc diff --git a/4526.yaml b/4526.yaml index cfcc279..5438be7 100644 --- a/4526.yaml +++ b/4526.yaml @@ -1,63 +1,59 @@ ---- -description: "Programmable 4-bit binary down counter" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4526b.pdf" +description: 'Programmable 4-bit binary down counter' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4526b.pdf' pins: - - num: 1 - sym: Q3 - desc: count output - - num: 2 - sym: P3 - desc: parallel input - - num: 3 - sym: PL - desc: parallel load (active high) - - num: 4 - sym: ~CP~1 - desc: clock input (high-to-low triggered) - - num: 5 - sym: P0 - desc: parallel input - - num: 6 - sym: CP0 - desc: clock input (low-to-high triggered) - - num: 7 - sym: Q0 - desc: count output - - num: 8 - sym: GND + Q3: + desc: 'count output' + P3: + desc: 'parallel input' + PL: + desc: 'parallel load (active high)' + '~CP~1': + desc: 'clock input (high-to-low triggered)' + P0: + desc: 'parallel input' + CP0: + desc: 'clock input (low-to-high triggered)' + Q0: + desc: 'count output' + GND: desc: ground - - num: 9 - sym: Q1 - desc: count output - - num: 10 - sym: MR - desc: asynchronous master reset (active high) - - num: 11 - sym: P1 - desc: parallel input - - num: 12 - sym: TC - desc: terminal count output - - num: 13 - sym: CF - desc: cascade feedback input - - num: 14 - sym: P2 - desc: parallel input - - num: 15 - sym: Q2 - desc: count output - - num: 16 - sym: Vcc - desc: supply voltage - + Q1: + desc: 'count output' + MR: + desc: 'asynchronous master reset (active high)' + P1: + desc: 'parallel input' + TC: + desc: 'terminal count output' + CF: + desc: 'cascade feedback input' + P2: + desc: 'parallel input' + Q2: + desc: 'count output' + Vcc: + desc: 'supply voltage' notes: - - When ~CP~1 is low, the counter advances on a low-to-high transition of CP0. - - When CP0 is high, the counter advances on a high-to-low transition of ~CP~1. - - TC goes high when the count is 0, CF is high, and PL is low. - - For a single-stage divide-by-n circuit, connect the TC output to PL and set the P0-P3 inputs to n. -... - + - 'When ~CP~1 is low, the counter advances on a low-to-high transition of CP0.' + - 'When CP0 is high, the counter advances on a high-to-low transition of ~CP~1.' + - 'TC goes high when the count is 0, CF is high, and PL is low.' + - 'For a single-stage divide-by-n circuit, connect the TC output to PL and set the P0-P3 inputs to n.' +packages: + DIP: + - Q3 + - P3 + - PL + - '~CP~1' + - P0 + - CP0 + - Q0 + - GND + - Q1 + - MR + - P1 + - TC + - CF + - P2 + - Q2 + - Vcc diff --git a/4528.yaml b/4528.yaml index 4695cc2..7da7d35 100644 --- a/4528.yaml +++ b/4528.yaml @@ -1,73 +1,73 @@ ---- -description: "Dual retriggerable monostable multivibrator with reset" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4528b.pdf" +description: 'Dual retriggerable monostable multivibrator with reset' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4528b.pdf' pins: - - num: 1 - sym: 1CEXT - desc: external capacitor connection (connect to capacitor and ground) - - num: 2 - sym: 1REXT/CEXT - desc: external capacitor/resistor connection - - num: 3 - sym: 1~CD - desc: clear direct input (active low) - - num: 4 - sym: 1B - desc: input (low-to-high triggered) - - num: 5 - sym: 1~A - desc: input (high-to-low triggered) - - num: 6 - sym: 1Q + 1CEXT: + desc: 'external capacitor connection (connect to capacitor and ground)' + 1REXT/CEXT: + desc: 'external capacitor/resistor connection' + '1~CD': + desc: 'clear direct input (active low)' + 1B: + desc: 'input (low-to-high triggered)' + '1~A': + desc: 'input (high-to-low triggered)' + 1Q: desc: output - - num: 7 - sym: 1~Q - desc: complementary output - - num: 8 - sym: GND + '1~Q': + desc: 'complementary output' + GND: desc: ground - - num: 9 - sym: 2~Q - desc: complementary output - - num: 10 - sym: 2Q + '2~Q': + desc: 'complementary output' + 2Q: desc: output - - num: 11 - sym: 2~A - desc: input (high-to-low triggered) - - num: 12 - sym: 2B - desc: input (low-to-high triggered) - - num: 13 - sym: 2~CD - desc: clear direct input (active low) - - num: 14 - sym: 2REXT/CEXT - desc: external capacitor/resistor connection - - num: 15 - sym: 2CEXT - desc: external capacitor connection (connect to capacitor and ground) - - num: 16 - sym: Vcc - desc: supply voltage + '2~A': + desc: 'input (high-to-low triggered)' + 2B: + desc: 'input (low-to-high triggered)' + '2~CD': + desc: 'clear direct input (active low)' + 2REXT/CEXT: + desc: 'external capacitor/resistor connection' + 2CEXT: + desc: 'external capacitor connection (connect to capacitor and ground)' + Vcc: + desc: 'supply voltage' specs: - - param: "External timing resistor R__EXT" - val: [5 (min), 2000 (max)] - unit: "kΩ" - - param: "Pulse width variation, Vcc = 5V" - val: "±3" - unit: "%" + - + param: 'External timing resistor R__EXT' + val: + - '5 (min)' + - '2000 (max)' + unit: 'kΩ' + - + param: 'Pulse width variation, Vcc = 5V' + val: '±3' + unit: '%' notes: - - Connect a timing capacitor C__EXT between nCEXT and nREXT/CEXT. - - Connect a resistor R__EXT between nREXT/CEXT and Vcc. - - A high-to-low transition on n~A when nB is low causes a pulse on nQ and n~Q. - - A low-to-high transition on nB when n~A is high causes a pulse on nQ and n~Q. - - Setting n~CD low inhibits pulses. - - "(CD4528) For C__EXT > 0.01 µF and Vcc = 5V, output pulse width = 0.2 × R__EXT × C__EXT." - - "(HEF4528) For C__EXT > 0.01 µF and Vcc = 5V, output pulse width = 0.42 × R__EXT × C__EXT." -... - - + - 'Connect a timing capacitor C__EXT between nCEXT and nREXT/CEXT.' + - 'Connect a resistor R__EXT between nREXT/CEXT and Vcc.' + - 'A high-to-low transition on n~A when nB is low causes a pulse on nQ and n~Q.' + - 'A low-to-high transition on nB when n~A is high causes a pulse on nQ and n~Q.' + - 'Setting n~CD low inhibits pulses.' + - '(CD4528) For C__EXT > 0.01 µF and Vcc = 5V, output pulse width = 0.2 × R__EXT × C__EXT.' + - '(HEF4528) For C__EXT > 0.01 µF and Vcc = 5V, output pulse width = 0.42 × R__EXT × C__EXT.' +packages: + DIP: + - 1CEXT + - 1REXT/CEXT + - '1~CD' + - 1B + - '1~A' + - 1Q + - '1~Q' + - GND + - '2~Q' + - 2Q + - '2~A' + - 2B + - '2~CD' + - 2REXT/CEXT + - 2CEXT + - Vcc diff --git a/4538.yaml b/4538.yaml index 77627c4..ddaa5a4 100644 --- a/4538.yaml +++ b/4538.yaml @@ -1,77 +1,75 @@ ---- -description: "Dual retriggerable precision monostable multivibrator with reset" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4538b.pdf" +description: 'Dual retriggerable precision monostable multivibrator with reset' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4538b.pdf' pins: - - num: 1 - sym: 1CEXT - desc: external capacitor connection (connect to capacitor and ground) - - num: 2 - sym: 1REXT/CEXT - desc: external capacitor/resistor connection - - num: 3 - sym: 1~CD - desc: clear direct input (active low) - - num: 4 - sym: 1B - desc: input (low-to-high triggered) - - num: 5 - sym: 1~A - desc: input (high-to-low triggered) - - num: 6 - sym: 1Q + 1CEXT: + desc: 'external capacitor connection (connect to capacitor and ground)' + 1REXT/CEXT: + desc: 'external capacitor/resistor connection' + '1~CD': + desc: 'clear direct input (active low)' + 1B: + desc: 'input (low-to-high triggered)' + '1~A': + desc: 'input (high-to-low triggered)' + 1Q: desc: output - - num: 7 - sym: 1~Q - desc: complementary output - - num: 8 - sym: GND + '1~Q': + desc: 'complementary output' + GND: desc: ground - - num: 9 - sym: 2~Q - desc: complementary output - - num: 10 - sym: 2Q + '2~Q': + desc: 'complementary output' + 2Q: desc: output - - num: 11 - sym: 2~A - desc: input (high-to-low triggered) - - num: 12 - sym: 2B - desc: input (low-to-high triggered) - - num: 13 - sym: 2~CD - desc: clear direct input (active low) - - num: 14 - sym: 2REXT/CEXT - desc: external capacitor/resistor connection - - num: 15 - sym: 2CEXT - desc: external capacitor connection (connect to capacitor and ground) - - num: 16 - sym: Vcc - desc: supply voltage + '2~A': + desc: 'input (high-to-low triggered)' + 2B: + desc: 'input (low-to-high triggered)' + '2~CD': + desc: 'clear direct input (active low)' + 2REXT/CEXT: + desc: 'external capacitor/resistor connection' + 2CEXT: + desc: 'external capacitor connection (connect to capacitor and ground)' + Vcc: + desc: 'supply voltage' specs: - - param: "External timing resistor R__EXT" - val: 5 (min) - unit: "kΩ" - - param: "External timing capacitor C__EXT" - val: 2000 (min) - unit: pF - - param: "Pulse width variation, Vcc = 5V" - val: "±0.2" - unit: "%" + - + param: 'External timing resistor R__EXT' + val: '5 (min)' + unit: 'kΩ' + - + param: 'External timing capacitor C__EXT' + val: '2000 (min)' + unit: pF + - + param: 'Pulse width variation, Vcc = 5V' + val: '±0.2' + unit: '%' notes: - - Connect a timing capacitor C__EXT between nCEXT and nREXT/CEXT. - - Connect a resistor R__EXT between nREXT/CEXT and Vcc. - - A high-to-low transition on n~A when nB is low causes a pulse on nQ and n~Q. - - A low-to-high transition on nB when n~A is high causes a pulse on nQ and n~Q. - - Setting n~CD low inhibits pulses. - - "Output pulse width = R__EXT × C__EXT." - - "(74HC4538) Output pulse width = 0.7 × R__EXT × C__EXT." -... - - - + - 'Connect a timing capacitor C__EXT between nCEXT and nREXT/CEXT.' + - 'Connect a resistor R__EXT between nREXT/CEXT and Vcc.' + - 'A high-to-low transition on n~A when nB is low causes a pulse on nQ and n~Q.' + - 'A low-to-high transition on nB when n~A is high causes a pulse on nQ and n~Q.' + - 'Setting n~CD low inhibits pulses.' + - 'Output pulse width = R__EXT × C__EXT.' + - '(74HC4538) Output pulse width = 0.7 × R__EXT × C__EXT.' +packages: + DIP: + - 1CEXT + - 1REXT/CEXT + - '1~CD' + - 1B + - '1~A' + - 1Q + - '1~Q' + - GND + - '2~Q' + - 2Q + - '2~A' + - 2B + - '2~CD' + - 2REXT/CEXT + - 2CEXT + - Vcc diff --git a/4541.yaml b/4541.yaml index a9fcecd..3629382 100644 --- a/4541.yaml +++ b/4541.yaml @@ -1,69 +1,69 @@ ---- -description: "Programmable timer" -package: DIP -pincount: 14 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4541b.pdf" +description: 'Programmable timer' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4541b.pdf' pins: - - num: 1 - sym: R__TC - desc: external resistor connection (R__t) - - num: 2 - sym: C__TC - desc: external capacitor connection (C__t) - - num: 3 - sym: RS - desc: external resistor connection (R__S) or external clock input - - num: 4 - sym: NC - desc: no connection - - num: 5 - sym: ~AR - desc: auto reset input (active low) - - num: 6 - sym: MR - desc: master reset input (active high) - - num: 7 - sym: GND + 'R__TC': + desc: 'external resistor connection (R__t)' + 'C__TC': + desc: 'external capacitor connection (C__t)' + RS: + desc: 'external resistor connection (R__S) or external clock input' + '~AR': + desc: 'auto reset input (active low)' + MR: + desc: 'master reset input (active high)' + GND: desc: ground - - num: 8 - sym: O + O: desc: output - - num: 9 - sym: PH - desc: phase input - - num: 10 - sym: MODE - desc: mode select (single cycle or continuous) - - num: 11 - sym: NC - desc: no connection - - num: 12 - sym: A0 - desc: divider input - - num: 13 - sym: A1 - desc: divider input - - num: 14 - sym: Vcc - desc: supply voltage + PH: + desc: 'phase input' + MODE: + desc: 'mode select (single cycle or continuous)' + A0: + desc: 'divider input' + A1: + desc: 'divider input' + Vcc: + desc: 'supply voltage' specs: - - param: Frequency range - val: [1 (min), "100k (max)"] - unit: Hz - - param: External capacitor C__t - val: 100 (min) - unit: pF - - param: External resistor R__t - val: [10k (min), 1M (max)] - unit: "Ω" + - + param: 'Frequency range' + val: + - '1 (min)' + - '100k (max)' + unit: Hz + - + param: 'External capacitor C__t' + val: '100 (min)' + unit: pF + - + param: 'External resistor R__t' + val: + - '10k (min)' + - '1M (max)' + unit: 'Ω' notes: - - "The RC oscillator frequency is 1/(2.3 × R__t × C__t). R__S = 2R__t." - - An external clock signal, connected to RS, may be used instead. The timer advances on the low-to-high transition of RS. - - "The input frequency is divided by a value determined by A1A0: 213 (LL), 210 (LH), 28 (HL), or 216 (HH)." - - Power-on reset is enabled when ~AR and MR are low. For HEF4541, Vcc should be above 8.5V for correct power-on reset. - - PH specifies the state of the output after reset (high or low). - - When MODE is high, the output oscillates continuously. - - When MODE is low, the output changes only once, after a single cycle. -... - + - 'The RC oscillator frequency is 1/(2.3 × R__t × C__t). R__S = 2R__t.' + - 'An external clock signal, connected to RS, may be used instead. The timer advances on the low-to-high transition of RS.' + - 'The input frequency is divided by a value determined by A1A0: 213 (LL), 210 (LH), 28 (HL), or 216 (HH).' + - 'Power-on reset is enabled when ~AR and MR are low. For HEF4541, Vcc should be above 8.5V for correct power-on reset.' + - 'PH specifies the state of the output after reset (high or low).' + - 'When MODE is high, the output oscillates continuously.' + - 'When MODE is low, the output changes only once, after a single cycle.' +packages: + DIP: + - 'R__TC' + - 'C__TC' + - RS + - NC + - '~AR' + - MR + - GND + - O + - PH + - MODE + - NC + - A0 + - A1 + - Vcc diff --git a/4555.yaml b/4555.yaml index acc2d16..527006f 100644 --- a/4555.yaml +++ b/4555.yaml @@ -1,60 +1,57 @@ ---- -description: Dual 1-of-4 decoder/demultiplexer -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4555b.pdf" +description: 'Dual 1-of-4 decoder/demultiplexer' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4555b.pdf' pins: - - num: 1 - sym: 1~E - desc: enable input (active low) - - num: 2 - sym: 1A__0 - desc: address input - - num: 3 - sym: 1A__1 - desc: address input - - num: 4 - sym: 1Y__0 - desc: output - - num: 5 - sym: 1Y__1 - desc: output - - num: 6 - sym: 1Y__2 - desc: output - - num: 7 - sym: 1Y__3 - desc: output - - num: 8 - sym: GND + '1~E': + desc: 'enable input (active low)' + '1A__0': + desc: 'address input' + '1A__1': + desc: 'address input' + '1Y__0': + desc: output + '1Y__1': + desc: output + '1Y__2': + desc: output + '1Y__3': + desc: output + GND: desc: ground - - num: 9 - sym: 2Y__3 - desc: output - - num: 10 - sym: 2Y__2 - desc: output - - num: 11 - sym: 2Y__1 - desc: output - - num: 12 - sym: 2Y__0 - desc: output - - num: 13 - sym: 2A__1 - desc: address input - - num: 14 - sym: 2A__0 - desc: address input - - num: 15 - sym: 2~E - desc: enable input (active low) - - num: 16 - sym: Vcc - desc: supply voltage + '2Y__3': + desc: output + '2Y__2': + desc: output + '2Y__1': + desc: output + '2Y__0': + desc: output + '2A__1': + desc: 'address input' + '2A__0': + desc: 'address input' + '2~E': + desc: 'enable input (active low)' + Vcc: + desc: 'supply voltage' notes: - - Outputs are mutually exclusive, active high. - - When n~E is high, all outputs nY are low. -... - + - 'Outputs are mutually exclusive, active high.' + - 'When n~E is high, all outputs nY are low.' +packages: + DIP: + - '1~E' + - '1A__0' + - '1A__1' + - '1Y__0' + - '1Y__1' + - '1Y__2' + - '1Y__3' + - GND + - '2Y__3' + - '2Y__2' + - '2Y__1' + - '2Y__0' + - '2A__1' + - '2A__0' + - '2~E' + - Vcc diff --git a/4556.yaml b/4556.yaml index dbabb78..b4ea453 100644 --- a/4556.yaml +++ b/4556.yaml @@ -1,61 +1,57 @@ ---- -description: Dual 1-of-4 decoder/demultiplexer; inverting -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4556b.pdf" +description: 'Dual 1-of-4 decoder/demultiplexer; inverting' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4556b.pdf' pins: - - num: 1 - sym: 1~E - desc: enable input (active low) - - num: 2 - sym: 1A__0 - desc: address input - - num: 3 - sym: 1A__1 - desc: address input - - num: 4 - sym: 1~Y~__0 - desc: output - - num: 5 - sym: 1~Y~__1 - desc: output - - num: 6 - sym: 1~Y~__2 - desc: output - - num: 7 - sym: 1~Y~__3 - desc: output - - num: 8 - sym: GND + '1~E': + desc: 'enable input (active low)' + '1A__0': + desc: 'address input' + '1A__1': + desc: 'address input' + '1~Y~__0': + desc: output + '1~Y~__1': + desc: output + '1~Y~__2': + desc: output + '1~Y~__3': + desc: output + GND: desc: ground - - num: 9 - sym: 2~Y~__3 - desc: output - - num: 10 - sym: 2~Y~__2 - desc: output - - num: 11 - sym: 2~Y~__1 - desc: output - - num: 12 - sym: 2~Y~__0 - desc: output - - num: 13 - sym: 2A__1 - desc: address input - - num: 14 - sym: 2A__0 - desc: address input - - num: 15 - sym: 2~E - desc: enable input (active low) - - num: 16 - sym: Vcc - desc: supply voltage + '2~Y~__3': + desc: output + '2~Y~__2': + desc: output + '2~Y~__1': + desc: output + '2~Y~__0': + desc: output + '2A__1': + desc: 'address input' + '2A__0': + desc: 'address input' + '2~E': + desc: 'enable input (active low)' + Vcc: + desc: 'supply voltage' notes: - - Outputs are mutually exclusive, active low. - - When n~E is high, all outputs n~Y~ are high. -... - - + - 'Outputs are mutually exclusive, active low.' + - 'When n~E is high, all outputs n~Y~ are high.' +packages: + DIP: + - '1~E' + - '1A__0' + - '1A__1' + - '1~Y~__0' + - '1~Y~__1' + - '1~Y~__2' + - '1~Y~__3' + - GND + - '2~Y~__3' + - '2~Y~__2' + - '2~Y~__1' + - '2~Y~__0' + - '2A__1' + - '2A__0' + - '2~E' + - Vcc diff --git a/4557.yaml b/4557.yaml index fcc10be..f5bac28 100644 --- a/4557.yaml +++ b/4557.yaml @@ -1,62 +1,59 @@ ---- -description: "1-to-64 bit variable length shift register" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4557b.pdf" +description: '1-to-64 bit variable length shift register' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4557b.pdf' pins: - - num: 1 - sym: L__2 - desc: length control input - - num: 2 - sym: L__1 - desc: length control input - - num: 3 - sym: MR - desc: asynchronous master reset - - num: 4 - sym: CP__0 - desc: clock input (low-to-high edge-triggered) - - num: 5 - sym: ~CP~__1 - desc: clock input (high-to-low edge-triggered) - - num: 6 - sym: D__B - desc: data input - - num: 7 - sym: D__A - desc: data input - - num: 8 - sym: GND + 'L__2': + desc: 'length control input' + 'L__1': + desc: 'length control input' + MR: + desc: 'asynchronous master reset' + 'CP__0': + desc: 'clock input (low-to-high edge-triggered)' + '~CP~__1': + desc: 'clock input (high-to-low edge-triggered)' + 'D__B': + desc: 'data input' + 'D__A': + desc: 'data input' + GND: desc: ground - - num: 9 - sym: A/~B - desc: select data input - - num: 10 - sym: Q + 'A/~B': + desc: 'select data input' + Q: desc: output - - num: 11 - sym: ~Q - desc: complementary output - - num: 12 - sym: L__32 - desc: length input - - num: 13 - sym: L__16 - desc: length input - - num: 14 - sym: L__8 - desc: length input - - num: 15 - sym: L__4 - desc: length input - - num: 16 - sym: Vcc - desc: supply voltage + '~Q': + desc: 'complementary output' + 'L__32': + desc: 'length input' + 'L__16': + desc: 'length input' + 'L__8': + desc: 'length input' + 'L__4': + desc: 'length input' + Vcc: + desc: 'supply voltage' notes: - - The length of the shift register is determined by the sum of the length inputs (L__1, L__2, L__4, L__8, L__16, L__32) plus one. - - Data is shifted in on the low-to-high transition of CP__0 when ~CP~__1 is low, or the high-to-low transition of ~CP~__1 when CP__0 is high. - - When A/~B is high, a clock pulse shifts in data from D__A. When low, a clock pulse shifts in data from D__B. - - When MR is high, the register is reset, Q is forced low, and ~Q is forced high. -... - + - 'The length of the shift register is determined by the sum of the length inputs (L__1, L__2, L__4, L__8, L__16, L__32) plus one.' + - 'Data is shifted in on the low-to-high transition of CP__0 when ~CP~__1 is low, or the high-to-low transition of ~CP~__1 when CP__0 is high.' + - 'When A/~B is high, a clock pulse shifts in data from D__A. When low, a clock pulse shifts in data from D__B.' + - 'When MR is high, the register is reset, Q is forced low, and ~Q is forced high.' +packages: + DIP: + - 'L__2' + - 'L__1' + - MR + - 'CP__0' + - '~CP~__1' + - 'D__B' + - 'D__A' + - GND + - 'A/~B' + - Q + - '~Q' + - 'L__32' + - 'L__16' + - 'L__8' + - 'L__4' + - Vcc diff --git a/4572.yaml b/4572.yaml index 301ac67..744101e 100644 --- a/4572.yaml +++ b/4572.yaml @@ -1,57 +1,54 @@ ---- -description: "Hex gate (four inverters, one 2-input NOR gate, one 2-input NAND gate)" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://focus.ti.com/lit/ds/symlink/cd4572ub.pdf" +description: 'Hex gate (four inverters, one 2-input NOR gate, one 2-input NAND gate)' +family: '4000' +datasheet: 'http://focus.ti.com/lit/ds/symlink/cd4572ub.pdf' pins: - - num: 1 - sym: ~A - desc: inverter 1 output - - num: 2 - sym: A - desc: inverter 1 input - - num: 3 - sym: ~B - desc: inverter 2 output - - num: 4 - sym: B - desc: inverter 2 input - - num: 5 - sym: C NOR D - desc: NOR gate output - - num: 6 - sym: C - desc: NOR gate input - - num: 7 - sym: D - desc: NOR gate input - - num: 8 - sym: GND + '~A': + desc: 'inverter 1 output' + A: + desc: 'inverter 1 input' + '~B': + desc: 'inverter 2 output' + B: + desc: 'inverter 2 input' + 'C NOR D': + desc: 'NOR gate output' + C: + desc: 'NOR gate input' + D: + desc: 'NOR gate input' + GND: desc: ground - - num: 9 - sym: ~E - desc: inverter 3 output - - num: 10 - sym: E - desc: inverter 3 input - - num: 11 - sym: ~F - desc: inverter 4 output - - num: 12 - sym: F - desc: inverter 4 input - - num: 13 - sym: G NAND H - desc: NAND gate output - - num: 14 - sym: G - desc: NAND gate input - - num: 15 - sym: H - desc: NAND gate input - - num: 16 - sym: Vcc - desc: supply voltage -... - + '~E': + desc: 'inverter 3 output' + E: + desc: 'inverter 3 input' + '~F': + desc: 'inverter 4 output' + F: + desc: 'inverter 4 input' + 'G NAND H': + desc: 'NAND gate output' + G: + desc: 'NAND gate input' + H: + desc: 'NAND gate input' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - '~A' + - A + - '~B' + - B + - 'C NOR D' + - C + - D + - GND + - '~E' + - E + - '~F' + - F + - 'G NAND H' + - G + - H + - Vcc diff --git a/4585.yaml b/4585.yaml index a1ac41c..272d7cf 100644 --- a/4585.yaml +++ b/4585.yaml @@ -1,60 +1,57 @@ ---- -description: "4-bit magnitude comparator" -package: DIP -pincount: 16 -family: "4000" -datasheet: "http://www.standardics.nxp.com/products/hef/datasheet/hef4585b.pdf" +description: '4-bit magnitude comparator' +family: '4000' +datasheet: 'http://www.standardics.nxp.com/products/hef/datasheet/hef4585b.pdf' pins: - - num: 1 - sym: B__2 - desc: word B input - - num: 2 - sym: A__2 - desc: word A input - - num: 3 - sym: Q__A=B - desc: A = B output - - num: 4 - sym: I__A>B - desc: A > B expansion input - - num: 5 - sym: I__A<B - desc: A < B expansion input - - num: 6 - sym: I__A=B - desc: A = B expansion input - - num: 7 - sym: A__1 - desc: word A input - - num: 8 - sym: GND + 'B__2': + desc: 'word B input' + 'A__2': + desc: 'word A input' + 'Q__A=B': + desc: 'A = B output' + 'I__A>B': + desc: 'A > B expansion input' + 'I__AB': + desc: 'A > B output' + 'B__3': + desc: 'word B input' + 'A__3': + desc: 'word A input' + Vcc: + desc: 'supply voltage' notes: - - The least significant (or only) comparator in a chain should have I__A=B and I__A>B tied high and I__A<B tied low. - - To compare more than 4 bits, connect Q__A<B and Q__A=B to the inputs of the next significant comparator. I__A>B of the next significant comparator should be tied high. -... - + - 'The least significant (or only) comparator in a chain should have I__A=B and I__A>B tied high and I__AB of the next significant comparator should be tied high.' +packages: + DIP: + - 'B__2' + - 'A__2' + - 'Q__A=B' + - 'I__A>B' + - 'I__AB' + - 'B__3' + - 'A__3' + - Vcc diff --git a/4N35M.yaml b/4N35M.yaml index 29a49f4..c84bad0 100644 --- a/4N35M.yaml +++ b/4N35M.yaml @@ -1,5 +1,4 @@ ---- -description: "Phototransistor output optocoupler" +description: 'Phototransistor output optocoupler' aliases: - 4N25M - 4N26M @@ -12,41 +11,53 @@ aliases: - H11A3M - H11A4M - H11A5M -package: DIP -pincount: 6 -family: "Fairchild" -datasheet: "http://www.fairchildsemi.com/ds/4N/4N35-M.pdf" +family: Fairchild +datasheet: 'http://www.fairchildsemi.com/ds/4N/4N35-M.pdf' pins: - - num: 1 - sym: A + A: desc: anode - - num: 2 - sym: K + K: desc: cathode - - num: 3 - sym: NC - desc: no connection - - num: 4 - sym: E + E: desc: emitter - - num: 5 - sym: C + C: desc: collector - - num: 6 - sym: B + B: desc: base specs: - - param: "Input forward voltage, typical" - val: 1.18 - unit: V - - param: "Input forward voltage, maximum" - val: 1.50 - unit: V - - param: "Input current, maximum" - val: 60 - unit: ma - - param: "Current transfer ratio, collector to emitter" - val: [100 (4N35M,4N36M,4N37M), 50 (H11A1M), 30 (H11A5M), 20 (4N25M,4N26M,H11A2M,H11A3M), 10 (4N27M,4N28M,H11A4M)] - unit: -... - + - + param: 'Input forward voltage, typical' + val: '1.18' + unit: V + - + param: 'Input forward voltage, maximum' + val: '1.5' + unit: V + - + param: 'Input current, maximum' + val: '60' + unit: ma + - + param: 'Current transfer ratio, collector to emitter' + val: + - '100 (4N35M' + - 4N36M + - 4N37M) + - '50 (H11A1M)' + - '30 (H11A5M)' + - '20 (4N25M' + - 4N26M + - H11A2M + - H11A3M) + - '10 (4N27M' + - 4N28M + - H11A4M) + unit: '' +packages: + DIP: + - A + - K + - NC + - E + - C + - B diff --git a/54374.yaml b/54374.yaml index 4df3c42..cc2cf31 100644 --- a/54374.yaml +++ b/54374.yaml @@ -1,97 +1,114 @@ ---- -description: Octal D-type edge-triggered flip-flops with 3-state outputs -package: DIP -pincount: 20 -family: "5400" -datasheet: "http://www.alldatasheet.com/datasheet-pdf/pdf/27731/TI/SN54ALS374A.html" +description: 'Octal D-type edge-triggered flip-flops with 3-state outputs' +family: '5400' +datasheet: 'http://www.alldatasheet.com/datasheet-pdf/pdf/27731/TI/SN54ALS374A.html' pins: - - num: 1 - sym: ~OE - desc: output enable (active low) - - num: 2 - sym: 1Q - desc: flip-flop output - - num: 3 - sym: 1D - desc: data input - - num: 4 - sym: 2D - desc: data input - - num: 5 - sym: 2Q - desc: flip-flop output - - num: 6 - sym: 3Q - desc: flip-flop output - - num: 7 - sym: 3D - desc: data input - - num: 8 - sym: 4D - desc: data input - - num: 9 - sym: 4Q - desc: flip-flop output - - num: 10 - sym: GND + '~OE': + desc: 'output enable (active low)' + 1Q: + desc: 'flip-flop output' + 1D: + desc: 'data input' + 2D: + desc: 'data input' + 2Q: + desc: 'flip-flop output' + 3Q: + desc: 'flip-flop output' + 3D: + desc: 'data input' + 4D: + desc: 'data input' + 4Q: + desc: 'flip-flop output' + GND: desc: ground - - num: 11 - sym: CLK - desc: clock input (low-to-high, edge-triggered) - - num: 12 - sym: 5Q - desc: flip-flop output - - num: 13 - sym: 5D - desc: data input - - num: 14 - sym: 6D - desc: data input - - num: 15 - sym: 6Q - desc: flip-flop output - - num: 16 - sym: 7Q - desc: flip-flop output - - num: 17 - sym: 7D - desc: data input - - num: 18 - sym: D8D7 - desc: data input - - num: 19 - sym: 8Q - desc: flip-flop output - - num: 20 - sym: Vcc - desc: supply voltage + CLK: + desc: 'clock input (low-to-high, edge-triggered)' + 5Q: + desc: 'flip-flop output' + 5D: + desc: 'data input' + 6D: + desc: 'data input' + 6Q: + desc: 'flip-flop output' + 7Q: + desc: 'flip-flop output' + 7D: + desc: 'data input' + D8D7: + desc: 'data input' + 8Q: + desc: 'flip-flop output' + Vcc: + desc: 'supply voltage' specs: - - param: Supply Voltage range - val: [-0.5 to 7] - unit: V - - param: Input Voltage range - val: [-0.5 to 7] - unit: V - - param: Recommended Voltage range - val: [4.5 to 5.5] - unit: V - - param: High level input voltage - val: [2] - unit: V - - param: Low-level input voltage - val: [0.7 (54AL), 0.8 (74AL)] - unit: V - - param: High-level output current - val: [-1 (54AL), -2.6 (74AL)] - unit: mA - - param: Low-level output current - val: [12 (54AL), 24 (74AL)] - unit: mA - - param: Operating Temp - val: [-55 to +125 (54AL), 0 to +70 (74AL)] - unit: degC + - + param: 'Supply Voltage range' + val: + - '-0.5 to 7' + unit: V + - + param: 'Input Voltage range' + val: + - '-0.5 to 7' + unit: V + - + param: 'Recommended Voltage range' + val: + - '4.5 to 5.5' + unit: V + - + param: 'High level input voltage' + val: + - '2' + unit: V + - + param: 'Low-level input voltage' + val: + - '0.7 (54AL)' + - '0.8 (74AL)' + unit: V + - + param: 'High-level output current' + val: + - '-1 (54AL)' + - '-2.6 (74AL)' + unit: mA + - + param: 'Low-level output current' + val: + - '12 (54AL)' + - '24 (74AL)' + unit: mA + - + param: 'Operating Temp' + val: + - '-55 to +125 (54AL)' + - '0 to +70 (74AL)' + unit: degC notes: - - ~OE does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state - - released april 1982, revised november 1999 -... - + - '~OE does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state' + - 'released april 1982, revised november 1999' +packages: + DIP: + - '~OE' + - 1Q + - 1D + - 2D + - 2Q + - 3Q + - 3D + - 4D + - 4Q + - GND + - CLK + - 5Q + - 5D + - 6D + - 6Q + - 7Q + - 7D + - D8D7 + - 8Q + - Vcc diff --git a/555.yaml b/555.yaml index ea47dd7..6259591 100644 --- a/555.yaml +++ b/555.yaml @@ -1,46 +1,47 @@ ---- -description: Timer -package: DIP -pincount: 8 -datasheet: http://www.datasheetcatalog.org/datasheet/philips/NE_SA_SE555_C_2.pdf +description: Timer +datasheet: 'http://www.datasheetcatalog.org/datasheet/philips/NE_SA_SE555_C_2.pdf' pins: - - num: 1 - sym: GND + GND: desc: ground - - num: 2 - sym: TRIG + TRIG: desc: trigger - - num: 3 - sym: OUT + OUT: desc: output - - num: 4 - sym: ~RESET - desc: reset (active low) - - num: 5 - sym: CV - desc: control voltage - - num: 6 - sym: THR + '~RESET': + desc: 'reset (active low)' + CV: + desc: 'control voltage' + THR: desc: threshold - - num: 7 - sym: DIS + DIS: desc: discharge - - num: 8 - sym: Vcc - desc: supply voltage + Vcc: + desc: 'supply voltage' specs: - - param: Maximum supply voltage - val: 18 - unit: V - - param: Maximum output current (NE555) - val: 200 - unit: mA - - param: Power dissipation - val: 600 - unit: mW + - + param: 'Maximum supply voltage' + val: '18' + unit: V + - + param: 'Maximum output current (NE555)' + val: '200' + unit: mA + - + param: 'Power dissipation' + val: '600' + unit: mW notes: - - In monostable mode, pulse width ≈ 1.1RC - - In astable mode, frequency = 1/(0.693*C*(R1+2*R2)) - - In astable mode, pulse high time = 0.693*(R1+R2)*C - - In astable mode, pulse low time = 0.693*R2*C -... + - 'In monostable mode, pulse width ≈ 1.1RC' + - 'In astable mode, frequency = 1/(0.693*C*(R1+2*R2))' + - 'In astable mode, pulse high time = 0.693*(R1+R2)*C' + - 'In astable mode, pulse low time = 0.693*R2*C' +packages: + DIP: + - GND + - TRIG + - OUT + - '~RESET' + - CV + - THR + - DIS + - Vcc diff --git a/556.yaml b/556.yaml index 2084c93..f3f2b52 100644 --- a/556.yaml +++ b/556.yaml @@ -1,52 +1,49 @@ ---- -description: Dual timer -package: DIP -pincount: 14 -datasheet: "http://www.national.com/ds/LM/LM556.pdf" +description: 'Dual timer' +datasheet: 'http://www.national.com/ds/LM/LM556.pdf' pins: - - num: 1 - sym: DIS 1 - desc: discharge (timer 1) - - num: 2 - sym: THR 1 - desc: threshold (timer 1) - - num: 3 - sym: CV 1 - desc: control voltage (timer 1) - - num: 4 - sym: ~RESET~ 1 - desc: reset (active low, timer 1) - - num: 5 - sym: OUT 1 - desc: output (timer 1) - - num: 6 - sym: TRIG 1 - desc: trigger (timer 1) - - num: 7 - sym: GND + 'DIS 1': + desc: 'discharge (timer 1)' + 'THR 1': + desc: 'threshold (timer 1)' + 'CV 1': + desc: 'control voltage (timer 1)' + '~RESET~ 1': + desc: 'reset (active low, timer 1)' + 'OUT 1': + desc: 'output (timer 1)' + 'TRIG 1': + desc: 'trigger (timer 1)' + GND: desc: ground - - num: 8 - sym: TRIG 2 - desc: trigger (timer 2) - - num: 9 - sym: OUT 2 - desc: output (timer 2) - - num: 10 - sym: ~RESET~ 2 - desc: reset (active low, timer 2) - - num: 11 - sym: CV 2 - desc: control voltage (timer 2) - - num: 12 - sym: THR 2 - desc: threshold (timer 2) - - num: 13 - sym: DIS 2 - desc: discharge (timer 2) - - num: 14 - sym: Vcc - desc: supply voltage + 'TRIG 2': + desc: 'trigger (timer 2)' + 'OUT 2': + desc: 'output (timer 2)' + '~RESET~ 2': + desc: 'reset (active low, timer 2)' + 'CV 2': + desc: 'control voltage (timer 2)' + 'THR 2': + desc: 'threshold (timer 2)' + 'DIS 2': + desc: 'discharge (timer 2)' + Vcc: + desc: 'supply voltage' notes: - - The 556 contains two 555 timers. -... - + - 'The 556 contains two 555 timers.' +packages: + DIP: + - 'DIS 1' + - 'THR 1' + - 'CV 1' + - '~RESET~ 1' + - 'OUT 1' + - 'TRIG 1' + - GND + - 'TRIG 2' + - 'OUT 2' + - '~RESET~ 2' + - 'CV 2' + - 'THR 2' + - 'DIS 2' + - Vcc diff --git a/62256.yaml b/62256.yaml index e150cd0..4080b6d 100644 --- a/62256.yaml +++ b/62256.yaml @@ -1,100 +1,95 @@ ---- -description: "32K x 8 static RAM" -aliases: [] -package: DIP -pincount: 28 -family: "memory" -datasheet: "http://web.mit.edu/6.115/www/datasheets/62256.pdf" +description: '32K x 8 static RAM' +aliases: { } +family: memory +datasheet: 'http://web.mit.edu/6.115/www/datasheets/62256.pdf' pins: - - num: 1 - sym: A__14 - desc: address input - - num: 2 - sym: A__12 - desc: address input - - num: 3 - sym: A__7 - desc: address input - - num: 4 - sym: A__6 - desc: address input - - num: 5 - sym: A__5 - desc: address input - - num: 6 - sym: A__4 - desc: address input - - num: 7 - sym: A__3 - desc: address input - - num: 8 - sym: A__2 - desc: address input - - num: 9 - sym: A__1 - desc: address input - - num: 10 - sym: A__0 - desc: address input - - num: 11 - sym: I/O__0 - desc: data input/output - - num: 12 - sym: I/O__1 - desc: data input/output - - num: 13 - sym: I/O__2 - desc: data input/output - - num: 14 - sym: GND + 'A__14': + desc: 'address input' + 'A__12': + desc: 'address input' + 'A__7': + desc: 'address input' + 'A__6': + desc: 'address input' + 'A__5': + desc: 'address input' + 'A__4': + desc: 'address input' + 'A__3': + desc: 'address input' + 'A__2': + desc: 'address input' + 'A__1': + desc: 'address input' + 'A__0': + desc: 'address input' + 'I/O__0': + desc: 'data input/output' + 'I/O__1': + desc: 'data input/output' + 'I/O__2': + desc: 'data input/output' + GND: desc: ground - - num: 15 - sym: I/O__3 - desc: data input/output - - num: 16 - sym: I/O__4 - desc: data input/output - - num: 17 - sym: I/O__5 - desc: data input/output - - num: 18 - sym: I/O__6 - desc: data input/output - - num: 19 - sym: I/O__7 - desc: data input/output - - num: 20 - sym: ~CE - desc: chip enable (active low) - - num: 21 - sym: A__10 - desc: address input - - num: 22 - sym: ~OE - desc: output enable (active low) - - num: 23 - sym: A__11 - desc: address input - - num: 24 - sym: A__9 - desc: address input - - num: 25 - sym: A__8 - desc: address input - - num: 26 - sym: A__13 - desc: address input - - num: 27 - sym: ~WE - desc: write enable (active low) - - num: 28 - sym: Vcc - desc: supply voltage + 'I/O__3': + desc: 'data input/output' + 'I/O__4': + desc: 'data input/output' + 'I/O__5': + desc: 'data input/output' + 'I/O__6': + desc: 'data input/output' + 'I/O__7': + desc: 'data input/output' + '~CE': + desc: 'chip enable (active low)' + 'A__10': + desc: 'address input' + '~OE': + desc: 'output enable (active low)' + 'A__11': + desc: 'address input' + 'A__9': + desc: 'address input' + 'A__8': + desc: 'address input' + 'A__13': + desc: 'address input' + '~WE': + desc: 'write enable (active low)' + Vcc: + desc: 'supply voltage' notes: - - Data is written when ~CE is low and ~WE is low. - - Data is read when ~CE is low, ~OE is low, and ~WE is high. - - The input/output pins assume a high-impedance state if ~CE is high. -... - - - + - 'Data is written when ~CE is low and ~WE is low.' + - 'Data is read when ~CE is low, ~OE is low, and ~WE is high.' + - 'The input/output pins assume a high-impedance state if ~CE is high.' +packages: + DIP: + - 'A__14' + - 'A__12' + - 'A__7' + - 'A__6' + - 'A__5' + - 'A__4' + - 'A__3' + - 'A__2' + - 'A__1' + - 'A__0' + - 'I/O__0' + - 'I/O__1' + - 'I/O__2' + - GND + - 'I/O__3' + - 'I/O__4' + - 'I/O__5' + - 'I/O__6' + - 'I/O__7' + - '~CE' + - 'A__10' + - '~OE' + - 'A__11' + - 'A__9' + - 'A__8' + - 'A__13' + - '~WE' + - Vcc diff --git a/6264.yaml b/6264.yaml index e2c4368..4950182 100644 --- a/6264.yaml +++ b/6264.yaml @@ -1,98 +1,93 @@ ---- -description: "8K x 8 static RAM" -aliases: [] -package: DIP -pincount: 28 -family: "memory" -datasheet: "http://web.mit.edu/6.115/www/datasheets/6264.pdf" +description: '8K x 8 static RAM' +aliases: { } +family: memory +datasheet: 'http://web.mit.edu/6.115/www/datasheets/6264.pdf' pins: - - num: 1 - sym: NC - desc: no connection - - num: 2 - sym: A__4 - desc: address input - - num: 3 - sym: A__5 - desc: address input - - num: 4 - sym: A__6 - desc: address input - - num: 5 - sym: A__7 - desc: address input - - num: 6 - sym: A__8 - desc: address input - - num: 7 - sym: A__9 - desc: address input - - num: 8 - sym: A__10 - desc: address input - - num: 9 - sym: A__11 - desc: address input - - num: 10 - sym: A__12 - desc: address input - - num: 11 - sym: I/O__0 - desc: data input/output - - num: 12 - sym: I/O__1 - desc: data input/output - - num: 13 - sym: I/O__2 - desc: data input/output - - num: 14 - sym: GND + 'A__4': + desc: 'address input' + 'A__5': + desc: 'address input' + 'A__6': + desc: 'address input' + 'A__7': + desc: 'address input' + 'A__8': + desc: 'address input' + 'A__9': + desc: 'address input' + 'A__10': + desc: 'address input' + 'A__11': + desc: 'address input' + 'A__12': + desc: 'address input' + 'I/O__0': + desc: 'data input/output' + 'I/O__1': + desc: 'data input/output' + 'I/O__2': + desc: 'data input/output' + GND: desc: ground - - num: 15 - sym: I/O__3 - desc: data input/output - - num: 16 - sym: I/O__4 - desc: data input/output - - num: 17 - sym: I/O__5 - desc: data input/output - - num: 18 - sym: I/O__6 - desc: data input/output - - num: 19 - sym: I/O__7 - desc: data input/output - - num: 20 - sym: ~CE~__1 - desc: chip enable (active low) - - num: 21 - sym: A__0 - desc: address input - - num: 22 - sym: ~OE - desc: output enable (active low) - - num: 23 - sym: A__1 - desc: address input - - num: 24 - sym: A__2 - desc: address input - - num: 25 - sym: A__3 - desc: address input - - num: 26 - sym: CE__2 - desc: chip enable (active high) - - num: 27 - sym: ~WE - desc: write enable (active low) - - num: 28 - sym: Vcc - desc: supply voltage + 'I/O__3': + desc: 'data input/output' + 'I/O__4': + desc: 'data input/output' + 'I/O__5': + desc: 'data input/output' + 'I/O__6': + desc: 'data input/output' + 'I/O__7': + desc: 'data input/output' + '~CE~__1': + desc: 'chip enable (active low)' + 'A__0': + desc: 'address input' + '~OE': + desc: 'output enable (active low)' + 'A__1': + desc: 'address input' + 'A__2': + desc: 'address input' + 'A__3': + desc: 'address input' + 'CE__2': + desc: 'chip enable (active high)' + '~WE': + desc: 'write enable (active low)' + Vcc: + desc: 'supply voltage' notes: - - Data is written when ~CE~__1 is low, ~WE is low, and CE__2 is high. - - Data is read whem ~CE~__1 is low, ~OE is low, and CE__2 is high. - - The input/output pins assume a high-impedance state if the chip is not selected and/or ~OE is low. -... - + - 'Data is written when ~CE~__1 is low, ~WE is low, and CE__2 is high.' + - 'Data is read whem ~CE~__1 is low, ~OE is low, and CE__2 is high.' + - 'The input/output pins assume a high-impedance state if the chip is not selected and/or ~OE is low.' +packages: + DIP: + - NC + - 'A__4' + - 'A__5' + - 'A__6' + - 'A__7' + - 'A__8' + - 'A__9' + - 'A__10' + - 'A__11' + - 'A__12' + - 'I/O__0' + - 'I/O__1' + - 'I/O__2' + - GND + - 'I/O__3' + - 'I/O__4' + - 'I/O__5' + - 'I/O__6' + - 'I/O__7' + - '~CE~__1' + - 'A__0' + - '~OE' + - 'A__1' + - 'A__2' + - 'A__3' + - 'CE__2' + - '~WE' + - Vcc diff --git a/628128.yaml b/628128.yaml index f7dc9fe..0d87337 100644 --- a/628128.yaml +++ b/628128.yaml @@ -1,112 +1,105 @@ ---- -description: "128K x 8 static RAM" -aliases: [] -package: DIP -pincount: 32 -family: "memory" -datasheet: "http://www.futurlec.com/Datasheet/Memory/628128.pdf" +description: '128K x 8 static RAM' +aliases: { } +family: memory +datasheet: 'http://www.futurlec.com/Datasheet/Memory/628128.pdf' pins: - - num: 1 - sym: NC - desc: no connection - - num: 2 - sym: A__16 - desc: address input - - num: 3 - sym: A__14 - desc: address input - - num: 4 - sym: A__12 - desc: address input - - num: 5 - sym: A__7 - desc: address input - - num: 6 - sym: A__6 - desc: address input - - num: 7 - sym: A__5 - desc: address input - - num: 8 - sym: A__4 - desc: address input - - num: 9 - sym: A__3 - desc: address input - - num: 10 - sym: A__2 - desc: address input - - num: 11 - sym: A__1 - desc: address input - - num: 12 - sym: A__0 - desc: address input - - num: 13 - sym: I/O__0 - desc: data input/output - - num: 14 - sym: I/O__1 - desc: data input/output - - num: 15 - sym: I/O__2 - desc: data input/output - - num: 16 - sym: GND + 'A__16': + desc: 'address input' + 'A__14': + desc: 'address input' + 'A__12': + desc: 'address input' + 'A__7': + desc: 'address input' + 'A__6': + desc: 'address input' + 'A__5': + desc: 'address input' + 'A__4': + desc: 'address input' + 'A__3': + desc: 'address input' + 'A__2': + desc: 'address input' + 'A__1': + desc: 'address input' + 'A__0': + desc: 'address input' + 'I/O__0': + desc: 'data input/output' + 'I/O__1': + desc: 'data input/output' + 'I/O__2': + desc: 'data input/output' + GND: desc: ground - - num: 17 - sym: I/O__3 - desc: data input/output - - num: 18 - sym: I/O__4 - desc: data input/output - - num: 19 - sym: I/O__5 - desc: data input/output - - num: 20 - sym: I/O__6 - desc: data input/output - - num: 21 - sym: I/O__7 - desc: data input/output - - num: 22 - sym: ~CS1 - desc: chip select (active low) - - num: 23 - sym: A__10 - desc: address input - - num: 24 - sym: ~OE - desc: output enable (active low) - - num: 25 - sym: A__11 - desc: address input - - num: 26 - sym: A__9 - desc: address input - - num: 27 - sym: A__8 - desc: address input - - num: 28 - sym: A__13 - desc: address input - - num: 29 - sym: ~WE - desc: write enable (active low) - - num: 30 - sym: CS2 - desc: chip select (active high) - - num: 31 - sym: A__15 - desc: address input - - num: 32 - sym: Vcc - desc: supply voltage + 'I/O__3': + desc: 'data input/output' + 'I/O__4': + desc: 'data input/output' + 'I/O__5': + desc: 'data input/output' + 'I/O__6': + desc: 'data input/output' + 'I/O__7': + desc: 'data input/output' + '~CS1': + desc: 'chip select (active low)' + 'A__10': + desc: 'address input' + '~OE': + desc: 'output enable (active low)' + 'A__11': + desc: 'address input' + 'A__9': + desc: 'address input' + 'A__8': + desc: 'address input' + 'A__13': + desc: 'address input' + '~WE': + desc: 'write enable (active low)' + CS2: + desc: 'chip select (active high)' + 'A__15': + desc: 'address input' + Vcc: + desc: 'supply voltage' notes: - - Data is written when ~CS1 is low, CS2 is high, and ~WE is low. - - Data is read when ~CS1 is low, CS2 is high, ~OE is low, and ~WE is high. - - The input/output pins assume a high-impedance state if ~CS1 is high or CS2 is low. -... - - - + - 'Data is written when ~CS1 is low, CS2 is high, and ~WE is low.' + - 'Data is read when ~CS1 is low, CS2 is high, ~OE is low, and ~WE is high.' + - 'The input/output pins assume a high-impedance state if ~CS1 is high or CS2 is low.' +packages: + DIP: + - NC + - 'A__16' + - 'A__14' + - 'A__12' + - 'A__7' + - 'A__6' + - 'A__5' + - 'A__4' + - 'A__3' + - 'A__2' + - 'A__1' + - 'A__0' + - 'I/O__0' + - 'I/O__1' + - 'I/O__2' + - GND + - 'I/O__3' + - 'I/O__4' + - 'I/O__5' + - 'I/O__6' + - 'I/O__7' + - '~CS1' + - 'A__10' + - '~OE' + - 'A__11' + - 'A__9' + - 'A__8' + - 'A__13' + - '~WE' + - CS2 + - 'A__15' + - Vcc diff --git a/628512.yaml b/628512.yaml index 8931353..a85c553 100644 --- a/628512.yaml +++ b/628512.yaml @@ -1,113 +1,108 @@ ---- -description: "512K x 8 static RAM" -aliases: [AS6C4008] -package: DIP -pincount: 32 -family: "memory" -datasheet: "http://www.futurlec.com/Datasheet/Memory/628512.pdf" +description: '512K x 8 static RAM' +aliases: + - AS6C4008 +family: memory +datasheet: 'http://www.futurlec.com/Datasheet/Memory/628512.pdf' pins: - - num: 1 - sym: A__18 - desc: address input - - num: 2 - sym: A__16 - desc: address input - - num: 3 - sym: A__14 - desc: address input - - num: 4 - sym: A__12 - desc: address input - - num: 5 - sym: A__7 - desc: address input - - num: 6 - sym: A__6 - desc: address input - - num: 7 - sym: A__5 - desc: address input - - num: 8 - sym: A__4 - desc: address input - - num: 9 - sym: A__3 - desc: address input - - num: 10 - sym: A__2 - desc: address input - - num: 11 - sym: A__1 - desc: address input - - num: 12 - sym: A__0 - desc: address input - - num: 13 - sym: I/O__0 - desc: data input/output - - num: 14 - sym: I/O__1 - desc: data input/output - - num: 15 - sym: I/O__2 - desc: data input/output - - num: 16 - sym: GND + 'A__18': + desc: 'address input' + 'A__16': + desc: 'address input' + 'A__14': + desc: 'address input' + 'A__12': + desc: 'address input' + 'A__7': + desc: 'address input' + 'A__6': + desc: 'address input' + 'A__5': + desc: 'address input' + 'A__4': + desc: 'address input' + 'A__3': + desc: 'address input' + 'A__2': + desc: 'address input' + 'A__1': + desc: 'address input' + 'A__0': + desc: 'address input' + 'I/O__0': + desc: 'data input/output' + 'I/O__1': + desc: 'data input/output' + 'I/O__2': + desc: 'data input/output' + GND: desc: ground - - num: 17 - sym: I/O__3 - desc: data input/output - - num: 18 - sym: I/O__4 - desc: data input/output - - num: 19 - sym: I/O__5 - desc: data input/output - - num: 20 - sym: I/O__6 - desc: data input/output - - num: 21 - sym: I/O__7 - desc: data input/output - - num: 22 - sym: ~CS - desc: chip select (active low) - - num: 23 - sym: A__10 - desc: address input - - num: 24 - sym: ~OE - desc: output enable (active low) - - num: 25 - sym: A__11 - desc: address input - - num: 26 - sym: A__9 - desc: address input - - num: 27 - sym: A__8 - desc: address input - - num: 28 - sym: A__13 - desc: address input - - num: 29 - sym: ~WE - desc: write enable (active low) - - num: 30 - sym: A__17 - desc: address input - - num: 31 - sym: A__15 - desc: address input - - num: 32 - sym: Vcc - desc: supply voltage + 'I/O__3': + desc: 'data input/output' + 'I/O__4': + desc: 'data input/output' + 'I/O__5': + desc: 'data input/output' + 'I/O__6': + desc: 'data input/output' + 'I/O__7': + desc: 'data input/output' + '~CS': + desc: 'chip select (active low)' + 'A__10': + desc: 'address input' + '~OE': + desc: 'output enable (active low)' + 'A__11': + desc: 'address input' + 'A__9': + desc: 'address input' + 'A__8': + desc: 'address input' + 'A__13': + desc: 'address input' + '~WE': + desc: 'write enable (active low)' + 'A__17': + desc: 'address input' + 'A__15': + desc: 'address input' + Vcc: + desc: 'supply voltage' notes: - - Data is written when ~CS is low and ~WE is low. - - Data is read when ~CS is low, ~OE is low, and ~WE is high. - - The input/output pins assume a high-impedance state if ~CS is high. -... - - - - + - 'Data is written when ~CS is low and ~WE is low.' + - 'Data is read when ~CS is low, ~OE is low, and ~WE is high.' + - 'The input/output pins assume a high-impedance state if ~CS is high.' +packages: + DIP: + - 'A__18' + - 'A__16' + - 'A__14' + - 'A__12' + - 'A__7' + - 'A__6' + - 'A__5' + - 'A__4' + - 'A__3' + - 'A__2' + - 'A__1' + - 'A__0' + - 'I/O__0' + - 'I/O__1' + - 'I/O__2' + - GND + - 'I/O__3' + - 'I/O__4' + - 'I/O__5' + - 'I/O__6' + - 'I/O__7' + - '~CS' + - 'A__10' + - '~OE' + - 'A__11' + - 'A__9' + - 'A__8' + - 'A__13' + - '~WE' + - 'A__17' + - 'A__15' + - Vcc diff --git a/6522.yaml b/6522.yaml index e42efdf..5050e2f 100644 --- a/6522.yaml +++ b/6522.yaml @@ -1,159 +1,142 @@ ---- -description: "Versatile Interface Adapter" -aliases: [W65C22] -package: DIP -pincount: 40 -family: "MOS Technology" -datasheet: "http://www.westerndesigncenter.com/wdc/documentation/w65c22.pdf" +description: 'Versatile Interface Adapter' +aliases: + - W65C22 +family: 'MOS Technology' +datasheet: 'http://www.westerndesigncenter.com/wdc/documentation/w65c22.pdf' pins: - - num: 1 - sym: GND + GND: desc: ground - - num: 2 - sym: PA0 - desc: port A - - num: 3 - sym: PA1 - desc: port A - - num: 4 - sym: PA2 - desc: port A - - num: 5 - sym: PA3 - desc: port A - - num: 6 - sym: PA4 - desc: port A - - num: 7 - sym: PA5 - desc: port A - - num: 8 - sym: PA6 - desc: port A - - num: 9 - sym: PA7 - desc: port A - - num: 10 - sym: PB0 - desc: port B - - num: 11 - sym: PB1 - desc: port B - - num: 12 - sym: PB2 - desc: port B - - num: 13 - sym: PB3 - desc: port B - - num: 14 - sym: PB4 - desc: port B - - num: 15 - sym: PB5 - desc: port B - - num: 16 - sym: PB6 - desc: port B (pulse counting input for timer 2) - - num: 17 - sym: PB7 - desc: port B (controllable by timer 1) - - num: 18 - sym: CB1 - desc: port B control (shift register clock) - - num: 19 - sym: CB2 - desc: port B control (shift register data) - - num: 20 - sym: Vcc - desc: supply voltage - - num: 21 - sym: ~IRQ - desc: interrupt request output* - - num: 22 - sym: R/~W - desc: read/write select - - num: 23 - sym: ~CS2 - desc: chip select (active low) - - num: 24 - sym: CS1 - desc: chip select (active high) - - num: 25 - sym: "∅2" - desc: phase-2 clock input - - num: 26 - sym: D7 - desc: data bus - - num: 27 - sym: D6 - desc: data bus - - num: 28 - sym: D5 - desc: data bus - - num: 29 - sym: D4 - desc: data bus - - num: 30 - sym: D3 - desc: data bus - - num: 31 - sym: D2 - desc: data bus - - num: 32 - sym: D1 - desc: data bus - - num: 33 - sym: D0 - desc: data bus - - num: 34 - sym: ~RES - desc: reset (active low) - - num: 35 - sym: RS3 - desc: register select (address bus) - - num: 36 - sym: RS2 - desc: register select (address bus) - - num: 37 - sym: RS1 - desc: register select (address bus) - - num: 38 - sym: RS0 - desc: register select (address bus) - - num: 39 - sym: CA2 - desc: port A control - - num: 40 - sym: CA1 - desc: port A control + PA0: + desc: 'port A' + PA1: + desc: 'port A' + PA2: + desc: 'port A' + PA3: + desc: 'port A' + PA4: + desc: 'port A' + PA5: + desc: 'port A' + PA6: + desc: 'port A' + PA7: + desc: 'port A' + PB0: + desc: 'port B' + PB1: + desc: 'port B' + PB2: + desc: 'port B' + PB3: + desc: 'port B' + PB4: + desc: 'port B' + PB5: + desc: 'port B' + PB6: + desc: 'port B (pulse counting input for timer 2)' + PB7: + desc: 'port B (controllable by timer 1)' + CB1: + desc: 'port B control (shift register clock)' + CB2: + desc: 'port B control (shift register data)' + Vcc: + desc: 'supply voltage' + '~IRQ': + desc: 'interrupt request output*' + 'R/~W': + desc: 'read/write select' + '~CS2': + desc: 'chip select (active low)' + CS1: + desc: 'chip select (active high)' + '∅2': + desc: 'phase-2 clock input' + D7: + desc: 'data bus' + D6: + desc: 'data bus' + D5: + desc: 'data bus' + D4: + desc: 'data bus' + D3: + desc: 'data bus' + D2: + desc: 'data bus' + D1: + desc: 'data bus' + D0: + desc: 'data bus' + '~RES': + desc: 'reset (active low)' + RS3: + desc: 'register select (address bus)' + RS2: + desc: 'register select (address bus)' + RS1: + desc: 'register select (address bus)' + RS0: + desc: 'register select (address bus)' + CA2: + desc: 'port A control' + CA1: + desc: 'port A control' specs: - - param: "Maximum clock frequency" - val: [1 (NMOS), 14 (W65C22)] - unit: MHz + - + param: 'Maximum clock frequency' + val: + - '1 (NMOS)' + - '14 (W65C22)' + unit: MHz notes: - - * In older chips, ~IRQ was an open drain output. In the W65C22S, it is fully driven. - - "Registers: - - - - - - - - - - - - - - - - - -
$00Output register B (write), input register B (read)
$01Output register A (write), input register A (read)
$02Data direction register B
$03Data direction register A
$04Timer 1 latch LSB (write), timer 1 counter LSB (read)
$05Timer 1 counter MSB
$06Timer 1 latch LSB
$07Timer 1 latch MSB
$08Timer 2 latch LSB (write), timer 2 counter LSB (read)
$09Timer 2 counter MSB
$0AShift register
$0BAuxiliary control register
$0CPeripheral control register
$0DInterrupt flag register
$0EInterrupt enable register
$0FSame as register $01, but with no effect on handshake
" - - Timer 1 can operate in one-shot mode or free-running mode (square wave). - - Timer 2 can operate in one-shot mode or pulse-counting mode (counts negative pulses on PB6). - - "Counters for timers in one-shot or free-running mode decrement at the ∅2 clock rate." - - The shift register is 8 bits wide, can shift in or out, and can generate its own clock or shift under the control of an external clock on CB1. -... - + - 'In older chips, ~IRQ was an open drain output. In the W65C22S, it is fully driven.' + - 'Registers:
$00Output register B (write), input register B (read)
$01Output register A (write), input register A (read)
$02Data direction register B
$03Data direction register A
$04Timer 1 latch LSB (write), timer 1 counter LSB (read)
$05Timer 1 counter MSB
$06Timer 1 latch LSB
$07Timer 1 latch MSB
$08Timer 2 latch LSB (write), timer 2 counter LSB (read)
$09Timer 2 counter MSB
$0AShift register
$0BAuxiliary control register
$0CPeripheral control register
$0DInterrupt flag register
$0EInterrupt enable register
$0FSame as register $01, but with no effect on handshake
' + - 'Timer 1 can operate in one-shot mode or free-running mode (square wave).' + - 'Timer 2 can operate in one-shot mode or pulse-counting mode (counts negative pulses on PB6).' + - 'Counters for timers in one-shot or free-running mode decrement at the ∅2 clock rate.' + - 'The shift register is 8 bits wide, can shift in or out, and can generate its own clock or shift under the control of an external clock on CB1.' +packages: + DIP: + - GND + - PA0 + - PA1 + - PA2 + - PA3 + - PA4 + - PA5 + - PA6 + - PA7 + - PB0 + - PB1 + - PB2 + - PB3 + - PB4 + - PB5 + - PB6 + - PB7 + - CB1 + - CB2 + - Vcc + - '~IRQ' + - 'R/~W' + - '~CS2' + - CS1 + - '∅2' + - D7 + - D6 + - D5 + - D4 + - D3 + - D2 + - D1 + - D0 + - '~RES' + - RS3 + - RS2 + - RS1 + - RS0 + - CA2 + - CA1 diff --git a/6581.yaml b/6581.yaml index c845efa..0c17cb4 100644 --- a/6581.yaml +++ b/6581.yaml @@ -1,138 +1,106 @@ ---- -description: "Sound Interface Device (SID)" -aliases: [SID] -package: DIP -pincount: 28 -family: "MOS Technology" -datasheet: "http://www.waitingforfriday.com/index.php/Commodore_SID_6581_Datasheet" +description: 'Sound Interface Device (SID)' +aliases: + - SID +family: 'MOS Technology' +datasheet: 'http://www.waitingforfriday.com/index.php/Commodore_SID_6581_Datasheet' pins: - - num: 1 - sym: CAP1A - desc: capacitor C1 connection - - num: 2 - sym: CAP1B - desc: capacitor C1 connection - - num: 3 - sym: CAP2A - desc: capacitor C2 connection - - num: 4 - sym: CAP2B - desc: capacitor C2 connection - - num: 5 - sym: ~RES - desc: master reset - - num: 6 - sym: "∅2" - desc: master clock - - num: 7 - sym: R/~W - desc: read/write select - - num: 8 - sym: ~CS - desc: chip select (active low) - - num: 9 - sym: A0 - desc: address bus (register select) - - num: 10 - sym: A1 - desc: address bus (register select) - - num: 11 - sym: A2 - desc: address bus (register select) - - num: 12 - sym: A3 - desc: address bus (register select) - - num: 13 - sym: A4 - desc: address bus (register select) - - num: 14 - sym: GND + CAP1A: + desc: 'capacitor C1 connection' + CAP1B: + desc: 'capacitor C1 connection' + CAP2A: + desc: 'capacitor C2 connection' + CAP2B: + desc: 'capacitor C2 connection' + '~RES': + desc: 'master reset' + '∅2': + desc: 'master clock' + 'R/~W': + desc: 'read/write select' + '~CS': + desc: 'chip select (active low)' + A0: + desc: 'address bus (register select)' + A1: + desc: 'address bus (register select)' + A2: + desc: 'address bus (register select)' + A3: + desc: 'address bus (register select)' + A4: + desc: 'address bus (register select)' + GND: desc: ground - - num: 15 - sym: D0 - desc: data bus - - num: 16 - sym: D1 - desc: data bus - - num: 17 - sym: D2 - desc: data bus - - num: 18 - sym: D3 - desc: data bus - - num: 19 - sym: D4 - desc: data bus - - num: 20 - sym: D5 - desc: data bus - - num: 21 - sym: D6 - desc: data bus - - num: 22 - sym: D7 - desc: data bus - - num: 23 - sym: POTY - desc: Y-axis potentiometer input - - num: 24 - sym: POTX - desc: X-axis potentiometer input - - num: 25 - sym: Vcc - desc: "+5VDC supply" - - num: 26 - sym: EXT IN - desc: external audio input - - num: 27 - sym: AUDIO OUT - desc: audio output - - num: 28 - sym: Vdd - desc: "+12VDC supply" + D0: + desc: 'data bus' + D1: + desc: 'data bus' + D2: + desc: 'data bus' + D3: + desc: 'data bus' + D4: + desc: 'data bus' + D5: + desc: 'data bus' + D6: + desc: 'data bus' + D7: + desc: 'data bus' + POTY: + desc: 'Y-axis potentiometer input' + POTX: + desc: 'X-axis potentiometer input' + Vcc: + desc: '+5VDC supply' + 'EXT IN': + desc: 'external audio input' + 'AUDIO OUT': + desc: 'audio output' + Vdd: + desc: '+12VDC supply' specs: - - param: "Minimum clock cycle time" - val: 1 - unit: "µs" + - + param: 'Minimum clock cycle time' + val: '1' + unit: 'µs' notes: - - C1 and C2 are integrating capacitors for the filter; polystyrene capacitors are preferred. - - C1 and C2 should have the same value. 2200 pF gives good operation over the audio range (30Hz-12kHz). - - "Filter cutoff frequency is approx. 2.6×10-5/C (where C is the value of C1 or C2)." - - "POTX and POTY pins must be connected to RC networks; the time constant RC should be 4.7×10-4. Recommended capacitor value is 1000 pF, recommended potentiometer value is 470 kΩ." - - "Maximum audio output level is approx. 3V p-p at a 6V DC level. A 1kΩ resistor should be connected from AUDIO OUT to ground, and a 1-10µF electrolytic capacitor should be used for AC coupling." - - "Registers: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
$00Voice 1 frequency low byte
$01Voice 1 frequency high byte
$02Voice 1 pulse width low byte
$03Voice 1 pulse width high byte (bits 3-0)
$04Voice 1 control (gate, sync, ring mod, waveform)
$05Voice 1 attack/decay rates
$06Voice 1 sustain level/release rate
$07Voice 2 frequency low byte
$08Voice 2 frequency high byte
$09Voice 2 pulse width low byte
$0AVoice 2 pulse width high byte (bits 3-0)
$0BVoice 2 control (gate, sync, ring mod, waveform)
$0CVoice 2 attack/decay rates
$0DVoice 2 sustain level/release rate
$0EVoice 3 frequency low byte
$0FVoice 3 frequency high byte
$10Voice 3 pulse width low byte
$11Voice 3 pulse width high byte (bits 3-0)
$12Voice 3 control (gate, sync, ring mod, waveform)
$13Voice 3 attack/decay rates
$14Voice 3 sustain level/release rate
$15Filter cutoff frequency low byte
$16Filter cutoff frequency high byte (bits 2-0)
$17Filter resonance/control
$18Filter mode/volume control
$19POTX value (0-255), updated every 512 clock cycles
$1APOTY value (0-255), updated every 512 clock cycles
$1BUpper 8 bits of Oscillator 3 value (random number if noise waveform is selected)
$1CUpper 8 bits of Voice 3 envelope generator value
" - - "Oscillator frequency = (Fn × Fclk/16777216) Hz" - - "Pulse width = (PWn/40.95) %" -... - + - 'C1 and C2 are integrating capacitors for the filter; polystyrene capacitors are preferred.' + - 'C1 and C2 should have the same value. 2200 pF gives good operation over the audio range (30Hz-12kHz).' + - 'Filter cutoff frequency is approx. 2.6×10-5/C (where C is the value of C1 or C2).' + - 'POTX and POTY pins must be connected to RC networks; the time constant RC should be 4.7×10-4. Recommended capacitor value is 1000 pF, recommended potentiometer value is 470 kΩ.' + - 'Maximum audio output level is approx. 3V p-p at a 6V DC level. A 1kΩ resistor should be connected from AUDIO OUT to ground, and a 1-10µF electrolytic capacitor should be used for AC coupling.' + - 'Registers:
$00Voice 1 frequency low byte
$01Voice 1 frequency high byte
$02Voice 1 pulse width low byte
$03Voice 1 pulse width high byte (bits 3-0)
$04Voice 1 control (gate, sync, ring mod, waveform)
$05Voice 1 attack/decay rates
$06Voice 1 sustain level/release rate
$07Voice 2 frequency low byte
$08Voice 2 frequency high byte
$09Voice 2 pulse width low byte
$0AVoice 2 pulse width high byte (bits 3-0)
$0BVoice 2 control (gate, sync, ring mod, waveform)
$0CVoice 2 attack/decay rates
$0DVoice 2 sustain level/release rate
$0EVoice 3 frequency low byte
$0FVoice 3 frequency high byte
$10Voice 3 pulse width low byte
$11Voice 3 pulse width high byte (bits 3-0)
$12Voice 3 control (gate, sync, ring mod, waveform)
$13Voice 3 attack/decay rates
$14Voice 3 sustain level/release rate
$15Filter cutoff frequency low byte
$16Filter cutoff frequency high byte (bits 2-0)
$17Filter resonance/control
$18Filter mode/volume control
$19POTX value (0-255), updated every 512 clock cycles
$1APOTY value (0-255), updated every 512 clock cycles
$1BUpper 8 bits of Oscillator 3 value (random number if noise waveform is selected)
$1CUpper 8 bits of Voice 3 envelope generator value
' + - 'Oscillator frequency = (Fn × Fclk/16777216) Hz' + - 'Pulse width = (PWn/40.95) %' +packages: + DIP: + - CAP1A + - CAP1B + - CAP2A + - CAP2B + - '~RES' + - '∅2' + - 'R/~W' + - '~CS' + - A0 + - A1 + - A2 + - A3 + - A4 + - GND + - D0 + - D1 + - D2 + - D3 + - D4 + - D5 + - D6 + - D7 + - POTY + - POTX + - Vcc + - 'EXT IN' + - 'AUDIO OUT' + - Vdd diff --git a/6809E.yaml b/6809E.yaml index 54d6f2f..2aff0de 100644 --- a/6809E.yaml +++ b/6809E.yaml @@ -1,182 +1,142 @@ ---- -description: "8-bit microprocessor" -aliases: [68A09E, 68B09E] -package: DIP -pincount: 40 -family: "Motorola" -datasheet: "http://www.classiccmp.org/dunfield/r/6809e.pdf" +description: '8-bit microprocessor' +aliases: + - 68A09E + - 68B09E +family: Motorola +datasheet: 'http://www.classiccmp.org/dunfield/r/6809e.pdf' pins: - - num: 1 - sym: Vss + Vss: desc: ground - - num: 2 - sym: ~NMI - desc: non-maskable interrupt (active low) - - num: 3 - sym: ~IRQ - desc: interrupt request (active low) - - num: 4 - sym: ~FIRQ - desc: fast interrupt request (active low) - - num: 5 - sym: BS - desc: bus status output - - num: 6 - sym: BA - desc: bus available output - - num: 7 - sym: Vcc - desc: supply voltage - - num: 8 - sym: A0 - desc: address bus - - num: 9 - sym: A1 - desc: address bus - - num: 10 - sym: A2 - desc: address bus - - num: 11 - sym: A3 - desc: address bus - - num: 12 - sym: A4 - desc: address bus - - num: 13 - sym: A5 - desc: address bus - - num: 14 - sym: A6 - desc: address bus - - num: 15 - sym: A7 - desc: address bus - - num: 16 - sym: A8 - desc: address bus - - num: 17 - sym: A9 - desc: address bus - - num: 18 - sym: A10 - desc: address bus - - num: 19 - sym: A11 - desc: address bus - - num: 20 - sym: A12 - desc: address bus - - num: 21 - sym: A13 - desc: address bus - - num: 22 - sym: A14 - desc: address bus - - num: 23 - sym: A15 - desc: address bus - - num: 24 - sym: D7 - desc: data bus - - num: 25 - sym: D6 - desc: data bus - - num: 26 - sym: D5 - desc: data bus - - num: 27 - sym: D4 - desc: data bus - - num: 28 - sym: D3 - desc: data bus - - num: 29 - sym: D2 - desc: data bus - - num: 30 - sym: D1 - desc: data bus - - num: 31 - sym: D0 - desc: data bus - - num: 32 - sym: R/~W - desc: bus read/write - - num: 33 - sym: BUSY - desc: busy status - - num: 34 - sym: E - desc: clock input - - num: 35 - sym: Q - desc: quadrature clock input - - num: 36 - sym: AVMA - desc: advanced VMA signal (indicates bus will be used in the next cycle) - - num: 37 - sym: ~RESET - desc: reset (active low) - - num: 38 - sym: LIC - desc: last instruction cycle (high during last cycle of instruction) - - num: 39 - sym: TSC - desc: three-state control (active high; tri-states address, data, R/~W~) - - num: 40 - sym: ~HALT - desc: halt (active low) + '~NMI': + desc: 'non-maskable interrupt (active low)' + '~IRQ': + desc: 'interrupt request (active low)' + '~FIRQ': + desc: 'fast interrupt request (active low)' + BS: + desc: 'bus status output' + BA: + desc: 'bus available output' + Vcc: + desc: 'supply voltage' + A0: + desc: 'address bus' + A1: + desc: 'address bus' + A2: + desc: 'address bus' + A3: + desc: 'address bus' + A4: + desc: 'address bus' + A5: + desc: 'address bus' + A6: + desc: 'address bus' + A7: + desc: 'address bus' + A8: + desc: 'address bus' + A9: + desc: 'address bus' + A10: + desc: 'address bus' + A11: + desc: 'address bus' + A12: + desc: 'address bus' + A13: + desc: 'address bus' + A14: + desc: 'address bus' + A15: + desc: 'address bus' + D7: + desc: 'data bus' + D6: + desc: 'data bus' + D5: + desc: 'data bus' + D4: + desc: 'data bus' + D3: + desc: 'data bus' + D2: + desc: 'data bus' + D1: + desc: 'data bus' + D0: + desc: 'data bus' + 'R/~W': + desc: 'bus read/write' + BUSY: + desc: 'busy status' + E: + desc: 'clock input' + Q: + desc: 'quadrature clock input' + AVMA: + desc: 'advanced VMA signal (indicates bus will be used in the next cycle)' + '~RESET': + desc: 'reset (active low)' + LIC: + desc: 'last instruction cycle (high during last cycle of instruction)' + TSC: + desc: 'three-state control (active high; tri-states address, data, R/~W~)' + '~HALT': + desc: 'halt (active low)' specs: - - param: "Clock speed" - val: [1 (6809E), 1.5 (68A09E), 2 (68B09E)] - unit: MHz + - + param: 'Clock speed' + val: + - '1 (6809E)' + - '1.5 (68A09E)' + - '2 (68B09E)' + unit: MHz notes: - - "Registers: - - - - - - - - - -
A, B8-bit Accumulators (can be combined into 16-bit accumulator, D)
X16-bit Index Register
Y16-bit Index Register
U16-bit User Stack Pointer
S16-bit Hardware Stack Pointer
PC16-bit Program Counter
DP8-bit Direct Page Register
CC8-bit Condition Code Register

" - - "Condition code bits: EFHINZVC - - - - - - - - - -
E(bit 7)Entire machine state was stacked
F(bit 6)~FIRQ inhibit flag
H(bit 5)Half-carry flag (valid only after ADC or ADD instructions)
I(bit 4)~IRQ inhibit flag
N(bit 3)Negative flag (most significant bit of previous result)
Z(bit 2)Zero flag
V(bit 1)Signed two's complement overflow flag
C(bit 0)Carry flag

" - - "Register stacking order: - - - - - - - - - - - - - -
CC(pulled first, pushed last)
A
B
DP
X msb
X lsb
Y msb
Y lsb
U/S msb
U/S lsb
PC msb
PC lsb(pulled last, pushed first)

" - - "Interrupt vectors: - - - - - - - - - -
FFFE-FFFF~RESET
FFFC-FFFD~NMI
FFFA-FFFBSWI
FFF8-FFF9~IRQ
FFF6-FFF7~FIRQ
FFF4-FFF5SWI2
FFF2-FFF3SWI3
FFF1-FFF1Reserved
" - + - 'Registers:
A, B8-bit Accumulators (can be combined into 16-bit accumulator, D)
X16-bit Index Register
Y16-bit Index Register
U16-bit User Stack Pointer
S16-bit Hardware Stack Pointer
PC16-bit Program Counter
DP8-bit Direct Page Register
CC8-bit Condition Code Register

' + - 'Condition code bits: EFHINZVC
E(bit 7)Entire machine state was stacked
F(bit 6)~FIRQ inhibit flag
H(bit 5)Half-carry flag (valid only after ADC or ADD instructions)
I(bit 4)~IRQ inhibit flag
N(bit 3)Negative flag (most significant bit of previous result)
Z(bit 2)Zero flag
V(bit 1)Signed two''s complement overflow flag
C(bit 0)Carry flag

' + - 'Register stacking order:
CC(pulled first, pushed last)
A
B
DP
X msb
X lsb
Y msb
Y lsb
U/S msb
U/S lsb
PC msb
PC lsb(pulled last, pushed first)

' + - 'Interrupt vectors:
FFFE-FFFF~RESET
FFFC-FFFD~NMI
FFFA-FFFBSWI
FFF8-FFF9~IRQ
FFF6-FFF7~FIRQ
FFF4-FFF5SWI2
FFF2-FFF3SWI3
FFF1-FFF1Reserved
' +packages: + DIP: + - Vss + - '~NMI' + - '~IRQ' + - '~FIRQ' + - BS + - BA + - Vcc + - A0 + - A1 + - A2 + - A3 + - A4 + - A5 + - A6 + - A7 + - A8 + - A9 + - A10 + - A11 + - A12 + - A13 + - A14 + - A15 + - D7 + - D6 + - D5 + - D4 + - D3 + - D2 + - D1 + - D0 + - 'R/~W' + - BUSY + - E + - Q + - AVMA + - '~RESET' + - LIC + - TSC + - '~HALT' diff --git a/6821.yaml b/6821.yaml index 6a562d3..3124a1a 100644 --- a/6821.yaml +++ b/6821.yaml @@ -1,155 +1,167 @@ ---- -description: "Peripheral interface adapter" -aliases: [68A21, 68B21] -package: DIP -pincount: 40 -family: "Motorola" -datasheet: "http://www.jameco.com/Jameco/Products/ProdDS/43596MOT.pdf" +description: 'Peripheral interface adapter' +aliases: + - 68A21 + - 68B21 +family: Motorola +datasheet: 'http://www.jameco.com/Jameco/Products/ProdDS/43596MOT.pdf' pins: - - num: 1 - sym: GND + GND: desc: ground - - num: 2 - sym: PA0 - desc: port A - - num: 3 - sym: PA1 - desc: port A - - num: 4 - sym: PA2 - desc: port A - - num: 5 - sym: PA3 - desc: port A - - num: 6 - sym: PA4 - desc: port A - - num: 7 - sym: PA5 - desc: port A - - num: 8 - sym: PA6 - desc: port A - - num: 9 - sym: PA7 - desc: port A - - num: 10 - sym: PB0 - desc: port B - - num: 11 - sym: PB1 - desc: port B - - num: 12 - sym: PB2 - desc: port B - - num: 13 - sym: PB3 - desc: port B - - num: 14 - sym: PB4 - desc: port B - - num: 15 - sym: PB5 - desc: port B - - num: 16 - sym: PB6 - desc: port B - - num: 17 - sym: PB7 - desc: port B - - num: 18 - sym: CB1 - desc: peripheral control (port B) - - num: 19 - sym: CB2 - desc: peripheral control (port B) - - num: 20 - sym: Vcc - desc: supply voltage - - num: 21 - sym: R/~W + PA0: + desc: 'port A' + PA1: + desc: 'port A' + PA2: + desc: 'port A' + PA3: + desc: 'port A' + PA4: + desc: 'port A' + PA5: + desc: 'port A' + PA6: + desc: 'port A' + PA7: + desc: 'port A' + PB0: + desc: 'port B' + PB1: + desc: 'port B' + PB2: + desc: 'port B' + PB3: + desc: 'port B' + PB4: + desc: 'port B' + PB5: + desc: 'port B' + PB6: + desc: 'port B' + PB7: + desc: 'port B' + CB1: + desc: 'peripheral control (port B)' + CB2: + desc: 'peripheral control (port B)' + Vcc: + desc: 'supply voltage' + 'R/~W': desc: read/write - - num: 22 - sym: CS0 - desc: chip select (active high) - - num: 23 - sym: ~CS2 - desc: chip select (active low) - - num: 24 - sym: CS1 - desc: chip select (active high) - - num: 25 - sym: E + CS0: + desc: 'chip select (active high)' + '~CS2': + desc: 'chip select (active low)' + CS1: + desc: 'chip select (active high)' + E: desc: clock - - num: 26 - sym: D7 - desc: data bus - - num: 27 - sym: D6 - desc: data bus - - num: 28 - sym: D5 - desc: data bus - - num: 29 - sym: D4 - desc: data bus - - num: 30 - sym: D3 - desc: data bus - - num: 31 - sym: D2 - desc: data bus - - num: 32 - sym: D1 - desc: data bus - - num: 33 - sym: D0 - desc: data bus - - num: 34 - sym: ~RESET - desc: master reset (active low) - - num: 35 - sym: RS1 - desc: register select (address bus) - - num: 36 - sym: RS0 - desc: register select (address bus) - - num: 37 - sym: ~IRQB - desc: interrupt output (active low) - - num: 38 - sym: ~IRQA - desc: interrupt output (active low) - - num: 39 - sym: CA2 - desc: peripheral control (port A) - - num: 40 - sym: CA1 - desc: peripheral control (port A) + D7: + desc: 'data bus' + D6: + desc: 'data bus' + D5: + desc: 'data bus' + D4: + desc: 'data bus' + D3: + desc: 'data bus' + D2: + desc: 'data bus' + D1: + desc: 'data bus' + D0: + desc: 'data bus' + '~RESET': + desc: 'master reset (active low)' + RS1: + desc: 'register select (address bus)' + RS0: + desc: 'register select (address bus)' + '~IRQB': + desc: 'interrupt output (active low)' + '~IRQA': + desc: 'interrupt output (active low)' + CA2: + desc: 'peripheral control (port A)' + CA1: + desc: 'peripheral control (port A)' specs: - - param: "Max. clock frequency" - val: [1 (6821), 1.5 (68A21), 2 (68B21)] - unit: MHz - - param: "Pulse width, E low" - val: [430 (6821), 280 (68A21), 210 (68B21)] - unit: ns - - param: "Pulse width, E high" - val: [450 (6821), 280 (68A21), 220 (68B21)] - unit: ns - - param: "Min. ~RESET pulse length" - val: 1 - unit: "µs" + - + param: 'Max. clock frequency' + val: + - '1 (6821)' + - '1.5 (68A21)' + - '2 (68B21)' + unit: MHz + - + param: 'Pulse width, E low' + val: + - '430 (6821)' + - '280 (68A21)' + - '210 (68B21)' + unit: ns + - + param: 'Pulse width, E high' + val: + - '450 (6821)' + - '280 (68A21)' + - '220 (68B21)' + unit: ns + - + param: 'Min. ~RESET pulse length' + val: '1' + unit: 'µs' notes: - - Port A is designed to drive CMOS logic to normal 30%/70% levels. - - Port B uses three-state NMOS buffers and requires external resistors to pull up to CMOS levels. - - Port B is capable of driving Darlingtons. - - When in output mode, a read of Port A returns the actual pin states. - - When in output mode, a read of Port B returns the contents of the output latch. - - "RS=00, bit 2 of control register A=1: peripheral register A" - - "RS=00, bit 2 of control register A=0: data direction register A" - - "RS=01: control register A" - - "RS=10, bit 2 of control register B=1: peripheral register B" - - "RS=10, bit 2 of control register B=0: data direction register B" - - "RS=11: control register B" -... - + - 'Port A is designed to drive CMOS logic to normal 30%/70% levels.' + - 'Port B uses three-state NMOS buffers and requires external resistors to pull up to CMOS levels.' + - 'Port B is capable of driving Darlingtons.' + - 'When in output mode, a read of Port A returns the actual pin states.' + - 'When in output mode, a read of Port B returns the contents of the output latch.' + - 'RS=00, bit 2 of control register A=1: peripheral register A' + - 'RS=00, bit 2 of control register A=0: data direction register A' + - 'RS=01: control register A' + - 'RS=10, bit 2 of control register B=1: peripheral register B' + - 'RS=10, bit 2 of control register B=0: data direction register B' + - 'RS=11: control register B' +packages: + DIP: + - GND + - PA0 + - PA1 + - PA2 + - PA3 + - PA4 + - PA5 + - PA6 + - PA7 + - PB0 + - PB1 + - PB2 + - PB3 + - PB4 + - PB5 + - PB6 + - PB7 + - CB1 + - CB2 + - Vcc + - 'R/~W' + - CS0 + - '~CS2' + - CS1 + - E + - D7 + - D6 + - D5 + - D4 + - D3 + - D2 + - D1 + - D0 + - '~RESET' + - RS1 + - RS0 + - '~IRQB' + - '~IRQA' + - CA2 + - CA1 diff --git a/6N137.yaml b/6N137.yaml index 06284bc..e81976d 100644 --- a/6N137.yaml +++ b/6N137.yaml @@ -1,50 +1,52 @@ ---- -description: "10 MBit/s single-channel high speed logic gate output optocoupler" -aliases: [HCPL2601, HCPL2611] -package: DIP -pincount: 8 -family: "Fairchild" -datasheet: "http://www.fairchildsemi.com/ds/6N/6N137.pdf" +description: '10 MBit/s single-channel high speed logic gate output optocoupler' +aliases: + - HCPL2601 + - HCPL2611 +family: Fairchild +datasheet: 'http://www.fairchildsemi.com/ds/6N/6N137.pdf' pins: - - num: 1 - sym: N/C - desc: no connection - - num: 2 - sym: "V__F +" - desc: emitter, anode - - num: 3 - sym: "V__F -" - desc: emitter, cathode - - num: 4 - sym: N/C - desc: no connection - - num: 5 - sym: GND - desc: supply ground - - num: 6 - sym: V__O + N/C: + desc: 'no connection' + 'V__F +': + desc: 'emitter, anode' + 'V__F -': + desc: 'emitter, cathode' + GND: + desc: 'supply ground' + 'V__O': desc: output - - num: 7 - sym: V__E - desc: enable input - - num: 8 - sym: Vcc - desc: supply voltage + 'V__E': + desc: 'enable input' + Vcc: + desc: 'supply voltage' specs: - - param: "Supply voltage, minimum" - val: 4.5 - unit: V - - param: "Supply voltage, maxmimum" - val: 5.5 - unit: V - - param: "Input forward voltage, typical @ 25C" - val: 1.4 - unit: V - - param: "Input forward voltage, typical @ 25C" - val: 1.4 - unit: V - - param: "Input forward voltage, max" - val: 1.8 - unit: V -... - + - + param: 'Supply voltage, minimum' + val: '4.5' + unit: V + - + param: 'Supply voltage, maxmimum' + val: '5.5' + unit: V + - + param: 'Input forward voltage, typical @ 25C' + val: '1.4' + unit: V + - + param: 'Input forward voltage, typical @ 25C' + val: '1.4' + unit: V + - + param: 'Input forward voltage, max' + val: '1.8' + unit: V +packages: + DIP: + - N/C + - 'V__F +' + - 'V__F -' + - N/C + - GND + - 'V__O' + - 'V__E' + - Vcc diff --git a/7400.yaml b/7400.yaml index 108bef5..a6c0955 100644 --- a/7400.yaml +++ b/7400.yaml @@ -1,56 +1,55 @@ ---- -description: Quad 2-input NAND gate -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.nxp.com/acrobat_download/datasheets/74HC_HCT00_3.pdf" +description: 'Quad 2-input NAND gate' +family: '7400' +datasheet: 'http://www.nxp.com/acrobat_download/datasheets/74HC_HCT00_3.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: 1Y - desc: data output - - num: 4 - sym: 2A - desc: data input - - num: 5 - sym: 2B - desc: data input - - num: 6 - sym: 2Y - desc: data output - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1Y: + desc: 'data output' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 2Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 3Y - desc: data output - - num: 9 - sym: 3A - desc: data input - - num: 10 - sym: 3B - desc: data input - - num: 11 - sym: 4Y - desc: data output - - num: 12 - sym: 4A - desc: data input - - num: 13 - sym: 4B - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage + 3Y: + desc: 'data output' + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 4B: + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA, nB to nY - val: [7 (74HC), 10 (74HCT)] - unit: ns -... - - + - + param: 'Propagation delay, nA, nB to nY' + val: + - '7 (74HC)' + - '10 (74HCT)' + unit: ns +packages: + DIP: + - 1A + - 1B + - 1Y + - 2A + - 2B + - 2Y + - GND + - 3Y + - 3A + - 3B + - 4Y + - 4A + - 4B + - Vcc diff --git a/7402.yaml b/7402.yaml index ee831cd..b8d1989 100644 --- a/7402.yaml +++ b/7402.yaml @@ -1,55 +1,55 @@ ---- -description: Quad 2-input NOR gate -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.nxp.com/acrobat_download/datasheets/74HC_HCT02_3.pdf" +description: 'Quad 2-input NOR gate' +family: '7400' +datasheet: 'http://www.nxp.com/acrobat_download/datasheets/74HC_HCT02_3.pdf' pins: - - num: 1 - sym: 1Y - desc: data output - - num: 2 - sym: 1A - desc: data input - - num: 3 - sym: 1B - desc: data input - - num: 4 - sym: 2Y - desc: data output - - num: 5 - sym: 2A - desc: data input - - num: 6 - sym: 2B - desc: data input - - num: 7 - sym: GND + 1Y: + desc: 'data output' + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 2Y: + desc: 'data output' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + GND: desc: ground - - num: 8 - sym: 3A - desc: data input - - num: 9 - sym: 3B - desc: data input - - num: 10 - sym: 3Y - desc: data output - - num: 11 - sym: 4A - desc: data input - - num: 12 - sym: 4B - desc: data input - - num: 13 - sym: 4Y - desc: data output - - num: 14 - sym: Vcc - desc: supply voltage + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3Y: + desc: 'data output' + 4A: + desc: 'data input' + 4B: + desc: 'data input' + 4Y: + desc: 'data output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA, nB to nY - val: [7 (74HC), 9 (74HCT)] - unit: ns -... - + - + param: 'Propagation delay, nA, nB to nY' + val: + - '7 (74HC)' + - '9 (74HCT)' + unit: ns +packages: + DIP: + - 1Y + - 1A + - 1B + - 2Y + - 2A + - 2B + - GND + - 3A + - 3B + - 3Y + - 4A + - 4B + - 4Y + - Vcc diff --git a/7404.yaml b/7404.yaml index 9424110..fa7d9a8 100644 --- a/7404.yaml +++ b/7404.yaml @@ -1,54 +1,55 @@ ---- -description: Hex inverter -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.nxp.com/acrobat_download/datasheets/74HC_HCT04_3.pdf" +description: 'Hex inverter' +family: '7400' +datasheet: 'http://www.nxp.com/acrobat_download/datasheets/74HC_HCT04_3.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1Y - desc: data output - - num: 3 - sym: 2A - desc: data input - - num: 4 - sym: 2Y - desc: data output - - num: 5 - sym: 3A - desc: data input - - num: 6 - sym: 3Y - desc: data output - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1Y: + desc: 'data output' + 2A: + desc: 'data input' + 2Y: + desc: 'data output' + 3A: + desc: 'data input' + 3Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 4Y - desc: data output - - num: 9 - sym: 4A - desc: data input - - num: 10 - sym: 5Y - desc: data output - - num: 11 - sym: 5A - desc: data input - - num: 12 - sym: 6Y - desc: data output - - num: 13 - sym: 6A - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 5Y: + desc: 'data output' + 5A: + desc: 'data input' + 6Y: + desc: 'data output' + 6A: + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA to nY - val: [7 (74HC), 8 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, nA to nY' + val: + - '7 (74HC)' + - '8 (74HCT)' + unit: ns +packages: + DIP: + - 1A + - 1Y + - 2A + - 2Y + - 3A + - 3Y + - GND + - 4Y + - 4A + - 5Y + - 5A + - 6Y + - 6A + - Vcc diff --git a/7408.yaml b/7408.yaml index d5acf8f..b5559a7 100644 --- a/7408.yaml +++ b/7408.yaml @@ -1,54 +1,55 @@ ---- -description: Quad 2-input AND gate -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.nxp.com/acrobat_download/datasheets/74HC_HCT08_3.pdf" +description: 'Quad 2-input AND gate' +family: '7400' +datasheet: 'http://www.nxp.com/acrobat_download/datasheets/74HC_HCT08_3.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: 1Y - desc: data output - - num: 4 - sym: 2A - desc: data input - - num: 5 - sym: 2B - desc: data input - - num: 6 - sym: 2Y - desc: data output - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1Y: + desc: 'data output' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 2Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 3Y - desc: data output - - num: 9 - sym: 3A - desc: data input - - num: 10 - sym: 3B - desc: data input - - num: 11 - sym: 4Y - desc: data output - - num: 12 - sym: 4A - desc: data input - - num: 13 - sym: 4B - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage + 3Y: + desc: 'data output' + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 4B: + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA, nB to nY - val: [7 (74HC), 11 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, nA, nB to nY' + val: + - '7 (74HC)' + - '11 (74HCT)' + unit: ns +packages: + DIP: + - 1A + - 1B + - 1Y + - 2A + - 2B + - 2Y + - GND + - 3Y + - 3A + - 3B + - 4Y + - 4A + - 4B + - Vcc diff --git a/741.yaml b/741.yaml index 3089c6b..87f4c88 100644 --- a/741.yaml +++ b/741.yaml @@ -1,51 +1,51 @@ ---- -description: Operational amplifier -package: DIP -pincount: 8 -family: "linear" -datasheet: "http://www.national.com/ds/LM/LM741.pdf" +description: 'Operational amplifier' +family: linear +datasheet: 'http://www.national.com/ds/LM/LM741.pdf' pins: - - num: 1 - sym: OFFSET NULL - desc: offset null - - num: 2 - sym: IN- - desc: inverting input - - num: 3 - sym: IN+ - desc: non-inverting input - - num: 4 - sym: Vss - desc: negative supply voltage - - num: 5 - sym: OFFSET NULL - desc: offset null - - num: 6 - sym: OUT + 'OFFSET NULL': + desc: 'offset null' + IN-: + desc: 'inverting input' + IN+: + desc: 'non-inverting input' + Vss: + desc: 'negative supply voltage' + OUT: desc: output - - num: 7 - sym: Vcc - desc: positive supply voltage - - num: 8 - sym: NC - desc: no connection + Vcc: + desc: 'positive supply voltage' specs: - - param: Supply voltage - val: ["±10 (min)", "±22 (max)"] - unit: V - - param: Maximum input voltage - val: "±15" - unit: V - - param: Gain bandwidth - val: 1 - unit: MHz - - param: Slew rate - val: 0.5 - unit: "V/µs" - - param: Supply current - val: 1.7 - unit: mA + - + param: 'Supply voltage' + val: + - '±10 (min)' + - '±22 (max)' + unit: V + - + param: 'Maximum input voltage' + val: '±15' + unit: V + - + param: 'Gain bandwidth' + val: '1' + unit: MHz + - + param: 'Slew rate' + val: '0.5' + unit: 'V/µs' + - + param: 'Supply current' + val: '1.7' + unit: mA notes: - - "A 10 kΩ potentiometer connected to pins 1 and 5 can be used to null any offset voltage." -... - + - 'A 10 kΩ potentiometer connected to pins 1 and 5 can be used to null any offset voltage.' +packages: + DIP: + - 'OFFSET NULL' + - IN- + - IN+ + - Vss + - 'OFFSET NULL' + - OUT + - Vcc + - NC diff --git a/7410.yaml b/7410.yaml index 0f11da3..ca719b2 100644 --- a/7410.yaml +++ b/7410.yaml @@ -1,54 +1,55 @@ ---- -description: Triple 3-input NAND gate -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.nxp.com/acrobat_download/datasheets/74HC_HCT10_CNV_2.pdf" +description: 'Triple 3-input NAND gate' +family: '7400' +datasheet: 'http://www.nxp.com/acrobat_download/datasheets/74HC_HCT10_CNV_2.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: 2A - desc: data input - - num: 4 - sym: 2B - desc: data input - - num: 5 - sym: 2C - desc: data input - - num: 6 - sym: 2Y - desc: data output - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 2C: + desc: 'data input' + 2Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 3Y - desc: data output - - num: 9 - sym: 3A - desc: data input - - num: 10 - sym: 3B - desc: data input - - num: 11 - sym: 3C - desc: data input - - num: 12 - sym: 1Y - desc: data output - - num: 13 - sym: 1C - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage + 3Y: + desc: 'data output' + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3C: + desc: 'data input' + 1Y: + desc: 'data output' + 1C: + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA, nB, nC to nY - val: [9 (74HC), 11 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, nA, nB, nC to nY' + val: + - '9 (74HC)' + - '11 (74HCT)' + unit: ns +packages: + DIP: + - 1A + - 1B + - 2A + - 2B + - 2C + - 2Y + - GND + - 3Y + - 3A + - 3B + - 3C + - 1Y + - 1C + - Vcc diff --git a/74107.yaml b/74107.yaml index 14de00a..131d3ca 100644 --- a/74107.yaml +++ b/74107.yaml @@ -1,63 +1,73 @@ ---- -description: Dual J-K flip-flop with reset; negative-edge trigger -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc107.74hct107.pdf" +description: 'Dual J-K flip-flop with reset; negative-edge trigger' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc107.74hct107.pdf' pins: - - num: 1 - sym: 1J - desc: synchronous input - - num: 2 - sym: 1~Q - desc: complement output - - num: 3 - sym: 1Q - desc: true output - - num: 4 - sym: 1K - desc: synchronous input - - num: 5 - sym: 2Q - desc: true output - - num: 6 - sym: 2~Q - desc: complement output - - num: 7 - sym: GND + 1J: + desc: 'synchronous input' + '1~Q': + desc: 'complement output' + 1Q: + desc: 'true output' + 1K: + desc: 'synchronous input' + 2Q: + desc: 'true output' + '2~Q': + desc: 'complement output' + GND: desc: ground - - num: 8 - sym: 2J - desc: synchronous input - - num: 9 - sym: 2~CP - desc: clock input (high-to-low, edge-triggered) - - num: 10 - sym: 2~R - desc: asynchronous reset (active low) - - num: 11 - sym: 2K - desc: synchronous input - - num: 12 - sym: 1~CP - desc: clock input (high-to-low, edge-triggered) - - num: 13 - sym: 1~R - desc: asynchronous reset (active low) - - num: 14 - sym: Vcc - desc: supply voltage + 2J: + desc: 'synchronous input' + '2~CP': + desc: 'clock input (high-to-low, edge-triggered)' + '2~R': + desc: 'asynchronous reset (active low)' + 2K: + desc: 'synchronous input' + '1~CP': + desc: 'clock input (high-to-low, edge-triggered)' + '1~R': + desc: 'asynchronous reset (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, n~CP to nQ - val: [16 (74HC), 16 (74HCT)] - unit: ns - - param: Propagation delay, n~CP to n~Q - val: [16 (74HC), 18 (74HCT)] - unit: ns - - param: Propagation delay, n~R to nQ, n~Q - val: [16 (74HC), 17 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [78 (74HC), 73 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, n~CP to nQ' + val: + - '16 (74HC)' + - '16 (74HCT)' + unit: ns + - + param: 'Propagation delay, n~CP to n~Q' + val: + - '16 (74HC)' + - '18 (74HCT)' + unit: ns + - + param: 'Propagation delay, n~R to nQ, n~Q' + val: + - '16 (74HC)' + - '17 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '78 (74HC)' + - '73 (74HCT)' + unit: MHz +packages: + DIP: + - 1J + - '1~Q' + - 1Q + - 1K + - 2Q + - '2~Q' + - GND + - 2J + - '2~CP' + - '2~R' + - 2K + - '1~CP' + - '1~R' + - Vcc diff --git a/74109.yaml b/74109.yaml index 05aeeea..7067bc8 100644 --- a/74109.yaml +++ b/74109.yaml @@ -1,69 +1,79 @@ ---- -description: Dual J-K flip-flop with set and reset; positive-edge trigger -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc109.74hct109.pdf" +description: 'Dual J-K flip-flop with set and reset; positive-edge trigger' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc109.74hct109.pdf' pins: - - num: 1 - sym: 1~R~__D - desc: asynchronous reset; direct input (active low) - - num: 2 - sym: 1J - desc: synchronous input - - num: 3 - sym: 1~K - desc: synchronous input - - num: 4 - sym: 1CP - desc: clock input (low-to-high, edge-triggered) - - num: 5 - sym: 1~S~__D - desc: asynchronous set; direct input (active low) - - num: 6 - sym: 1Q - desc: true output - - num: 7 - sym: 1~Q - desc: complement output - - num: 8 - sym: GND + '1~R~__D': + desc: 'asynchronous reset; direct input (active low)' + 1J: + desc: 'synchronous input' + '1~K': + desc: 'synchronous input' + 1CP: + desc: 'clock input (low-to-high, edge-triggered)' + '1~S~__D': + desc: 'asynchronous set; direct input (active low)' + 1Q: + desc: 'true output' + '1~Q': + desc: 'complement output' + GND: desc: ground - - num: 9 - sym: 2~Q - desc: complement output - - num: 10 - sym: 2Q - desc: true output - - num: 11 - sym: 2~S~__D - desc: asynchronous set; direct input (active low) - - num: 12 - sym: 2CP - desc: clock input (low-to-high, active low) - - num: 13 - sym: 2~K - desc: synchronous input - - num: 14 - sym: 2J - desc: synchronous input - - num: 15 - sym: 2~R~__D - desc: asynchronous reset; direct input (active low) - - num: 16 - sym: Vcc - desc: supply voltage + '2~Q': + desc: 'complement output' + 2Q: + desc: 'true output' + '2~S~__D': + desc: 'asynchronous set; direct input (active low)' + 2CP: + desc: 'clock input (low-to-high, active low)' + '2~K': + desc: 'synchronous input' + 2J: + desc: 'synchronous input' + '2~R~__D': + desc: 'asynchronous reset; direct input (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nCP to nQ, n~Q - val: [15 (74HC), 17 (74HCT)] - unit: ns - - param: Propagation delay, n~S~__D to nQ, n~Q - val: [12 (74HC), 14 (74HCT)] - unit: ns - - param: Propagation delay, n~R~__D to nQ, n~Q - val: [12 (74HC), 15 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [75 (74HC), 61 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, nCP to nQ, n~Q' + val: + - '15 (74HC)' + - '17 (74HCT)' + unit: ns + - + param: 'Propagation delay, n~S~__D to nQ, n~Q' + val: + - '12 (74HC)' + - '14 (74HCT)' + unit: ns + - + param: 'Propagation delay, n~R~__D to nQ, n~Q' + val: + - '12 (74HC)' + - '15 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '75 (74HC)' + - '61 (74HCT)' + unit: MHz +packages: + DIP: + - '1~R~__D' + - 1J + - '1~K' + - 1CP + - '1~S~__D' + - 1Q + - '1~Q' + - GND + - '2~Q' + - 2Q + - '2~S~__D' + - 2CP + - '2~K' + - 2J + - '2~R~__D' + - Vcc diff --git a/7411.yaml b/7411.yaml index 3a33b8b..26a9ac2 100644 --- a/7411.yaml +++ b/7411.yaml @@ -1,54 +1,55 @@ ---- -description: Triple 3-input AND gate -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc11.74hct11.pdf" +description: 'Triple 3-input AND gate' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc11.74hct11.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: 2A - desc: data input - - num: 4 - sym: 2B - desc: data input - - num: 5 - sym: 2C - desc: data input - - num: 6 - sym: 2Y - desc: data output - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 2C: + desc: 'data input' + 2Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 3Y - desc: data output - - num: 9 - sym: 3A - desc: data input - - num: 10 - sym: 3B - desc: data input - - num: 11 - sym: 3C - desc: data input - - num: 12 - sym: 1Y - desc: data output - - num: 13 - sym: 1C - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage + 3Y: + desc: 'data output' + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3C: + desc: 'data input' + 1Y: + desc: 'data output' + 1C: + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA, nB, nC to nY - val: [10 (74HC), 11 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, nA, nB, nC to nY' + val: + - '10 (74HC)' + - '11 (74HCT)' + unit: ns +packages: + DIP: + - 1A + - 1B + - 2A + - 2B + - 2C + - 2Y + - GND + - 3Y + - 3A + - 3B + - 3C + - 1Y + - 1C + - Vcc diff --git a/74112.yaml b/74112.yaml index 495acb1..e1c77a0 100644 --- a/74112.yaml +++ b/74112.yaml @@ -1,69 +1,79 @@ ---- -description: Dual J-K flip-flop with set and reset; negative-edge trigger -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc112.74hct112.pdf" +description: 'Dual J-K flip-flop with set and reset; negative-edge trigger' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc112.74hct112.pdf' pins: - - num: 1 - sym: 1~CP - desc: clock input (high-to-low, edge-triggered) - - num: 2 - sym: 1K - desc: synchronous input - - num: 3 - sym: 1J - desc: synchronous input - - num: 4 - sym: 1~S~__D - desc: asynchronous set; direct input (active low) - - num: 5 - sym: 1Q - desc: true output - - num: 6 - sym: 1~Q - desc: complement output - - num: 7 - sym: 2~Q - desc: complement output - - num: 8 - sym: GND + '1~CP': + desc: 'clock input (high-to-low, edge-triggered)' + 1K: + desc: 'synchronous input' + 1J: + desc: 'synchronous input' + '1~S~__D': + desc: 'asynchronous set; direct input (active low)' + 1Q: + desc: 'true output' + '1~Q': + desc: 'complement output' + '2~Q': + desc: 'complement output' + GND: desc: ground - - num: 9 - sym: 2Q - desc: true output - - num: 10 - sym: 2~S~__D - desc: asynchronous set; direct input (active low) - - num: 11 - sym: 2J - desc: synchronous input - - num: 12 - sym: 2K - desc: synchronous input - - num: 13 - sym: 2~CP - desc: clock input (high-to-low, edge-triggered) - - num: 14 - sym: 2~R~__D - desc: asynchronous reset; direct input (active low) - - num: 15 - sym: 1~R~__D - desc: asynchronous reset; direct input (active low) - - num: 16 - sym: Vcc - desc: supply voltage + 2Q: + desc: 'true output' + '2~S~__D': + desc: 'asynchronous set; direct input (active low)' + 2J: + desc: 'synchronous input' + 2K: + desc: 'synchronous input' + '2~CP': + desc: 'clock input (high-to-low, edge-triggered)' + '2~R~__D': + desc: 'asynchronous reset; direct input (active low)' + '1~R~__D': + desc: 'asynchronous reset; direct input (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, n~CP to nQ, n~Q - val: [17 (74HC), 19 (74HCT)] - unit: ns - - param: Propagation delay, n~S~__D to nQ, n~Q - val: [15 (74HC), 15 (74HCT)] - unit: ns - - param: Propagation delay, n~R~__D to nQ, n~Q - val: [18 (74HC), 19 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [66 (74HC), 70 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, n~CP to nQ, n~Q' + val: + - '17 (74HC)' + - '19 (74HCT)' + unit: ns + - + param: 'Propagation delay, n~S~__D to nQ, n~Q' + val: + - '15 (74HC)' + - '15 (74HCT)' + unit: ns + - + param: 'Propagation delay, n~R~__D to nQ, n~Q' + val: + - '18 (74HC)' + - '19 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '66 (74HC)' + - '70 (74HCT)' + unit: MHz +packages: + DIP: + - '1~CP' + - 1K + - 1J + - '1~S~__D' + - 1Q + - '1~Q' + - '2~Q' + - GND + - 2Q + - '2~S~__D' + - 2J + - 2K + - '2~CP' + - '2~R~__D' + - '1~R~__D' + - Vcc diff --git a/74123.yaml b/74123.yaml index 438f0a8..90f3fe7 100644 --- a/74123.yaml +++ b/74123.yaml @@ -1,72 +1,82 @@ ---- -description: "Dual retriggerable monostable multivibrator with reset" -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc123.74hct123.pdf" +description: 'Dual retriggerable monostable multivibrator with reset' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc123.74hct123.pdf' pins: - - num: 1 - sym: 1~A - desc: negative-edge triggered input 1 - - num: 2 - sym: 1B - desc: positive-edge triggered input 1 - - num: 3 - sym: 1~R~D - desc: direct reset (active low) and positive-edge triggered input 1 - - num: 4 - sym: 1~Q - desc: active low output 1 - - num: 5 - sym: 2Q - desc: active high output 2 - - num: 6 - sym: 2CEXT - desc: external capacitor connection 2 - - num: 7 - sym: 2REXT/CEXT - desc: external resistor and capacitor connection 2 - - num: 8 - sym: GND + '1~A': + desc: 'negative-edge triggered input 1' + 1B: + desc: 'positive-edge triggered input 1' + '1~R~D': + desc: 'direct reset (active low) and positive-edge triggered input 1' + '1~Q': + desc: 'active low output 1' + 2Q: + desc: 'active high output 2' + 2CEXT: + desc: 'external capacitor connection 2' + 2REXT/CEXT: + desc: 'external resistor and capacitor connection 2' + GND: desc: ground - - num: 9 - sym: 2~A - desc: negative-edge triggered input 2 - - num: 10 - sym: 2B - desc: positive-edge triggered input 2 - - num: 11 - sym: 2~R~D - desc: direct reset (active low) and positive-edge triggered input 2 - - num: 12 - sym: 2~Q - desc: active low output 2 - - num: 13 - sym: 1Q - desc: active high output 1 - - num: 14 - sym: 1CEXT - desc: external capacitor connection 1 - - num: 15 - sym: 1REXT/CEXT - desc: external resistor and capacitor connection 1 - - num: 16 - sym: Vcc - desc: supply voltage + '2~A': + desc: 'negative-edge triggered input 2' + 2B: + desc: 'positive-edge triggered input 2' + '2~R~D': + desc: 'direct reset (active low) and positive-edge triggered input 2' + '2~Q': + desc: 'active low output 2' + 1Q: + desc: 'active high output 1' + 1CEXT: + desc: 'external capacitor connection 1' + 1REXT/CEXT: + desc: 'external resistor and capacitor connection 1' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, n~R~D, n~A, nB to nQ or n~Q - val: [26 (74HC/HCT)] - unit: ns - - param: Propagation delay, n~R~D to nQ or n~Q - val: [20 (74HC), 23 (74HCT)] - unit: ns - - param: Output transition time - val: [7 (74HC/HCT)] - unit: ns - - param: Retrigger time n~A, nB - val: [110 (74HC/HCT)] - unit: ns - - param: External timing resistor - val: [2 (min), 1000 (max)] - unit: kΩ -... + - + param: 'Propagation delay, n~R~D, n~A, nB to nQ or n~Q' + val: + - '26 (74HC/HCT)' + unit: ns + - + param: 'Propagation delay, n~R~D to nQ or n~Q' + val: + - '20 (74HC)' + - '23 (74HCT)' + unit: ns + - + param: 'Output transition time' + val: + - '7 (74HC/HCT)' + unit: ns + - + param: 'Retrigger time n~A, nB' + val: + - '110 (74HC/HCT)' + unit: ns + - + param: 'External timing resistor' + val: + - '2 (min)' + - '1000 (max)' + unit: 'kΩ' +packages: + DIP: + - '1~A' + - 1B + - '1~R~D' + - '1~Q' + - 2Q + - 2CEXT + - 2REXT/CEXT + - GND + - '2~A' + - 2B + - '2~R~D' + - '2~Q' + - 1Q + - 1CEXT + - 1REXT/CEXT + - Vcc diff --git a/74125.yaml b/74125.yaml index d957e3a..0155096 100644 --- a/74125.yaml +++ b/74125.yaml @@ -1,54 +1,55 @@ ---- -description: Quad buffer/line driver with active low output enable; 3-state -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc125.74hct125.pdf" +description: 'Quad buffer/line driver with active low output enable; 3-state' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc125.74hct125.pdf' pins: - - num: 1 - sym: 1~OE - desc: output enable (active low) - - num: 2 - sym: 1A - desc: data input - - num: 3 - sym: 1Y - desc: data output - - num: 4 - sym: 2~OE - desc: output enable (active low) - - num: 5 - sym: 2A - desc: data input - - num: 6 - sym: 2Y - desc: data output - - num: 7 - sym: GND + '1~OE': + desc: 'output enable (active low)' + 1A: + desc: 'data input' + 1Y: + desc: 'data output' + '2~OE': + desc: 'output enable (active low)' + 2A: + desc: 'data input' + 2Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 3Y - desc: data output - - num: 9 - sym: 3A - desc: data input - - num: 10 - sym: 3~OE - desc: output enable (active low) - - num: 11 - sym: 4Y - desc: data output - - num: 12 - sym: 4A - desc: data input - - num: 13 - sym: 4~OE - desc: output enable (active low) - - num: 14 - sym: Vcc - desc: supply voltage + 3Y: + desc: 'data output' + 3A: + desc: 'data input' + '3~OE': + desc: 'output enable (active low)' + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + '4~OE': + desc: 'output enable (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA to nY - val: [9 (74HC), 12 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, nA to nY' + val: + - '9 (74HC)' + - '12 (74HCT)' + unit: ns +packages: + DIP: + - '1~OE' + - 1A + - 1Y + - '2~OE' + - 2A + - 2Y + - GND + - 3Y + - 3A + - '3~OE' + - 4Y + - 4A + - '4~OE' + - Vcc diff --git a/74126.yaml b/74126.yaml index c8d2e73..7a0733d 100644 --- a/74126.yaml +++ b/74126.yaml @@ -1,54 +1,55 @@ ---- -description: Quad buffer/line driver with active high output enable; 3-state -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc126.74hct126.pdf" +description: 'Quad buffer/line driver with active high output enable; 3-state' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc126.74hct126.pdf' pins: - - num: 1 - sym: 1OE - desc: output enable (active high) - - num: 2 - sym: 1A - desc: data input - - num: 3 - sym: 1Y - desc: data output - - num: 4 - sym: 2OE - desc: output enable (active high) - - num: 5 - sym: 2A - desc: data input - - num: 6 - sym: 2Y - desc: data output - - num: 7 - sym: GND + 1OE: + desc: 'output enable (active high)' + 1A: + desc: 'data input' + 1Y: + desc: 'data output' + 2OE: + desc: 'output enable (active high)' + 2A: + desc: 'data input' + 2Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 3Y - desc: data output - - num: 9 - sym: 3A - desc: data input - - num: 10 - sym: 3OE - desc: output enable (active high) - - num: 11 - sym: 4Y - desc: data output - - num: 12 - sym: 4A - desc: data input - - num: 13 - sym: 4OE - desc: output enable (active high) - - num: 14 - sym: Vcc - desc: supply voltage + 3Y: + desc: 'data output' + 3A: + desc: 'data input' + 3OE: + desc: 'output enable (active high)' + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 4OE: + desc: 'output enable (active high)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA to nY - val: [9 (74HC), 11 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, nA to nY' + val: + - '9 (74HC)' + - '11 (74HCT)' + unit: ns +packages: + DIP: + - 1OE + - 1A + - 1Y + - 2OE + - 2A + - 2Y + - GND + - 3Y + - 3A + - 3OE + - 4Y + - 4A + - 4OE + - Vcc diff --git a/74132.yaml b/74132.yaml index e3d0627..aba5215 100644 --- a/74132.yaml +++ b/74132.yaml @@ -1,54 +1,55 @@ ---- -description: Quad 2-input NAND Schmitt trigger -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc132.74hct132.pdf" +description: 'Quad 2-input NAND Schmitt trigger' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc132.74hct132.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: 1Y - desc: data output - - num: 4 - sym: 2A - desc: data input - - num: 5 - sym: 2B - desc: data input - - num: 6 - sym: 2Y - desc: data output - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1Y: + desc: 'data output' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 2Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 3Y - desc: data output - - num: 9 - sym: 3A - desc: data input - - num: 10 - sym: 3B - desc: data input - - num: 11 - sym: 4Y - desc: data output - - num: 12 - sym: 4A - desc: data input - - num: 13 - sym: 4B - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage + 3Y: + desc: 'data output' + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 4B: + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA, nB to nY - val: [10 (74HC), 17 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, nA, nB to nY' + val: + - '10 (74HC)' + - '17 (74HCT)' + unit: ns +packages: + DIP: + - 1A + - 1B + - 1Y + - 2A + - 2B + - 2Y + - GND + - 3Y + - 3A + - 3B + - 4Y + - 4A + - 4B + - Vcc diff --git a/74137.yaml b/74137.yaml index 516c12d..76e661d 100644 --- a/74137.yaml +++ b/74137.yaml @@ -1,70 +1,71 @@ ---- -description: 3-to-8 line decoder/demultiplexer with address latches; inverting -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc137.pdf" +description: '3-to-8 line decoder/demultiplexer with address latches; inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc137.pdf' pins: - - num: 1 - sym: A0 - desc: data input 0 - - num: 2 - sym: A1 - desc: data input 1 - - num: 3 - sym: A2 - desc: data input 2 - - num: 4 - sym: ~LE - desc: latch enable input (active low) - - num: 5 - sym: ~E~1 - desc: data enable input 1 (active low) - - num: 6 - sym: E2 - desc: data enable input 2 (active high) - - num: 7 - sym: ~Y~7 - desc: output 7 - - num: 8 - sym: GND + A0: + desc: 'data input 0' + A1: + desc: 'data input 1' + A2: + desc: 'data input 2' + '~LE': + desc: 'latch enable input (active low)' + '~E~1': + desc: 'data enable input 1 (active low)' + E2: + desc: 'data enable input 2 (active high)' + '~Y~7': + desc: 'output 7' + GND: desc: ground - - num: 9 - sym: ~Y~6 - desc: output 6 - - num: 10 - sym: ~Y~5 - desc: output 5 - - num: 11 - sym: ~Y~4 - desc: output 4 - - num: 12 - sym: ~Y~3 - desc: output 3 - - num: 13 - sym: ~Y~2 - desc: output 2 - - num: 14 - sym: ~Y~1 - desc: output 1 - - num: 15 - sym: ~Y~0 - desc: output 0 - - num: 16 - sym: Vcc - desc: supply voltage + '~Y~6': + desc: 'output 6' + '~Y~5': + desc: 'output 5' + '~Y~4': + desc: 'output 4' + '~Y~3': + desc: 'output 3' + '~Y~2': + desc: 'output 2' + '~Y~1': + desc: 'output 1' + '~Y~0': + desc: 'output 0' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, An to ~Y~n - val: 18 (74HC) + - + param: 'Propagation delay, An to ~Y~n' + val: '18 (74HC)' unit: ns - - param: Propagation delay, ~LE to ~Y~n - val: 17 (74HC) + - + param: 'Propagation delay, ~LE to ~Y~n' + val: '17 (74HC)' unit: ns - - param: Propagation delay, ~E~1 to ~Y~n - val: 15 (74HC) + - + param: 'Propagation delay, ~E~1 to ~Y~n' + val: '15 (74HC)' unit: ns - - param: Propagation delay, E2 to ~Y~n - val: 15 (74HC) + - + param: 'Propagation delay, E2 to ~Y~n' + val: '15 (74HC)' unit: ns - -... +packages: + DIP: + - A0 + - A1 + - A2 + - '~LE' + - '~E~1' + - E2 + - '~Y~7' + - GND + - '~Y~6' + - '~Y~5' + - '~Y~4' + - '~Y~3' + - '~Y~2' + - '~Y~1' + - '~Y~0' + - Vcc diff --git a/74138.yaml b/74138.yaml index eda58ba..e3a4766 100644 --- a/74138.yaml +++ b/74138.yaml @@ -1,66 +1,73 @@ ---- -description: 3-to-8 line decoder/demultiplexer; inverting -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc138.74hct138.pdf" +description: '3-to-8 line decoder/demultiplexer; inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc138.74hct138.pdf' pins: - - num: 1 - sym: A0 - desc: data input 0 - - num: 2 - sym: A1 - desc: data input 1 - - num: 3 - sym: A2 - desc: data input 2 - - num: 4 - sym: ~E~1 - desc: enable input 1 (active low) - - num: 5 - sym: ~E~2 - desc: enable input 2 (active low) - - num: 6 - sym: E3 - desc: enable input 3 (active high) - - num: 7 - sym: ~Y~7 - desc: output 7 - - num: 8 - sym: GND + A0: + desc: 'data input 0' + A1: + desc: 'data input 1' + A2: + desc: 'data input 2' + '~E~1': + desc: 'enable input 1 (active low)' + '~E~2': + desc: 'enable input 2 (active low)' + E3: + desc: 'enable input 3 (active high)' + '~Y~7': + desc: 'output 7' + GND: desc: ground - - num: 9 - sym: ~Y~6 - desc: output 6 - - num: 10 - sym: ~Y~5 - desc: output 5 - - num: 11 - sym: ~Y~4 - desc: output 4 - - num: 12 - sym: ~Y~3 - desc: output 3 - - num: 13 - sym: ~Y~2 - desc: output 2 - - num: 14 - sym: ~Y~1 - desc: output 1 - - num: 15 - sym: ~Y~0 - desc: output 0 - - num: 16 - sym: Vcc - desc: supply voltage + '~Y~6': + desc: 'output 6' + '~Y~5': + desc: 'output 5' + '~Y~4': + desc: 'output 4' + '~Y~3': + desc: 'output 3' + '~Y~2': + desc: 'output 2' + '~Y~1': + desc: 'output 1' + '~Y~0': + desc: 'output 0' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, An to ~Y~n - val: [12 (74HC), 17 (74HCT)] + - + param: 'Propagation delay, An to ~Y~n' + val: + - '12 (74HC)' + - '17 (74HCT)' unit: ns - - param: Propagation delay, E3 to ~Y~n - val: [14 (74HC), 19 (74HCT)] + - + param: 'Propagation delay, E3 to ~Y~n' + val: + - '14 (74HC)' + - '19 (74HCT)' unit: ns - - param: Propagation delay, ~E~n to ~Y~n - val: [14 (74HC), 19 (74HCT)] + - + param: 'Propagation delay, ~E~n to ~Y~n' + val: + - '14 (74HC)' + - '19 (74HCT)' unit: ns -... +packages: + DIP: + - A0 + - A1 + - A2 + - '~E~1' + - '~E~2' + - E3 + - '~Y~7' + - GND + - '~Y~6' + - '~Y~5' + - '~Y~4' + - '~Y~3' + - '~Y~2' + - '~Y~1' + - '~Y~0' + - Vcc diff --git a/74139.yaml b/74139.yaml index 08b33a2..1965da5 100644 --- a/74139.yaml +++ b/74139.yaml @@ -1,63 +1,67 @@ ---- -description: Dual 2-to-4 line decoder/demultiplexer -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc139.74hct139.pdf" +description: 'Dual 2-to-4 line decoder/demultiplexer' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc139.74hct139.pdf' pins: - - num: 1 - sym: 1~E - desc: enable input (active low) - - num: 2 - sym: 1A__0 - desc: address input - - num: 3 - sym: 1A__1 - desc: address input - - num: 4 - sym: 1~Y~__0 - desc: output (active low) - - num: 5 - sym: 1~Y~__1 - desc: output (active low) - - num: 6 - sym: 1~Y~__2 - desc: output (active low) - - num: 7 - sym: 1~Y~__3 - desc: output (active low) - - num: 8 - sym: GND + '1~E': + desc: 'enable input (active low)' + '1A__0': + desc: 'address input' + '1A__1': + desc: 'address input' + '1~Y~__0': + desc: 'output (active low)' + '1~Y~__1': + desc: 'output (active low)' + '1~Y~__2': + desc: 'output (active low)' + '1~Y~__3': + desc: 'output (active low)' + GND: desc: ground - - num: 9 - sym: 2~Y~__3 - desc: output (active low) - - num: 10 - sym: 2~Y~__2 - desc: output (active low) - - num: 11 - sym: 2~Y~__1 - desc: output (active low) - - num: 12 - sym: 2~Y~__0 - desc: output (active low) - - num: 13 - sym: 2A__1 - desc: address input - - num: 14 - sym: 2A__0 - desc: address input - - num: 15 - sym: 2~E - desc: enable input (active low) - - num: 16 - sym: Vcc - desc: supply voltage + '2~Y~__3': + desc: 'output (active low)' + '2~Y~__2': + desc: 'output (active low)' + '2~Y~__1': + desc: 'output (active low)' + '2~Y~__0': + desc: 'output (active low)' + '2A__1': + desc: 'address input' + '2A__0': + desc: 'address input' + '2~E': + desc: 'enable input (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA__n to n~Y~__n - val: [11 (74HC), 13 (74HCT)] + - + param: 'Propagation delay, nA__n to n~Y~__n' + val: + - '11 (74HC)' + - '13 (74HCT)' unit: ns - - param: Propagation delay, n~E to n~Y~__n - val: [10 (74HC), 13 (74HCT)] + - + param: 'Propagation delay, n~E to n~Y~__n' + val: + - '10 (74HC)' + - '13 (74HCT)' unit: ns -... +packages: + DIP: + - '1~E' + - '1A__0' + - '1A__1' + - '1~Y~__0' + - '1~Y~__1' + - '1~Y~__2' + - '1~Y~__3' + - GND + - '2~Y~__3' + - '2~Y~__2' + - '2~Y~__1' + - '2~Y~__0' + - '2A__1' + - '2A__0' + - '2~E' + - Vcc diff --git a/7414.yaml b/7414.yaml index a1b152d..da41e7a 100644 --- a/7414.yaml +++ b/7414.yaml @@ -1,63 +1,73 @@ ---- -description: Hex inverting Schmitt trigger -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.nxp.com/acrobat_download/datasheets/74HC_HCT14_3.pdf" +description: 'Hex inverting Schmitt trigger' +family: '7400' +datasheet: 'http://www.nxp.com/acrobat_download/datasheets/74HC_HCT14_3.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1Y - desc: data output - - num: 3 - sym: 2A - desc: data input - - num: 4 - sym: 2Y - desc: data output - - num: 5 - sym: 3A - desc: data input - - num: 6 - sym: 3Y - desc: data output - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1Y: + desc: 'data output' + 2A: + desc: 'data input' + 2Y: + desc: 'data output' + 3A: + desc: 'data input' + 3Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 4Y - desc: data output - - num: 9 - sym: 4A - desc: data input - - num: 10 - sym: 5Y - desc: data output - - num: 11 - sym: 5A - desc: data input - - num: 12 - sym: 6Y - desc: data output - - num: 13 - sym: 6A - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 5Y: + desc: 'data output' + 5A: + desc: 'data input' + 6Y: + desc: 'data output' + 6A: + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA to nY - val: [12 (74HC), 17 (74HCT)] - unit: ns - - param: Positive-going threshold (Vcc = 4.5V) - val: [2.38 (74HC), 1.41 (74HCT)] - unit: V - - param: Negative-going threshold (Vcc = 4.5V) - val: [1.4 (74HC), 0.85 (74HCT)] - unit: V - - param: Hysteresis - val: [0.98 (74HC), 0.56 (74HCT)] - unit: V -... + - + param: 'Propagation delay, nA to nY' + val: + - '12 (74HC)' + - '17 (74HCT)' + unit: ns + - + param: 'Positive-going threshold (Vcc = 4.5V)' + val: + - '2.38 (74HC)' + - '1.41 (74HCT)' + unit: V + - + param: 'Negative-going threshold (Vcc = 4.5V)' + val: + - '1.4 (74HC)' + - '0.85 (74HCT)' + unit: V + - + param: Hysteresis + val: + - '0.98 (74HC)' + - '0.56 (74HCT)' + unit: V +packages: + DIP: + - 1A + - 1Y + - 2A + - 2Y + - 3A + - 3Y + - GND + - 4Y + - 4A + - 5Y + - 5A + - 6Y + - 6A + - Vcc diff --git a/74141.yaml b/74141.yaml index 0740fbb..99b198d 100644 --- a/74141.yaml +++ b/74141.yaml @@ -1,61 +1,59 @@ ---- -description: BCD-to-decimal decoder/Nixie tube driver +description: 'BCD-to-decimal decoder/Nixie tube driver' aliases: - - "7441" + - '7441' - K155ID1 -package: DIP -pincount: 16 -family: "7400" -datasheet: http://pdf1.alldatasheet.com/datasheet-pdf/view/115763/TI/SN74141/datasheet.pdf +family: '7400' +datasheet: 'http://pdf1.alldatasheet.com/datasheet-pdf/view/115763/TI/SN74141/datasheet.pdf' pins: - - num: 1 - sym: "8" - desc: output 8 - - num: 2 - sym: "9" - desc: output 9 - - num: 3 - sym: A - desc: BCD input - - num: 4 - sym: D - desc: BCD input - - num: 5 - sym: Vcc - desc: supply voltage - - num: 6 - sym: B - desc: BCD input - - num: 7 - sym: C - desc: BCD input - - num: 8 - sym: "2" - desc: output 2 - - num: 9 - sym: "3" - desc: output 3 - - num: 10 - sym: "7" - desc: output 7 - - num: 11 - sym: "6" - desc: output 6 - - num: 12 - sym: GND + 8: + desc: 'output 8' + 9: + desc: 'output 9' + A: + desc: 'BCD input' + D: + desc: 'BCD input' + Vcc: + desc: 'supply voltage' + B: + desc: 'BCD input' + C: + desc: 'BCD input' + 2: + desc: 'output 2' + 3: + desc: 'output 3' + 7: + desc: 'output 7' + 6: + desc: 'output 6' + GND: desc: ground - - num: 13 - sym: "4" - desc: output 4 - - num: 14 - sym: "5" - desc: output 5 - - num: 15 - sym: "1" - desc: output 1 - - num: 16 - sym: "0" - desc: output 0 + 4: + desc: 'output 4' + 5: + desc: 'output 5' + 1: + desc: 'output 1' + 0: + desc: 'output 0' notes: - - For binary inputs 10 through 15, behavior is manufacturer-specific. 7441s may enable one or more output. 74141s and K155ID1s will turn all outputs off, but the connected tube may not blank. -... + - 'For binary inputs 10 through 15, behavior is manufacturer-specific. 7441s may enable one or more output. 74141s and K155ID1s will turn all outputs off, but the connected tube may not blank.' +packages: + DIP: + - '8' + - '9' + - A + - D + - Vcc + - B + - C + - '2' + - '3' + - '7' + - '6' + - GND + - '4' + - '5' + - '1' + - '0' diff --git a/74147.yaml b/74147.yaml index 8c5b27e..d388a4d 100644 --- a/74147.yaml +++ b/74147.yaml @@ -1,64 +1,63 @@ ---- -description: 10-to-4 line priority encoder -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc147.74hct147.pdf" +description: '10-to-4 line priority encoder' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc147.74hct147.pdf' pins: - - num: 1 - sym: ~A~__3 - desc: decimal data input (active low) - - num: 2 - sym: ~A~__4 - desc: decimal data input (active low) - - num: 3 - sym: ~A~__5 - desc: decimal data input (active low) - - num: 4 - sym: ~A~__6 - desc: decimal data input (active low) - - num: 5 - sym: ~A~__7 - desc: decimal data input (active low) - - num: 6 - sym: ~Y~__2 - desc: BCD address output (active low) - - num: 7 - sym: ~Y~__1 - desc: BCD address output (active low) - - num: 8 - sym: GND + '~A~__3': + desc: 'decimal data input (active low)' + '~A~__4': + desc: 'decimal data input (active low)' + '~A~__5': + desc: 'decimal data input (active low)' + '~A~__6': + desc: 'decimal data input (active low)' + '~A~__7': + desc: 'decimal data input (active low)' + '~Y~__2': + desc: 'BCD address output (active low)' + '~Y~__1': + desc: 'BCD address output (active low)' + GND: desc: ground - - num: 9 - sym: ~Y~__0 - desc: BCD address output (active low) - - num: 10 - sym: ~A~__8 - desc: decimal data input (active low) - - num: 11 - sym: ~A~__0 - desc: decimal data input (active low) - - num: 12 - sym: ~A~__1 - desc: decimal data input (active low) - - num: 13 - sym: ~A~__2 - desc: decimal data input (active low) - - num: 14 - sym: ~Y~__3 - desc: BCD address output (active low) - - num: 15 - sym: NC - desc: no connection - - num: 16 - sym: Vcc - desc: supply voltage + '~Y~__0': + desc: 'BCD address output (active low)' + '~A~__8': + desc: 'decimal data input (active low)' + '~A~__0': + desc: 'decimal data input (active low)' + '~A~__1': + desc: 'decimal data input (active low)' + '~A~__2': + desc: 'decimal data input (active low)' + '~Y~__3': + desc: 'BCD address output (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, ~A~__n to ~Y~__n - val: [15 (74HC), 17 (74HCT)] - unit: ns + - + param: 'Propagation delay, ~A~__n to ~Y~__n' + val: + - '15 (74HC)' + - '17 (74HCT)' + unit: ns notes: - - When two or more inputs are simultaneously active, the input with the highest priority is represented on the output. - - ~A~__8 has the highest priority. - - When all nine data inputs are high, all four outputs are high. (BCD zero) -... + - 'When two or more inputs are simultaneously active, the input with the highest priority is represented on the output.' + - '~A~__8 has the highest priority.' + - 'When all nine data inputs are high, all four outputs are high. (BCD zero)' +packages: + DIP: + - '~A~__3' + - '~A~__4' + - '~A~__5' + - '~A~__6' + - '~A~__7' + - '~Y~__2' + - '~Y~__1' + - GND + - '~Y~__0' + - '~A~__8' + - '~A~__0' + - '~A~__1' + - '~A~__2' + - '~Y~__3' + - NC + - Vcc diff --git a/74148.yaml b/74148.yaml index 99da8e1..e64f43a 100644 --- a/74148.yaml +++ b/74148.yaml @@ -1,65 +1,65 @@ ---- -description: 8-to-3 line priority encoder -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.ti.com/lit/ds/scls109g/scls109g.pdf" +description: '8-to-3 line priority encoder' +family: '7400' +datasheet: 'http://www.ti.com/lit/ds/scls109g/scls109g.pdf' pins: - - num: 1 - sym: 4 - desc: decimal data input (active low) - - num: 2 - sym: 5 - desc: decimal data input (active low) - - num: 3 - sym: 6 - desc: decimal data input (active low) - - num: 4 - sym: 7 - desc: decimal data input (active low) - - num: 5 - sym: EI - desc: enable input (active low) - - num: 6 - sym: A2 - desc: binary address output (active low) - - num: 7 - sym: A1 - desc: BCD address output (active low) - - num: 8 - sym: GND + 4: + desc: 'decimal data input (active low)' + 5: + desc: 'decimal data input (active low)' + 6: + desc: 'decimal data input (active low)' + 7: + desc: 'decimal data input (active low)' + EI: + desc: 'enable input (active low)' + A2: + desc: 'binary address output (active low)' + A1: + desc: 'BCD address output (active low)' + GND: desc: ground - - num: 9 - sym: A0 - desc: binary address output (active low) - - num: 10 - sym: 0 - desc: decimal data input (active low) - - num: 11 - sym: 1 - desc: decimal data input (active low) - - num: 12 - sym: 2 - desc: decimal data input (active low) - - num: 13 - sym: 3 - desc: decimal data input (active low) - - num: 14 - sym: GS - desc: goes low when EI is low and any input is low - - num: 15 - sym: EO - desc: goes high when EI is low and any input is low (EO = ~GS~) - - num: 16 - sym: Vcc - desc: supply voltage + A0: + desc: 'binary address output (active low)' + 0: + desc: 'decimal data input (active low)' + 1: + desc: 'decimal data input (active low)' + 2: + desc: 'decimal data input (active low)' + 3: + desc: 'decimal data input (active low)' + GS: + desc: 'goes low when EI is low and any input is low' + EO: + desc: 'goes high when EI is low and any input is low (EO = ~GS~)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, n to An - val: [16 (74HC)] - unit: ns + - + param: 'Propagation delay, n to An' + val: + - '16 (74HC)' + unit: ns notes: - - When two or more inputs are simultaneously active, the input with the highest priority is represented on the output. - - Input 7 has the highest priority. - - When all eight data inputs are high, all three outputs are high. - - Multiple 74148s can be cascaded by connecting EO of the high priority chip to EI of the low priority chip (see datasheet). -... + - 'When two or more inputs are simultaneously active, the input with the highest priority is represented on the output.' + - 'Input 7 has the highest priority.' + - 'When all eight data inputs are high, all three outputs are high.' + - 'Multiple 74148s can be cascaded by connecting EO of the high priority chip to EI of the low priority chip (see datasheet).' +packages: + DIP: + - '4' + - '5' + - '6' + - '7' + - EI + - A2 + - A1 + - GND + - A0 + - '0' + - '1' + - '2' + - '3' + - GS + - EO + - Vcc diff --git a/74151.yaml b/74151.yaml index cc16777..492043c 100644 --- a/74151.yaml +++ b/74151.yaml @@ -1,69 +1,79 @@ ---- -description: 8-input multiplexer -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc151.74hct151.pdf" +description: '8-input multiplexer' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc151.74hct151.pdf' pins: - - num: 1 - sym: I__3 - desc: multiplexer input - - num: 2 - sym: I__2 - desc: multiplexer input - - num: 3 - sym: I__1 - desc: multiplexer input - - num: 4 - sym: I__0 - desc: multiplexer input - - num: 5 - sym: Y - desc: multiplexer output - - num: 6 - sym: ~Y - desc: complementary multiplexer output - - num: 7 - sym: ~E - desc: enable input (active low) - - num: 8 - sym: GND + 'I__3': + desc: 'multiplexer input' + 'I__2': + desc: 'multiplexer input' + 'I__1': + desc: 'multiplexer input' + 'I__0': + desc: 'multiplexer input' + 'Y': + desc: 'multiplexer output' + '~Y': + desc: 'complementary multiplexer output' + '~E': + desc: 'enable input (active low)' + GND: desc: ground - - num: 9 - sym: S__2 - desc: select input - - num: 10 - sym: S__1 - desc: select input - - num: 11 - sym: S__0 - desc: select input - - num: 12 - sym: I__7 - desc: multiplexer input - - num: 13 - sym: I__6 - desc: multiplexer input - - num: 14 - sym: I__5 - desc: multiplexer input - - num: 15 - sym: I__4 - desc: multiplexer input - - num: 16 - sym: Vcc - desc: supply voltage + 'S__2': + desc: 'select input' + 'S__1': + desc: 'select input' + 'S__0': + desc: 'select input' + 'I__7': + desc: 'multiplexer input' + 'I__6': + desc: 'multiplexer input' + 'I__5': + desc: 'multiplexer input' + 'I__4': + desc: 'multiplexer input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, I__n to Y, ~Y - val: [17 (74HC), 19 (74HCT)] - unit: ns - - param: Propagation delay, S__n to Y, ~Y - val: [19 (74HC), 20 (74HCT)] - unit: ns - - param: Propagation delay, ~E to Y - val: [12 (74HC), 13 (74HCT)] - unit: ns - - param: Propagation delay, ~E to ~Y - val: [14 (74HC), 18 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, I__n to Y, ~Y' + val: + - '17 (74HC)' + - '19 (74HCT)' + unit: ns + - + param: 'Propagation delay, S__n to Y, ~Y' + val: + - '19 (74HC)' + - '20 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~E to Y' + val: + - '12 (74HC)' + - '13 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~E to ~Y' + val: + - '14 (74HC)' + - '18 (74HCT)' + unit: ns +packages: + DIP: + - 'I__3' + - 'I__2' + - 'I__1' + - 'I__0' + - 'Y' + - '~Y' + - '~E' + - GND + - 'S__2' + - 'S__1' + - 'S__0' + - 'I__7' + - 'I__6' + - 'I__5' + - 'I__4' + - Vcc diff --git a/74153.yaml b/74153.yaml index 4ef1333..448d595 100644 --- a/74153.yaml +++ b/74153.yaml @@ -1,66 +1,73 @@ ---- -description: Dual 4-input multiplexer -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc153.74hct153.pdf" +description: 'Dual 4-input multiplexer' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc153.74hct153.pdf' pins: - - num: 1 - sym: 1~E - desc: enable input 1 - - num: 2 - sym: S__1 - desc: common data select input - - num: 3 - sym: 1I__3 - desc: data input from source 1 - - num: 4 - sym: 1I__2 - desc: data input from source 1 - - num: 5 - sym: 1I__1 - desc: data input from source 1 - - num: 6 - sym: 1I__0 - desc: data input from source 1 - - num: 7 - sym: 1Y - desc: multiplexer output from source 1 - - num: 8 - sym: GND + '1~E': + desc: 'enable input 1' + 'S__1': + desc: 'common data select input' + '1I__3': + desc: 'data input from source 1' + '1I__2': + desc: 'data input from source 1' + '1I__1': + desc: 'data input from source 1' + '1I__0': + desc: 'data input from source 1' + 1Y: + desc: 'multiplexer output from source 1' + GND: desc: ground - - num: 9 - sym: 2Y - desc: multiplexer output from source 2 - - num: 10 - sym: 2I__0 - desc: data input from source 2 - - num: 11 - sym: 2I__1 - desc: data input from source 2 - - num: 12 - sym: 2I__2 - desc: data input from source 2 - - num: 13 - sym: 2I__3 - desc: data input from source 2 - - num: 14 - sym: S__0 - desc: common data select input - - num: 15 - sym: 2~E - desc: enable input 2 - - num: 16 - sym: Vcc - desc: supply voltage + 2Y: + desc: 'multiplexer output from source 2' + '2I__0': + desc: 'data input from source 2' + '2I__1': + desc: 'data input from source 2' + '2I__2': + desc: 'data input from source 2' + '2I__3': + desc: 'data input from source 2' + 'S__0': + desc: 'common data select input' + '2~E': + desc: 'enable input 2' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, 1I__n, 2I__n to nY - val: [14 (74HC), 16 (74HCT)] - unit: ns - - param: Propagation delay, S__n to nY - val: [15 (74HC), 17 (74HCT)] - unit: ns - - param: Propagation delay, n~E to nY - val: [10 (74HC), 11 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, 1I__n, 2I__n to nY' + val: + - '14 (74HC)' + - '16 (74HCT)' + unit: ns + - + param: 'Propagation delay, S__n to nY' + val: + - '15 (74HC)' + - '17 (74HCT)' + unit: ns + - + param: 'Propagation delay, n~E to nY' + val: + - '10 (74HC)' + - '11 (74HCT)' + unit: ns +packages: + DIP: + - '1~E' + - 'S__1' + - '1I__3' + - '1I__2' + - '1I__1' + - '1I__0' + - 1Y + - GND + - 2Y + - '2I__0' + - '2I__1' + - '2I__2' + - '2I__3' + - 'S__0' + - '2~E' + - Vcc diff --git a/74154.yaml b/74154.yaml index 41b711b..28e8eea 100644 --- a/74154.yaml +++ b/74154.yaml @@ -1,87 +1,91 @@ ---- -description: 4-to-16 line decoder/demultiplexer -package: DIP -pincount: 24 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc154.74hct154.pdf" +description: '4-to-16 line decoder/demultiplexer' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc154.74hct154.pdf' pins: - - num: 1 - sym: ~Y~0 - desc: data output (active low) - - num: 2 - sym: ~Y~1 - desc: data output (active low) - - num: 3 - sym: ~Y~2 - desc: data output (active low) - - num: 4 - sym: ~Y~3 - desc: data output (active low) - - num: 5 - sym: ~Y~4 - desc: data output (active low) - - num: 6 - sym: ~Y~5 - desc: data output (active low) - - num: 7 - sym: ~Y~6 - desc: data output (active low) - - num: 8 - sym: ~Y~7 - desc: data output (active low) - - num: 9 - sym: ~Y~8 - desc: data output (active low) - - num: 10 - sym: ~Y~9 - desc: data output (active low) - - num: 11 - sym: ~Y~10 - desc: data output (active low) - - num: 12 - sym: GND + '~Y~0': + desc: 'data output (active low)' + '~Y~1': + desc: 'data output (active low)' + '~Y~2': + desc: 'data output (active low)' + '~Y~3': + desc: 'data output (active low)' + '~Y~4': + desc: 'data output (active low)' + '~Y~5': + desc: 'data output (active low)' + '~Y~6': + desc: 'data output (active low)' + '~Y~7': + desc: 'data output (active low)' + '~Y~8': + desc: 'data output (active low)' + '~Y~9': + desc: 'data output (active low)' + '~Y~10': + desc: 'data output (active low)' + GND: desc: ground - - num: 13 - sym: ~Y~11 - desc: data output (active low) - - num: 14 - sym: ~Y~12 - desc: data output (active low) - - num: 15 - sym: ~Y~13 - desc: data output (active low) - - num: 16 - sym: ~Y~14 - desc: data output (active low) - - num: 17 - sym: ~Y~15 - desc: data output (active low) - - num: 18 - sym: ~E~0 - desc: enable input (active low) - - num: 19 - sym: ~E~1 - desc: enable input (active low) - - num: 20 - sym: A3 - desc: address input - - num: 21 - sym: A2 - desc: address input - - num: 22 - sym: A1 - desc: address input - - num: 23 - sym: A0 - desc: address input - - num: 24 - sym: Vcc - desc: supply voltage + '~Y~11': + desc: 'data output (active low)' + '~Y~12': + desc: 'data output (active low)' + '~Y~13': + desc: 'data output (active low)' + '~Y~14': + desc: 'data output (active low)' + '~Y~15': + desc: 'data output (active low)' + '~E~0': + desc: 'enable input (active low)' + '~E~1': + desc: 'enable input (active low)' + A3: + desc: 'address input' + A2: + desc: 'address input' + A1: + desc: 'address input' + A0: + desc: 'address input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, An to ~Y~n - val: [11 (74HC), 13 (74HCT)] - unit: ns - - param: Propagation delay, ~E~n to ~Y~n - val: [11 (74HC), 13 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, An to ~Y~n' + val: + - '11 (74HC)' + - '13 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~E~n to ~Y~n' + val: + - '11 (74HC)' + - '13 (74HCT)' + unit: ns +packages: + DIP: + - '~Y~0' + - '~Y~1' + - '~Y~2' + - '~Y~3' + - '~Y~4' + - '~Y~5' + - '~Y~6' + - '~Y~7' + - '~Y~8' + - '~Y~9' + - '~Y~10' + - GND + - '~Y~11' + - '~Y~12' + - '~Y~13' + - '~Y~14' + - '~Y~15' + - '~E~0' + - '~E~1' + - A3 + - A2 + - A1 + - A0 + - Vcc diff --git a/74157.yaml b/74157.yaml index ef726c0..d3e9d5a 100644 --- a/74157.yaml +++ b/74157.yaml @@ -1,66 +1,73 @@ ---- -description: Quad 2-input multiplexer -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc157.74hct157.pdf" +description: 'Quad 2-input multiplexer' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc157.74hct157.pdf' pins: - - num: 1 - sym: S - desc: common data select input - - num: 2 - sym: 1I__0 - desc: data input from source 0 - - num: 3 - sym: 1I__1 - desc: data input from source 1 - - num: 4 - sym: 1Y - desc: multiplexer output - - num: 5 - sym: 2I__0 - desc: data input from source 0 - - num: 6 - sym: 2I__1 - desc: data input from source 1 - - num: 7 - sym: 2Y - desc: multiplexer output - - num: 8 - sym: GND + S: + desc: 'common data select input' + '1I__0': + desc: 'data input from source 0' + '1I__1': + desc: 'data input from source 1' + 1Y: + desc: 'multiplexer output' + '2I__0': + desc: 'data input from source 0' + '2I__1': + desc: 'data input from source 1' + 2Y: + desc: 'multiplexer output' + GND: desc: ground - - num: 9 - sym: 3Y - desc: multiplexer output - - num: 10 - sym: 3I__1 - desc: data input from source 1 - - num: 11 - sym: 3I__0 - desc: data input from source 0 - - num: 12 - sym: 4Y - desc: multiplexer output - - num: 13 - sym: 4I__1 - desc: data input from source 1 - - num: 14 - sym: 4I__0 - desc: data input from source 0 - - num: 15 - sym: ~E - desc: enable input (active low) - - num: 16 - sym: Vcc - desc: supply voltage + 3Y: + desc: 'multiplexer output' + '3I__1': + desc: 'data input from source 1' + '3I__0': + desc: 'data input from source 0' + 4Y: + desc: 'multiplexer output' + '4I__1': + desc: 'data input from source 1' + '4I__0': + desc: 'data input from source 0' + '~E': + desc: 'enable input (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nI__0, nI__1 to nY - val: [11 (74HC), 13 (74HCT)] - unit: ns - - param: Propagation delay, ~E to nY - val: [11 (74HC), 12 (74HCT)] - unit: ns - - param: Propagation delay, S to nY - val: [12 (74HC), 19 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, nI__0, nI__1 to nY' + val: + - '11 (74HC)' + - '13 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~E to nY' + val: + - '11 (74HC)' + - '12 (74HCT)' + unit: ns + - + param: 'Propagation delay, S to nY' + val: + - '12 (74HC)' + - '19 (74HCT)' + unit: ns +packages: + DIP: + - S + - '1I__0' + - '1I__1' + - 1Y + - '2I__0' + - '2I__1' + - 2Y + - GND + - 3Y + - '3I__1' + - '3I__0' + - 4Y + - '4I__1' + - '4I__0' + - '~E' + - Vcc diff --git a/74158.yaml b/74158.yaml index 077ddbc..7d9f0bb 100644 --- a/74158.yaml +++ b/74158.yaml @@ -1,66 +1,67 @@ ---- -description: Quad 2-input multiplexer; inverting -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc158.pdf" +description: 'Quad 2-input multiplexer; inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc158.pdf' pins: - - num: 1 - sym: S - desc: common data select input - - num: 2 - sym: 1I__0 - desc: data input from source 0 - - num: 3 - sym: 1I__1 - desc: data input from source 1 - - num: 4 - sym: 1~Y - desc: multiplexer output - - num: 5 - sym: 2I__0 - desc: data input from source 0 - - num: 6 - sym: 2I__1 - desc: data input from source 1 - - num: 7 - sym: 2~Y - desc: multiplexer output - - num: 8 - sym: GND + S: + desc: 'common data select input' + '1I__0': + desc: 'data input from source 0' + '1I__1': + desc: 'data input from source 1' + '1~Y': + desc: 'multiplexer output' + '2I__0': + desc: 'data input from source 0' + '2I__1': + desc: 'data input from source 1' + '2~Y': + desc: 'multiplexer output' + GND: desc: ground - - num: 9 - sym: 3~Y - desc: multiplexer output - - num: 10 - sym: 3I__1 - desc: data input from source 1 - - num: 11 - sym: 3I__0 - desc: data input from source 0 - - num: 12 - sym: 4~Y - desc: multiplexer output - - num: 13 - sym: 4I__1 - desc: data input from source 1 - - num: 14 - sym: 4I__0 - desc: data input from source 0 - - num: 15 - sym: ~E - desc: enable input (active low) - - num: 16 - sym: Vcc - desc: supply voltage + '3~Y': + desc: 'multiplexer output' + '3I__1': + desc: 'data input from source 1' + '3I__0': + desc: 'data input from source 0' + '4~Y': + desc: 'multiplexer output' + '4I__1': + desc: 'data input from source 1' + '4I__0': + desc: 'data input from source 0' + '~E': + desc: 'enable input (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nI__0, nI__1 to n~Y - val: 12 (74HC) - unit: ns - - param: Propagation delay, ~E to n~Y - val: 14 (74HC) - unit: ns - - param: Propagation delay, S to n~Y - val: 14 (74HC) - unit: ns -... + - + param: 'Propagation delay, nI__0, nI__1 to n~Y' + val: '12 (74HC)' + unit: ns + - + param: 'Propagation delay, ~E to n~Y' + val: '14 (74HC)' + unit: ns + - + param: 'Propagation delay, S to n~Y' + val: '14 (74HC)' + unit: ns +packages: + DIP: + - S + - '1I__0' + - '1I__1' + - '1~Y' + - '2I__0' + - '2I__1' + - '2~Y' + - GND + - '3~Y' + - '3I__1' + - '3I__0' + - '4~Y' + - '4I__1' + - '4I__0' + - '~E' + - Vcc diff --git a/74160.yaml b/74160.yaml index 05189ef..53e5039 100644 --- a/74160.yaml +++ b/74160.yaml @@ -1,75 +1,91 @@ ---- -description: Presettable synchronous BCD decade counter; asynchronous reset -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc160.74hct160.pdf" +description: 'Presettable synchronous BCD decade counter; asynchronous reset' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc160.74hct160.pdf' pins: - - num: 1 - sym: ~MR - desc: asynchronous master reset (active low) - - num: 2 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 3 - sym: D__0 - desc: data input - - num: 4 - sym: D__1 - desc: data input - - num: 5 - sym: D__2 - desc: data input - - num: 6 - sym: D__3 - desc: data input - - num: 7 - sym: CEP - desc: count enable input - - num: 8 - sym: GND + '~MR': + desc: 'asynchronous master reset (active low)' + CP: + desc: 'clock input (low-to-high, edge-triggered)' + 'D__0': + desc: 'data input' + 'D__1': + desc: 'data input' + 'D__2': + desc: 'data input' + 'D__3': + desc: 'data input' + CEP: + desc: 'count enable input' + GND: desc: ground - - num: 9 - sym: ~PE - desc: parallel load enable input (active low) - - num: 10 - sym: CET - desc: count enable carry output - - num: 11 - sym: Q__3 - desc: counter output - - num: 12 - sym: Q__2 - desc: counter output - - num: 13 - sym: Q__1 - desc: counter output - - num: 14 - sym: Q__0 - desc: counter output - - num: 15 - sym: TC - desc: terminal count output - - num: 16 - sym: Vcc - desc: supply voltage + '~PE': + desc: 'parallel load enable input (active low)' + CET: + desc: 'count enable carry output' + 'Q__3': + desc: 'counter output' + 'Q__2': + desc: 'counter output' + 'Q__1': + desc: 'counter output' + 'Q__0': + desc: 'counter output' + TC: + desc: 'terminal count output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to Q__n - val: [19 (74HC), 21 (74HCT)] - unit: ns - - param: Propagation delay, CP to TC - val: [21 (74HC), 24 (74HCT)] - unit: ns - - param: Propagation delay, ~MR to Q__n - val: [21 (74HC), 23 (74HCT)] - unit: ns - - param: Propagation delay, ~MR to TC - val: [21 (74HC), 26 (74HCT)] - unit: ns - - param: Propagation delay, CET to TC - val: [14 (74HC), 14 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [61 (74HC), 31 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, CP to Q__n' + val: + - '19 (74HC)' + - '21 (74HCT)' + unit: ns + - + param: 'Propagation delay, CP to TC' + val: + - '21 (74HC)' + - '24 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~MR to Q__n' + val: + - '21 (74HC)' + - '23 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~MR to TC' + val: + - '21 (74HC)' + - '26 (74HCT)' + unit: ns + - + param: 'Propagation delay, CET to TC' + val: + - '14 (74HC)' + - '14 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '61 (74HC)' + - '31 (74HCT)' + unit: MHz +packages: + DIP: + - '~MR' + - CP + - 'D__0' + - 'D__1' + - 'D__2' + - 'D__3' + - CEP + - GND + - '~PE' + - CET + - 'Q__3' + - 'Q__2' + - 'Q__1' + - 'Q__0' + - TC + - Vcc diff --git a/74161.yaml b/74161.yaml index 892acab..60cf666 100644 --- a/74161.yaml +++ b/74161.yaml @@ -1,75 +1,91 @@ ---- -description: Presettable synchronous 4-bit binary counter; asynchronous reset -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc161.74hct161.pdf" +description: 'Presettable synchronous 4-bit binary counter; asynchronous reset' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc161.74hct161.pdf' pins: - - num: 1 - sym: ~MR - desc: asynchronous master reset (active low) - - num: 2 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 3 - sym: D__0 - desc: data input - - num: 4 - sym: D__1 - desc: data input - - num: 5 - sym: D__2 - desc: data input - - num: 6 - sym: D__3 - desc: data input - - num: 7 - sym: CEP - desc: count enable input - - num: 8 - sym: GND + '~MR': + desc: 'asynchronous master reset (active low)' + CP: + desc: 'clock input (low-to-high, edge-triggered)' + 'D__0': + desc: 'data input' + 'D__1': + desc: 'data input' + 'D__2': + desc: 'data input' + 'D__3': + desc: 'data input' + CEP: + desc: 'count enable input' + GND: desc: ground - - num: 9 - sym: ~PE - desc: parallel load enable input (active low) - - num: 10 - sym: CET - desc: count enable carry output - - num: 11 - sym: Q__3 - desc: counter output - - num: 12 - sym: Q__2 - desc: counter output - - num: 13 - sym: Q__1 - desc: counter output - - num: 14 - sym: Q__0 - desc: counter output - - num: 15 - sym: TC - desc: terminal count output - - num: 16 - sym: Vcc - desc: supply voltage + '~PE': + desc: 'parallel load enable input (active low)' + CET: + desc: 'count enable carry output' + 'Q__3': + desc: 'counter output' + 'Q__2': + desc: 'counter output' + 'Q__1': + desc: 'counter output' + 'Q__0': + desc: 'counter output' + TC: + desc: 'terminal count output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to Q__n - val: [19 (74HC), 20 (74HCT)] - unit: ns - - param: Propagation delay, CP to TC - val: [21 (74HC), 24 (74HCT)] - unit: ns - - param: Propagation delay, ~MR to Q__n - val: [20 (74HC), 25 (74HCT)] - unit: ns - - param: Propagation delay, ~MR to TC - val: [20 (74HC), 26 (74HCT)] - unit: ns - - param: Propagation delay, CET to TC - val: [10 (74HC), 14 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [44 (74HC), 45 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, CP to Q__n' + val: + - '19 (74HC)' + - '20 (74HCT)' + unit: ns + - + param: 'Propagation delay, CP to TC' + val: + - '21 (74HC)' + - '24 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~MR to Q__n' + val: + - '20 (74HC)' + - '25 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~MR to TC' + val: + - '20 (74HC)' + - '26 (74HCT)' + unit: ns + - + param: 'Propagation delay, CET to TC' + val: + - '10 (74HC)' + - '14 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '44 (74HC)' + - '45 (74HCT)' + unit: MHz +packages: + DIP: + - '~MR' + - CP + - 'D__0' + - 'D__1' + - 'D__2' + - 'D__3' + - CEP + - GND + - '~PE' + - CET + - 'Q__3' + - 'Q__2' + - 'Q__1' + - 'Q__0' + - TC + - Vcc diff --git a/74163.yaml b/74163.yaml index 885ebe9..54863e7 100644 --- a/74163.yaml +++ b/74163.yaml @@ -1,69 +1,79 @@ ---- -description: Presettable synchronous 4-bit binary counter; synchronous reset -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc163.74hct163.pdf" +description: 'Presettable synchronous 4-bit binary counter; synchronous reset' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc163.74hct163.pdf' pins: - - num: 1 - sym: ~MR - desc: synchronous master reset (active low) - - num: 2 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 3 - sym: D__0 - desc: data input - - num: 4 - sym: D__1 - desc: data input - - num: 5 - sym: D__2 - desc: data input - - num: 6 - sym: D__3 - desc: data input - - num: 7 - sym: CEP - desc: count enable input - - num: 8 - sym: GND + '~MR': + desc: 'synchronous master reset (active low)' + CP: + desc: 'clock input (low-to-high, edge-triggered)' + 'D__0': + desc: 'data input' + 'D__1': + desc: 'data input' + 'D__2': + desc: 'data input' + 'D__3': + desc: 'data input' + CEP: + desc: 'count enable input' + GND: desc: ground - - num: 9 - sym: ~PE - desc: parallel load enable input (active low) - - num: 10 - sym: CET - desc: count enable carry output - - num: 11 - sym: Q__3 - desc: counter output - - num: 12 - sym: Q__2 - desc: counter output - - num: 13 - sym: Q__1 - desc: counter output - - num: 14 - sym: Q__0 - desc: counter output - - num: 15 - sym: TC - desc: terminal count output - - num: 16 - sym: Vcc - desc: supply voltage + '~PE': + desc: 'parallel load enable input (active low)' + CET: + desc: 'count enable carry output' + 'Q__3': + desc: 'counter output' + 'Q__2': + desc: 'counter output' + 'Q__1': + desc: 'counter output' + 'Q__0': + desc: 'counter output' + TC: + desc: 'terminal count output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to Q__n - val: [17 (74HC), 20 (74HCT)] - unit: ns - - param: Propagation delay, CP to TC - val: [21 (74HC), 25 (74HCT)] - unit: ns - - param: Propagation delay, CET to TC - val: [11 (74HC), 14 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [51 (74HC), 50 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, CP to Q__n' + val: + - '17 (74HC)' + - '20 (74HCT)' + unit: ns + - + param: 'Propagation delay, CP to TC' + val: + - '21 (74HC)' + - '25 (74HCT)' + unit: ns + - + param: 'Propagation delay, CET to TC' + val: + - '11 (74HC)' + - '14 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '51 (74HC)' + - '50 (74HCT)' + unit: MHz +packages: + DIP: + - '~MR' + - CP + - 'D__0' + - 'D__1' + - 'D__2' + - 'D__3' + - CEP + - GND + - '~PE' + - CET + - 'Q__3' + - 'Q__2' + - 'Q__1' + - 'Q__0' + - TC + - Vcc diff --git a/74164.yaml b/74164.yaml index 3565b79..20889a9 100644 --- a/74164.yaml +++ b/74164.yaml @@ -1,63 +1,70 @@ ---- -description: 8-bit serial-in/parallel-out shift register -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc164.74hct164.pdf" +description: '8-bit serial-in/parallel-out shift register' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc164.74hct164.pdf' pins: - - num: 1 - sym: DSA - desc: data input - - num: 2 - sym: DSB - desc: data input - - num: 3 - sym: Q0 - desc: output - - num: 4 - sym: Q1 - desc: output - - num: 5 - sym: Q2 - desc: output - - num: 6 - sym: Q3 - desc: output - - num: 7 - sym: GND + DSA: + desc: 'data input' + DSB: + desc: 'data input' + Q0: + desc: output + Q1: + desc: output + Q2: + desc: output + Q3: + desc: output + GND: desc: ground - - num: 8 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 9 - sym: ~MR - desc: master reset input (active low) - - num: 10 - sym: Q4 - desc: output - - num: 11 - sym: Q5 - desc: output - - num: 12 - sym: Q6 - desc: output - - num: 13 - sym: Q7 - desc: output - - num: 14 - sym: Vcc - desc: supply voltage + CP: + desc: 'clock input (low-to-high, edge-triggered)' + '~MR': + desc: 'master reset input (active low)' + Q4: + desc: output + Q5: + desc: output + Q6: + desc: output + Q7: + desc: output + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to Qn - val: [12 (74HC), 14 (74HCT)] - unit: ns - - param: Propagation delay, ~MR to Qn - val: [11 (74HC), 16 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [78 (74HC), 61 (74HCT)] - unit: MHz + - + param: 'Propagation delay, CP to Qn' + val: + - '12 (74HC)' + - '14 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~MR to Qn' + val: + - '11 (74HC)' + - '16 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '78 (74HC)' + - '61 (74HCT)' + unit: MHz notes: - - Either DSA or DSB can be used as an active high enable for data entry through the other input. - - Otherwise, Both inputs must be connected together or an unused input must be tied high. -... + - 'Either DSA or DSB can be used as an active high enable for data entry through the other input.' + - 'Otherwise, Both inputs must be connected together or an unused input must be tied high.' +packages: + DIP: + - DSA + - DSB + - Q0 + - Q1 + - Q2 + - Q3 + - GND + - CP + - '~MR' + - Q4 + - Q5 + - Q6 + - Q7 + - Vcc diff --git a/74165.yaml b/74165.yaml index bcd7259..48202ce 100644 --- a/74165.yaml +++ b/74165.yaml @@ -1,72 +1,82 @@ ---- -description: 8-bit parallel-in/serial-out shift register -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc165.74hct165.pdf" +description: '8-bit parallel-in/serial-out shift register' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc165.74hct165.pdf' pins: - - num: 1 - sym: ~PL - desc: asynchronous parallel load input (active low) - - num: 2 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 3 - sym: D4 - desc: parallel data input - - num: 4 - sym: D5 - desc: parallel data input - - num: 5 - sym: D6 - desc: parallel data input - - num: 6 - sym: D7 - desc: parallel data input - - num: 7 - sym: ~Q~7 - desc: complementary output from the last stage - - num: 8 - sym: GND + '~PL': + desc: 'asynchronous parallel load input (active low)' + CP: + desc: 'clock input (low-to-high, edge-triggered)' + D4: + desc: 'parallel data input' + D5: + desc: 'parallel data input' + D6: + desc: 'parallel data input' + D7: + desc: 'parallel data input' + '~Q~7': + desc: 'complementary output from the last stage' + GND: desc: ground - - num: 9 - sym: Q7 - desc: serial output from the last stage - - num: 10 - sym: DS - desc: serial data input - - num: 11 - sym: D0 - desc: parallel data input - - num: 12 - sym: D1 - desc: parallel data input - - num: 13 - sym: D2 - desc: parallel data input - - num: 14 - sym: D3 - desc: parallel data input - - num: 15 - sym: ~CE - desc: clock enable input (active low) - - num: 16 - sym: Vcc - desc: supply voltage + Q7: + desc: 'serial output from the last stage' + DS: + desc: 'serial data input' + D0: + desc: 'parallel data input' + D1: + desc: 'parallel data input' + D2: + desc: 'parallel data input' + D3: + desc: 'parallel data input' + '~CE': + desc: 'clock enable input (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP, ~CE to Q7, ~Q~7 - val: [16 (74HC), 14 (74HCT)] - unit: ns - - param: Propagation delay, ~PL to Q7, ~Q~7 - val: [15 (74HC), 17 (74HCT)] - unit: ns - - param: Propagation delay, D7 to Q7, ~Q~7 - val: [11 (74HC), 11 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [56 (74HC), 48 (74HCT)] - unit: MHz + - + param: 'Propagation delay, CP, ~CE to Q7, ~Q~7' + val: + - '16 (74HC)' + - '14 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~PL to Q7, ~Q~7' + val: + - '15 (74HC)' + - '17 (74HCT)' + unit: ns + - + param: 'Propagation delay, D7 to Q7, ~Q~7' + val: + - '11 (74HC)' + - '11 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '56 (74HC)' + - '48 (74HCT)' + unit: MHz notes: - - The low-to-high transition of input ~CE should only take place while CP is high for predictable operation. - - Either CP or ~CE should be high before the low-to-high transition of ~PL to prevent shifting the data when ~PL is activated. -... + - 'The low-to-high transition of input ~CE should only take place while CP is high for predictable operation.' + - 'Either CP or ~CE should be high before the low-to-high transition of ~PL to prevent shifting the data when ~PL is activated.' +packages: + DIP: + - '~PL' + - CP + - D4 + - D5 + - D6 + - D7 + - '~Q~7' + - GND + - Q7 + - DS + - D0 + - D1 + - D2 + - D3 + - '~CE' + - Vcc diff --git a/74166.yaml b/74166.yaml index ddadcad..feafdd2 100644 --- a/74166.yaml +++ b/74166.yaml @@ -1,69 +1,76 @@ ---- -description: 8-bit parallel-in/serial-out shift register -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc166.74hct166.pdf" +description: '8-bit parallel-in/serial-out shift register' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc166.74hct166.pdf' pins: - - num: 1 - sym: D__s - desc: serial data input - - num: 2 - sym: D__0 - desc: parallel data input - - num: 3 - sym: D__1 - desc: parallel data input - - num: 4 - sym: D__2 - desc: parallel data input - - num: 5 - sym: D__3 - desc: parallel data input - - num: 6 - sym: ~CE - desc: clock enable input (active low) - - num: 7 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 8 - sym: GND + 'D__s': + desc: 'serial data input' + 'D__0': + desc: 'parallel data input' + 'D__1': + desc: 'parallel data input' + 'D__2': + desc: 'parallel data input' + 'D__3': + desc: 'parallel data input' + '~CE': + desc: 'clock enable input (active low)' + CP: + desc: 'clock input (low-to-high, edge-triggered)' + GND: desc: ground - - num: 9 - sym: ~MR - desc: asynchronous master reset (active low) - - num: 10 - sym: D__4 - desc: parallel data input - - num: 11 - sym: D__5 - desc: parallel data input - - num: 12 - sym: D__6 - desc: parallel data input - - num: 13 - sym: Q__7 - desc: serial output from the last stage - - num: 14 - sym: D__7 - desc: parallel data input - - num: 15 - sym: ~PE - desc: parallel enable input (active low) - - num: 16 - sym: Vcc - desc: supply voltage + '~MR': + desc: 'asynchronous master reset (active low)' + 'D__4': + desc: 'parallel data input' + 'D__5': + desc: 'parallel data input' + 'D__6': + desc: 'parallel data input' + 'Q__7': + desc: 'serial output from the last stage' + 'D__7': + desc: 'parallel data input' + '~PE': + desc: 'parallel enable input (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to Q__7 - val: [15 (74HC), 20 (74HCT)] - unit: ns - - param: Propagation delay, ~MR to Q__7 - val: [14 (74HC), 19 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [63 (74HC), 50 (74HCT)] - unit: MHz + - + param: 'Propagation delay, CP to Q__7' + val: + - '15 (74HC)' + - '20 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~MR to Q__7' + val: + - '14 (74HC)' + - '19 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '63 (74HC)' + - '50 (74HCT)' + unit: MHz notes: - - The low-to-high transition of ~CE should only take place while CP is high for predictable operation. - - A low on ~MR overrides all other inputs and clears the register asynchronously, forcing all bit positions to a low stage. -... + - 'The low-to-high transition of ~CE should only take place while CP is high for predictable operation.' + - 'A low on ~MR overrides all other inputs and clears the register asynchronously, forcing all bit positions to a low stage.' +packages: + DIP: + - 'D__s' + - 'D__0' + - 'D__1' + - 'D__2' + - 'D__3' + - '~CE' + - CP + - GND + - '~MR' + - 'D__4' + - 'D__5' + - 'D__6' + - 'Q__7' + - 'D__7' + - '~PE' + - Vcc diff --git a/74173.yaml b/74173.yaml index 5afb7e8..4713eca 100644 --- a/74173.yaml +++ b/74173.yaml @@ -1,68 +1,72 @@ ---- -description: Quad D-type flip-flop; positive-edge trigger; 3-state -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc173.74hct173.pdf" +description: 'Quad D-type flip-flop; positive-edge trigger; 3-state' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc173.74hct173.pdf' pins: - - num: 1 - sym: ~OE~__1 - desc: output enable input (active low) - - num: 2 - sym: ~OE~__2 - desc: output enable input (active low) - - num: 3 - sym: Q__0 - desc: 3-state flip-flop output - - num: 4 - sym: Q__1 - desc: 3-state flip-flop output - - num: 5 - sym: Q__2 - desc: 3-state flip-flop output - - num: 6 - sym: Q__3 - desc: 3-state flip-flop output - - num: 7 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 8 - sym: GND + '~OE~__1': + desc: 'output enable input (active low)' + '~OE~__2': + desc: 'output enable input (active low)' + 'Q__0': + desc: '3-state flip-flop output' + 'Q__1': + desc: '3-state flip-flop output' + 'Q__2': + desc: '3-state flip-flop output' + 'Q__3': + desc: '3-state flip-flop output' + CP: + desc: 'clock input (low-to-high, edge-triggered)' + GND: desc: ground - - num: 9 - sym: ~E~__1 - desc: data enable input (active low) - - num: 10 - sym: ~E~__2 - desc: data enable input (active low) - - num: 11 - sym: D__3 - desc: data input - - num: 12 - sym: D__2 - desc: data input - - num: 13 - sym: D__1 - desc: data input - - num: 14 - sym: D__0 - desc: data input - - num: 15 - sym: MR - desc: asynchronous master reset (active high) - - num: 16 - sym: Vcc - desc: supply voltage + '~E~__1': + desc: 'data enable input (active low)' + '~E~__2': + desc: 'data enable input (active low)' + 'D__3': + desc: 'data input' + 'D__2': + desc: 'data input' + 'D__1': + desc: 'data input' + 'D__0': + desc: 'data input' + MR: + desc: 'asynchronous master reset (active high)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to Q__n - val: [17 (74HC/HCT)] - unit: ns - - param: Propagation delay, MR to Q__n - val: [13 (74HC), 17 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: 88 (74HC/HCT) - unit: MHz + - + param: 'Propagation delay, CP to Q__n' + val: + - '17 (74HC/HCT)' + unit: ns + - + param: 'Propagation delay, MR to Q__n' + val: + - '13 (74HC)' + - '17 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: '88 (74HC/HCT)' + unit: MHz notes: - - When one or both ~OE~__n inputs are high, the outputs are forced to a high-impedance off state. -... + - 'When one or both ~OE~__n inputs are high, the outputs are forced to a high-impedance off state.' +packages: + DIP: + - '~OE~__1' + - '~OE~__2' + - 'Q__0' + - 'Q__1' + - 'Q__2' + - 'Q__3' + - CP + - GND + - '~E~__1' + - '~E~__2' + - 'D__3' + - 'D__2' + - 'D__1' + - 'D__0' + - MR + - Vcc diff --git a/74174.yaml b/74174.yaml index eca7a3b..74113e8 100644 --- a/74174.yaml +++ b/74174.yaml @@ -1,66 +1,73 @@ ---- -description: Hex D-type flip-flop with reset; positive-edge trigger -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc174.74hct174.pdf" +description: 'Hex D-type flip-flop with reset; positive-edge trigger' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc174.74hct174.pdf' pins: - - num: 1 - sym: ~MR - desc: asynchronous master reset (active low) - - num: 2 - sym: Q__0 - desc: flip-flop output - - num: 3 - sym: D__0 - desc: data input - - num: 4 - sym: D__1 - desc: data input - - num: 5 - sym: Q__1 - desc: flip-flop output - - num: 6 - sym: D__2 - desc: data input - - num: 7 - sym: Q__2 - desc: flip-flop output - - num: 8 - sym: GND + '~MR': + desc: 'asynchronous master reset (active low)' + 'Q__0': + desc: 'flip-flop output' + 'D__0': + desc: 'data input' + 'D__1': + desc: 'data input' + 'Q__1': + desc: 'flip-flop output' + 'D__2': + desc: 'data input' + 'Q__2': + desc: 'flip-flop output' + GND: desc: ground - - num: 9 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 10 - sym: Q__3 - desc: flip-flop output - - num: 11 - sym: D__3 - desc: data input - - num: 12 - sym: Q__4 - desc: flip-flop output - - num: 13 - sym: D__4 - desc: data input - - num: 14 - sym: D__5 - desc: data input - - num: 15 - sym: Q__5 - desc: flip-flop output - - num: 16 - sym: Vcc - desc: supply voltage + CP: + desc: 'clock input (low-to-high, edge-triggered)' + 'Q__3': + desc: 'flip-flop output' + 'D__3': + desc: 'data input' + 'Q__4': + desc: 'flip-flop output' + 'D__4': + desc: 'data input' + 'D__5': + desc: 'data input' + 'Q__5': + desc: 'flip-flop output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to Q__n - val: [17 (74HC), 18 (74HCT)] - unit: ns - - param: Propagation delay, ~MR to Q__n - val: [13 (74HC), 17 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [99 (74HC), 69 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, CP to Q__n' + val: + - '17 (74HC)' + - '18 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~MR to Q__n' + val: + - '13 (74HC)' + - '17 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '99 (74HC)' + - '69 (74HCT)' + unit: MHz +packages: + DIP: + - '~MR' + - 'Q__0' + - 'D__0' + - 'D__1' + - 'Q__1' + - 'D__2' + - 'Q__2' + - GND + - CP + - 'Q__3' + - 'D__3' + - 'Q__4' + - 'D__4' + - 'D__5' + - 'Q__5' + - Vcc diff --git a/74175.yaml b/74175.yaml index e90b5d0..d0a7f9a 100644 --- a/74175.yaml +++ b/74175.yaml @@ -1,66 +1,73 @@ ---- -description: Quad D-type flip-flop with reset; positive-edge trigger -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc175.74hct175.pdf" +description: 'Quad D-type flip-flop with reset; positive-edge trigger' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc175.74hct175.pdf' pins: - - num: 1 - sym: ~MR - desc: asynchronous master reset (active low) - - num: 2 - sym: Q__0 - desc: flip-flop output - - num: 3 - sym: ~Q~__0 - desc: complementary flip-flop output - - num: 4 - sym: D__0 - desc: data input - - num: 5 - sym: D__1 - desc: data input - - num: 6 - sym: ~Q~__1 - desc: complementary flip-flop output - - num: 7 - sym: Q__1 - desc: flip-flop output - - num: 8 - sym: GND + '~MR': + desc: 'asynchronous master reset (active low)' + 'Q__0': + desc: 'flip-flop output' + '~Q~__0': + desc: 'complementary flip-flop output' + 'D__0': + desc: 'data input' + 'D__1': + desc: 'data input' + '~Q~__1': + desc: 'complementary flip-flop output' + 'Q__1': + desc: 'flip-flop output' + GND: desc: ground - - num: 9 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 10 - sym: Q__2 - desc: flip-flop output - - num: 11 - sym: ~Q~__2 - desc: complementary flip-flop output - - num: 12 - sym: D__2 - desc: data input - - num: 13 - sym: D__3 - desc: data input - - num: 14 - sym: ~Q~__3 - desc: complementary flip-flop output - - num: 15 - sym: Q__3 - desc: flip-flop output - - num: 16 - sym: Vcc - desc: supply voltage + CP: + desc: 'clock input (low-to-high, edge-triggered)' + 'Q__2': + desc: 'flip-flop output' + '~Q~__2': + desc: 'complementary flip-flop output' + 'D__2': + desc: 'data input' + 'D__3': + desc: 'data input' + '~Q~__3': + desc: 'complementary flip-flop output' + 'Q__3': + desc: 'flip-flop output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to Q__n, ~Q~__n - val: [17 (74HC), 16 (74HCT)] - unit: ns - - param: Propagation delay, ~MR to Q__n - val: [15 (74HC), 19 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [83 (74HC), 54 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, CP to Q__n, ~Q~__n' + val: + - '17 (74HC)' + - '16 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~MR to Q__n' + val: + - '15 (74HC)' + - '19 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '83 (74HC)' + - '54 (74HCT)' + unit: MHz +packages: + DIP: + - '~MR' + - 'Q__0' + - '~Q~__0' + - 'D__0' + - 'D__1' + - '~Q~__1' + - 'Q__1' + - GND + - CP + - 'Q__2' + - '~Q~__2' + - 'D__2' + - 'D__3' + - '~Q~__3' + - 'Q__3' + - Vcc diff --git a/74191.yaml b/74191.yaml index 2e79964..14c9584 100644 --- a/74191.yaml +++ b/74191.yaml @@ -1,63 +1,63 @@ ---- -description: Presettable synchronous 4-bit binary up/down counter -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc191.74hct191.pdf" +description: 'Presettable synchronous 4-bit binary up/down counter' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc191.74hct191.pdf' pins: - - num: 1 - sym: D__1 - desc: data input - - num: 2 - sym: Q__1 - desc: counter output - - num: 3 - sym: Q__0 - desc: counter output - - num: 4 - sym: ~CE - desc: count enable input (active low) - - num: 5 - sym: ~U~/D - desc: up/down input - - num: 6 - sym: Q__2 - desc: counter output - - num: 7 - sym: Q__3 - desc: counter output - - num: 8 - sym: GND + 'D__1': + desc: 'data input' + 'Q__1': + desc: 'counter output' + 'Q__0': + desc: 'counter output' + '~CE': + desc: 'count enable input (active low)' + '~U~/D': + desc: 'up/down input' + 'Q__2': + desc: 'counter output' + 'Q__3': + desc: 'counter output' + GND: desc: ground - - num: 9 - sym: D__3 - desc: data input - - num: 10 - sym: D__2 - desc: data input - - num: 11 - sym: ~PL - desc: parallel load input (active low) - - num: 12 - sym: TC - desc: terminal count output - - num: 13 - sym: ~RC - desc: ripple clock output (active low) - - num: 14 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 15 - sym: D__0 - desc: data input - - num: 16 - sym: Vcc - desc: supply voltage + 'D__3': + desc: 'data input' + 'D__2': + desc: 'data input' + '~PL': + desc: 'parallel load input (active low)' + TC: + desc: 'terminal count output' + '~RC': + desc: 'ripple clock output (active low)' + CP: + desc: 'clock input (low-to-high, edge-triggered)' + 'D__0': + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to Q__n - val: 22 (74HC/74HCT) - unit: ns - - param: Maximum clock frequency - val: 36 (74HC/74HCT) - unit: MHz -... + - + param: 'Propagation delay, CP to Q__n' + val: '22 (74HC/74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: '36 (74HC/74HCT)' + unit: MHz +packages: + DIP: + - 'D__1' + - 'Q__1' + - 'Q__0' + - '~CE' + - '~U~/D' + - 'Q__2' + - 'Q__3' + - GND + - 'D__3' + - 'D__2' + - '~PL' + - TC + - '~RC' + - CP + - 'D__0' + - Vcc diff --git a/74193.yaml b/74193.yaml index 84cf349..eb0b321 100644 --- a/74193.yaml +++ b/74193.yaml @@ -1,84 +1,109 @@ ---- -description: Presettable synchronous 4-bit binary up/down counter; separate up/down clocks -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc193.74hct193.pdf" +description: 'Presettable synchronous 4-bit binary up/down counter; separate up/down clocks' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc193.74hct193.pdf' pins: - - num: 1 - sym: D__1 - desc: data input - - num: 2 - sym: Q__1 - desc: counter output - - num: 3 - sym: Q__0 - desc: counter output - - num: 4 - sym: CPD - desc: count down clock input (low-to-high, edge-triggered) - - num: 5 - sym: CPU - desc: count up clock input (low-to-high, edge-triggered) - - num: 6 - sym: Q__2 - desc: counter output - - num: 7 - sym: Q__3 - desc: counter output - - num: 8 - sym: GND + 'D__1': + desc: 'data input' + 'Q__1': + desc: 'counter output' + 'Q__0': + desc: 'counter output' + CPD: + desc: 'count down clock input (low-to-high, edge-triggered)' + CPU: + desc: 'count up clock input (low-to-high, edge-triggered)' + 'Q__2': + desc: 'counter output' + 'Q__3': + desc: 'counter output' + GND: desc: ground - - num: 9 - sym: D__3 - desc: data input - - num: 10 - sym: D__2 - desc: data input - - num: 11 - sym: ~PL - desc: parallel load input (active low) - - num: 12 - sym: ~TCU - desc: terminal count up (carry) output (active low) - - num: 13 - sym: ~TCD - desc: terminal count down (borrow) output (active low) - - num: 14 - sym: MR - desc: asynchronous master reset (active high) - - num: 15 - sym: D__0 - desc: data input - - num: 16 - sym: Vcc - desc: supply voltage + 'D__3': + desc: 'data input' + 'D__2': + desc: 'data input' + '~PL': + desc: 'parallel load input (active low)' + '~TCU': + desc: 'terminal count up (carry) output (active low)' + '~TCD': + desc: 'terminal count down (borrow) output (active low)' + MR: + desc: 'asynchronous master reset (active high)' + 'D__0': + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CPU, CPD to Q__n - val: [23 (74HC), 23 (74HCT)] - unit: ns - - param: Propagation delay, CPU to ~TCU, ~TCD - val: [14 (74HC), 15 (74HCT)] - unit: ns - - param: Propagation delay, ~PL to Q__n - val: [25 (74HC), 26 (74HCT)] - unit: ns - - param: Propagation delay, MR to Q__n - val: [21 (74HC), 22 (74HCT)] - unit: ns - - param: Propagation delay, D__n to Q__n - val: [25 (74HC), 27 (74HCT)] - unit: ns - - param: Propagation delay, ~PL to ~TCU, ~TCD - val: [29 (74HC), 31 (74HCT)] - unit: ns - - param: Propagation delay, MR to ~TCU, ~TCD - val: [27 (74HC), 29 (74HCT)] - unit: ns - - param: Propagation delay, CPU, D__n to ~TCU, ~TCD - val: [29 (74HC), 32 (74HCT)] - unit: ns - - param: Maximum frequency - val: [41 (74HC), 43 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, CPU, CPD to Q__n' + val: + - '23 (74HC)' + - '23 (74HCT)' + unit: ns + - + param: 'Propagation delay, CPU to ~TCU, ~TCD' + val: + - '14 (74HC)' + - '15 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~PL to Q__n' + val: + - '25 (74HC)' + - '26 (74HCT)' + unit: ns + - + param: 'Propagation delay, MR to Q__n' + val: + - '21 (74HC)' + - '22 (74HCT)' + unit: ns + - + param: 'Propagation delay, D__n to Q__n' + val: + - '25 (74HC)' + - '27 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~PL to ~TCU, ~TCD' + val: + - '29 (74HC)' + - '31 (74HCT)' + unit: ns + - + param: 'Propagation delay, MR to ~TCU, ~TCD' + val: + - '27 (74HC)' + - '29 (74HCT)' + unit: ns + - + param: 'Propagation delay, CPU, D__n to ~TCU, ~TCD' + val: + - '29 (74HC)' + - '32 (74HCT)' + unit: ns + - + param: 'Maximum frequency' + val: + - '41 (74HC)' + - '43 (74HCT)' + unit: MHz +packages: + DIP: + - 'D__1' + - 'Q__1' + - 'Q__0' + - CPD + - CPU + - 'Q__2' + - 'Q__3' + - GND + - 'D__3' + - 'D__2' + - '~PL' + - '~TCU' + - '~TCD' + - MR + - 'D__0' + - Vcc diff --git a/74194.yaml b/74194.yaml index 184cc24..f9eb87e 100644 --- a/74194.yaml +++ b/74194.yaml @@ -1,71 +1,78 @@ ---- -description: 4-bit bidirectional universal shift register -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc194.74hct194.pdf" +description: '4-bit bidirectional universal shift register' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc194.74hct194.pdf' pins: - - num: 1 - sym: ~MR - desc: asynchronous master reset (active low) - - num: 2 - sym: D__SR - desc: serial data input (shift right) - - num: 3 - sym: D__0 - desc: parallel data input - - num: 4 - sym: D__1 - desc: parallel data input - - num: 5 - sym: D__2 - desc: parallel data input - - num: 6 - sym: D__3 - desc: parallel data input - - num: 7 - sym: D__SL - desc: serial data input (shift left) - - num: 8 - sym: GND + '~MR': + desc: 'asynchronous master reset (active low)' + 'D__SR': + desc: 'serial data input (shift right)' + 'D__0': + desc: 'parallel data input' + 'D__1': + desc: 'parallel data input' + 'D__2': + desc: 'parallel data input' + 'D__3': + desc: 'parallel data input' + 'D__SL': + desc: 'serial data input (shift left)' + GND: desc: ground - - num: 9 - sym: S__0 - desc: mode control input - - num: 10 - sym: S__1 - desc: mode control input - - num: 11 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 12 - sym: Q__3 - desc: parallel output - - num: 13 - sym: Q__2 - desc: parallel output - - num: 14 - sym: Q__1 - desc: parallel output - - num: 15 - sym: Q__0 - desc: parallel output - - num: 16 - sym: Vcc - desc: supply voltage + 'S__0': + desc: 'mode control input' + 'S__1': + desc: 'mode control input' + CP: + desc: 'clock input (low-to-high, edge-triggered)' + 'Q__3': + desc: 'parallel output' + 'Q__2': + desc: 'parallel output' + 'Q__1': + desc: 'parallel output' + 'Q__0': + desc: 'parallel output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to Q__n - val: [14 (74HC), 15 (74HCT)] - unit: ns - - param: Propagation delay, ~MR to Q__n - val: [14 (74HC), 15 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [102 (74HC), 77 (74HCT)] - unit: MHz + - + param: 'Propagation delay, CP to Q__n' + val: + - '14 (74HC)' + - '15 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~MR to Q__n' + val: + - '14 (74HC)' + - '15 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '102 (74HC)' + - '77 (74HCT)' + unit: MHz notes: - - S__0 and S__1 are low; hold (do nothing) - - S__0 low and S__1 high; shift left - - S__0 high and S__1 low; shift right - - S__0 and S__1 high; parallel load -... + - 'S__0 and S__1 are low; hold (do nothing)' + - 'S__0 low and S__1 high; shift left' + - 'S__0 high and S__1 low; shift right' + - 'S__0 and S__1 high; parallel load' +packages: + DIP: + - '~MR' + - 'D__SR' + - 'D__0' + - 'D__1' + - 'D__2' + - 'D__3' + - 'D__SL' + - GND + - 'S__0' + - 'S__1' + - CP + - 'Q__3' + - 'Q__2' + - 'Q__1' + - 'Q__0' + - Vcc diff --git a/74195.yaml b/74195.yaml index 263b1ca..b3588d6 100644 --- a/74195.yaml +++ b/74195.yaml @@ -1,57 +1,55 @@ ---- -description: "Universal 4-Bit Shift Register" -aliases: [] -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://pdf1.alldatasheet.com/datasheet-pdf/view/131233/NSC/74195.html" +description: 'Universal 4-Bit Shift Register' +aliases: { } +family: '7400' +datasheet: 'http://pdf1.alldatasheet.com/datasheet-pdf/view/131233/NSC/74195.html' pins: - - num: 1 - sym: ~MR~ - desc: Asynchronous Master Reset (Active Low) - - num: 2 - sym: J - desc: First Stage J Input (Active High) - - num: 3 - sym: ~K~ - desc: First Stage K Input (Active Low) - - num: 4 - sym: P__0 - desc: Parallel Data Input - - num: 5 - sym: P__1 - desc: Parallel Data Input - - num: 6 - sym: P__2 - desc: Parallel Data Input - - num: 7 - sym: P__3 - desc: Parallel Data Input - - num: 8 - sym: GND + '~MR~': + desc: 'Asynchronous Master Reset (Active Low)' + J: + desc: 'First Stage J Input (Active High)' + '~K~': + desc: 'First Stage K Input (Active Low)' + 'P__0': + desc: 'Parallel Data Input' + 'P__1': + desc: 'Parallel Data Input' + 'P__2': + desc: 'Parallel Data Input' + 'P__3': + desc: 'Parallel Data Input' + GND: desc: Ground - - num: 9 - sym: ~PE~ - desc: Parallel Enable Input (Active Low) - - num: 10 - sym: CP - desc: Clock Pulse Input (Active Rising Edge) - - num: 11 - sym: ~Q~__3 - desc: Complementary Last Stage Output (Active Low) - - num: 12 - sym: Q__3 - desc: Parallel Outputs - - num: 13 - sym: Q__2 - desc: Parallel Outputs - - num: 14 - sym: Q__1 - desc: Parallel Outputs - - num: 15 - sym: Q__0 - desc: Parallel Outputs - - num: 16 - sym: VCC + '~PE~': + desc: 'Parallel Enable Input (Active Low)' + CP: + desc: 'Clock Pulse Input (Active Rising Edge)' + '~Q~__3': + desc: 'Complementary Last Stage Output (Active Low)' + 'Q__3': + desc: 'Parallel Outputs' + 'Q__2': + desc: 'Parallel Outputs' + 'Q__1': + desc: 'Parallel Outputs' + 'Q__0': + desc: 'Parallel Outputs' + VCC: desc: Power - +packages: + DIP: + - '~MR~' + - J + - '~K~' + - 'P__0' + - 'P__1' + - 'P__2' + - 'P__3' + - GND + - '~PE~' + - CP + - '~Q~__3' + - 'Q__3' + - 'Q__2' + - 'Q__1' + - 'Q__0' + - VCC diff --git a/7420.yaml b/7420.yaml index 634fbb4..b10a1cb 100644 --- a/7420.yaml +++ b/7420.yaml @@ -1,54 +1,51 @@ ---- -description: Dual 4-input NAND gate -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc20.74hct20.pdf" +description: 'Dual 4-input NAND gate' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc20.74hct20.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: NC - desc: no connection - - num: 4 - sym: 1C - desc: data input - - num: 5 - sym: 1D - desc: data input - - num: 6 - sym: 1Y - desc: data output - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1C: + desc: 'data input' + 1D: + desc: 'data input' + 1Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 2Y - desc: data output - - num: 9 - sym: 2A - desc: data input - - num: 10 - sym: 2B - desc: data input - - num: 11 - sym: NC - desc: no connection - - num: 12 - sym: 2C - desc: data input - - num: 13 - sym: 2D - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage + 2Y: + desc: 'data output' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 2C: + desc: 'data input' + 2D: + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA, nB, nC, nD to nY - val: [8 (74HC), 13 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, nA, nB, nC, nD to nY' + val: + - '8 (74HC)' + - '13 (74HCT)' + unit: ns +packages: + DIP: + - 1A + - 1B + - NC + - 1C + - 1D + - 1Y + - GND + - 2Y + - 2A + - 2B + - NC + - 2C + - 2D + - Vcc diff --git a/7421.yaml b/7421.yaml index b326e03..05b2a98 100644 --- a/7421.yaml +++ b/7421.yaml @@ -1,54 +1,49 @@ ---- -description: Dual 4-input AND gate -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.nxp.com/acrobat_download/datasheets/74HC21_3.pdf" +description: 'Dual 4-input AND gate' +family: '7400' +datasheet: 'http://www.nxp.com/acrobat_download/datasheets/74HC21_3.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: NC - desc: no connection - - num: 4 - sym: 1C - desc: data input - - num: 5 - sym: 1D - desc: data input - - num: 6 - sym: 1Y - desc: data output - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1C: + desc: 'data input' + 1D: + desc: 'data input' + 1Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 2Y - desc: data output - - num: 9 - sym: 2A - desc: data input - - num: 10 - sym: 2B - desc: data input - - num: 11 - sym: NC - desc: no connection - - num: 12 - sym: 2C - desc: data input - - num: 13 - sym: 2D - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage + 2Y: + desc: 'data output' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 2C: + desc: 'data input' + 2D: + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA, nB, nC, nD to nY - val: 10 (74HC) - unit: ns -... + - + param: 'Propagation delay, nA, nB, nC, nD to nY' + val: '10 (74HC)' + unit: ns +packages: + DIP: + - 1A + - 1B + - NC + - 1C + - 1D + - 1Y + - GND + - 2Y + - 2A + - 2B + - NC + - 2C + - 2D + - Vcc diff --git a/74221.yaml b/74221.yaml index ddd55e2..38c7314 100644 --- a/74221.yaml +++ b/74221.yaml @@ -1,66 +1,73 @@ ---- -description: Dual non-retriggerable monostable multivibrator with reset -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc221.74hct221.pdf" +description: 'Dual non-retriggerable monostable multivibrator with reset' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc221.74hct221.pdf' pins: - - num: 1 - sym: 1~A - desc: negative-edge triggered input 1 - - num: 2 - sym: 1B - desc: positive-edge triggered input 1 - - num: 3 - sym: 1~R~D - desc: direct reset (low) and positive-edge triggered input 1 - - num: 4 - sym: 1~Q - desc: active low output 1 - - num: 5 - sym: 2Q - desc: active high output 2 - - num: 6 - sym: 2CEXT - desc: external capacitor connection 2 - - num: 7 - sym: 2REXT/CEXT - desc: external resistor and capacitor connection 2 - - num: 8 - sym: GND + '1~A': + desc: 'negative-edge triggered input 1' + 1B: + desc: 'positive-edge triggered input 1' + '1~R~D': + desc: 'direct reset (low) and positive-edge triggered input 1' + '1~Q': + desc: 'active low output 1' + 2Q: + desc: 'active high output 2' + 2CEXT: + desc: 'external capacitor connection 2' + 2REXT/CEXT: + desc: 'external resistor and capacitor connection 2' + GND: desc: ground - - num: 9 - sym: 2~A - desc: negative-edge triggered input 2 - - num: 10 - sym: 2B - desc: positive-edge triggered input 2 - - num: 11 - sym: 2~R~D - desc: direct reset (low) and positive-edge triggered input 2 - - num: 12 - sym: 2~Q - desc: active low output 2 - - num: 13 - sym: 1Q - desc: active high output 1 - - num: 14 - sym: 1CEXT - desc: external capacitor connection 1 - - num: 15 - sym: 1REXT/CEXT - desc: external resistor and capacitor connection 1 - - num: 16 - sym: Vcc - desc: supply voltage + '2~A': + desc: 'negative-edge triggered input 2' + 2B: + desc: 'positive-edge triggered input 2' + '2~R~D': + desc: 'direct reset (low) and positive-edge triggered input 2' + '2~Q': + desc: 'active low output 2' + 1Q: + desc: 'active high output 1' + 1CEXT: + desc: 'external capacitor connection 1' + 1REXT/CEXT: + desc: 'external resistor and capacitor connection 1' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, n~R~D, n~A, nB to nQ or n~Q - val: [29 (74HC), 32 (74HCT)] - unit: ns - - param: Output transition time - val: [19 (74HC), 7 (74HCT)] - unit: ns - - param: External timing resistor - val: [2 (min), 1000 (max)] - unit: kΩ -... + - + param: 'Propagation delay, n~R~D, n~A, nB to nQ or n~Q' + val: + - '29 (74HC)' + - '32 (74HCT)' + unit: ns + - + param: 'Output transition time' + val: + - '19 (74HC)' + - '7 (74HCT)' + unit: ns + - + param: 'External timing resistor' + val: + - '2 (min)' + - '1000 (max)' + unit: 'kΩ' +packages: + DIP: + - '1~A' + - 1B + - '1~R~D' + - '1~Q' + - 2Q + - 2CEXT + - 2REXT/CEXT + - GND + - '2~A' + - 2B + - '2~R~D' + - '2~Q' + - 1Q + - 1CEXT + - 1REXT/CEXT + - Vcc diff --git a/74237.yaml b/74237.yaml index 2d85430..810f52d 100644 --- a/74237.yaml +++ b/74237.yaml @@ -1,69 +1,71 @@ ---- -description: 3-to-8 line decoder/demultiplexer with address latches; non-inverting -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc237.pdf" +description: '3-to-8 line decoder/demultiplexer with address latches; non-inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc237.pdf' pins: - - num: 1 - sym: A0 - desc: data input 0 - - num: 2 - sym: A1 - desc: data input 1 - - num: 3 - sym: A2 - desc: data input 2 - - num: 4 - sym: ~LE - desc: latch enable input (active low) - - num: 5 - sym: ~E~1 - desc: data enable input 1 (active low) - - num: 6 - sym: E2 - desc: data enable input 2 (active high) - - num: 7 - sym: Y7 - desc: output 7 - - num: 8 - sym: GND + A0: + desc: 'data input 0' + A1: + desc: 'data input 1' + A2: + desc: 'data input 2' + '~LE': + desc: 'latch enable input (active low)' + '~E~1': + desc: 'data enable input 1 (active low)' + E2: + desc: 'data enable input 2 (active high)' + Y7: + desc: 'output 7' + GND: desc: ground - - num: 9 - sym: Y6 - desc: output 6 - - num: 10 - sym: Y5 - desc: output 5 - - num: 11 - sym: Y4 - desc: output 4 - - num: 12 - sym: Y3 - desc: output 3 - - num: 13 - sym: Y2 - desc: output 2 - - num: 14 - sym: Y1 - desc: output 1 - - num: 15 - sym: Y0 - desc: output 0 - - num: 16 - sym: Vcc - desc: supply voltage + Y6: + desc: 'output 6' + Y5: + desc: 'output 5' + Y4: + desc: 'output 4' + Y3: + desc: 'output 3' + Y2: + desc: 'output 2' + Y1: + desc: 'output 1' + Y0: + desc: 'output 0' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, An to Yn - val: 16 (74HC) + - + param: 'Propagation delay, An to Yn' + val: '16 (74HC)' unit: ns - - param: Propagation delay, ~LE to Yn - val: 19 (74HC) + - + param: 'Propagation delay, ~LE to Yn' + val: '19 (74HC)' unit: ns - - param: Propagation delay, ~E~1 to Yn - val: 14 (74HC) + - + param: 'Propagation delay, ~E~1 to Yn' + val: '14 (74HC)' unit: ns - - param: Propagation delay, E2 to Yn - val: 14 (74HC) + - + param: 'Propagation delay, E2 to Yn' + val: '14 (74HC)' unit: ns -... +packages: + DIP: + - A0 + - A1 + - A2 + - '~LE' + - '~E~1' + - E2 + - Y7 + - GND + - Y6 + - Y5 + - Y4 + - Y3 + - Y2 + - Y1 + - Y0 + - Vcc diff --git a/74238.yaml b/74238.yaml index 5b7c50b..8cfd014 100644 --- a/74238.yaml +++ b/74238.yaml @@ -1,66 +1,73 @@ ---- -description: 3-to-8 line decoder/demultiplexer; non-inverting -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc238.74hct238.pdf" +description: '3-to-8 line decoder/demultiplexer; non-inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc238.74hct238.pdf' pins: - - num: 1 - sym: A0 - desc: data input 0 - - num: 2 - sym: A1 - desc: data input 1 - - num: 3 - sym: A2 - desc: data input 2 - - num: 4 - sym: ~E~1 - desc: enable input 1 (active low) - - num: 5 - sym: ~E~2 - desc: enable input 2 (active low) - - num: 6 - sym: E3 - desc: enable input 3 (active high) - - num: 7 - sym: Y7 - desc: output 7 - - num: 8 - sym: GND + A0: + desc: 'data input 0' + A1: + desc: 'data input 1' + A2: + desc: 'data input 2' + '~E~1': + desc: 'enable input 1 (active low)' + '~E~2': + desc: 'enable input 2 (active low)' + E3: + desc: 'enable input 3 (active high)' + Y7: + desc: 'output 7' + GND: desc: ground - - num: 9 - sym: Y6 - desc: output 6 - - num: 10 - sym: Y5 - desc: output 5 - - num: 11 - sym: Y4 - desc: output 4 - - num: 12 - sym: Y3 - desc: output 3 - - num: 13 - sym: Y2 - desc: output 2 - - num: 14 - sym: Y1 - desc: output 1 - - num: 15 - sym: Y0 - desc: output 0 - - num: 16 - sym: Vcc - desc: supply voltage + Y6: + desc: 'output 6' + Y5: + desc: 'output 5' + Y4: + desc: 'output 4' + Y3: + desc: 'output 3' + Y2: + desc: 'output 2' + Y1: + desc: 'output 1' + Y0: + desc: 'output 0' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, An to Yn - val: [14 (74HC), 18 (74HCT)] + - + param: 'Propagation delay, An to Yn' + val: + - '14 (74HC)' + - '18 (74HCT)' unit: ns - - param: Propagation delay, E3 to Yn - val: [16 (74HC), 20 (74HCT)] + - + param: 'Propagation delay, E3 to Yn' + val: + - '16 (74HC)' + - '20 (74HCT)' unit: ns - - param: Propagation delay, ~E~n to Yn - val: [17 (74HC), 21 (74HCT)] + - + param: 'Propagation delay, ~E~n to Yn' + val: + - '17 (74HC)' + - '21 (74HCT)' unit: ns -... +packages: + DIP: + - A0 + - A1 + - A2 + - '~E~1' + - '~E~2' + - E3 + - Y7 + - GND + - Y6 + - Y5 + - Y4 + - Y3 + - Y2 + - Y1 + - Y0 + - Vcc diff --git a/74240.yaml b/74240.yaml index 7d99ae6..926bc36 100644 --- a/74240.yaml +++ b/74240.yaml @@ -1,74 +1,74 @@ ---- -description: Octal buffer/line driver; 3-state; inverting -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc240.74hct240.pdf" +description: 'Octal buffer/line driver; 3-state; inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc240.74hct240.pdf' pins: - - num: 1 - sym: 1~OE - desc: output enable (active low) - - num: 2 - sym: 1A0 - desc: data input - - num: 3 - sym: 2Y0 - desc: bus output - - num: 4 - sym: 1A1 - desc: data input - - num: 5 - sym: 2Y1 - desc: bus output - - num: 6 - sym: 1A2 - desc: data input - - num: 7 - sym: 2Y2 - desc: bus output - - num: 8 - sym: 1A3 - desc: data input - - num: 9 - sym: 2Y3 - desc: bus output - - num: 10 - sym: GND + '1~OE': + desc: 'output enable (active low)' + 1A0: + desc: 'data input' + 2Y0: + desc: 'bus output' + 1A1: + desc: 'data input' + 2Y1: + desc: 'bus output' + 1A2: + desc: 'data input' + 2Y2: + desc: 'bus output' + 1A3: + desc: 'data input' + 2Y3: + desc: 'bus output' + GND: desc: ground - - num: 11 - sym: 2A3 - desc: data input - - num: 12 - sym: 1Y3 - desc: bus output - - num: 13 - sym: 2A2 - desc: data input - - num: 14 - sym: 1Y2 - desc: bus output - - num: 15 - sym: 2A1 - desc: data input - - num: 16 - sym: 1Y1 - desc: bus output - - num: 17 - sym: 2A0 - desc: data input - - num: 18 - sym: 1Y0 - desc: bus output - - num: 19 - sym: 2~OE - desc: output enable (active low) - - num: 20 - sym: Vcc - desc: supply voltage + 2A3: + desc: 'data input' + 1Y3: + desc: 'bus output' + 2A2: + desc: 'data input' + 1Y2: + desc: 'bus output' + 2A1: + desc: 'data input' + 1Y1: + desc: 'bus output' + 2A0: + desc: 'data input' + 1Y0: + desc: 'bus output' + '2~OE': + desc: 'output enable (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nAn to nYn - val: [9 (74HC/HCT)] - unit: ns + - + param: 'Propagation delay, nAn to nYn' + val: + - '9 (74HC/HCT)' + unit: ns notes: - - Setting 1~OE or 2~OE high causes the outputs to assume a high-impedance off state. -... + - 'Setting 1~OE or 2~OE high causes the outputs to assume a high-impedance off state.' +packages: + DIP: + - '1~OE' + - 1A0 + - 2Y0 + - 1A1 + - 2Y1 + - 1A2 + - 2Y2 + - 1A3 + - 2Y3 + - GND + - 2A3 + - 1Y3 + - 2A2 + - 1Y2 + - 2A1 + - 1Y1 + - 2A0 + - 1Y0 + - '2~OE' + - Vcc diff --git a/74241.yaml b/74241.yaml index ce316a6..a81e279 100644 --- a/74241.yaml +++ b/74241.yaml @@ -1,74 +1,75 @@ ---- -description: Octal buffer/line driver; 3-state; non-inverting -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc241.74hct241.pdf" +description: 'Octal buffer/line driver; 3-state; non-inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc241.74hct241.pdf' pins: - - num: 1 - sym: 1~OE - desc: output enable (active low) - - num: 2 - sym: 1A0 - desc: data input - - num: 3 - sym: 2Y0 - desc: bus output - - num: 4 - sym: 1A1 - desc: data input - - num: 5 - sym: 2Y1 - desc: bus output - - num: 6 - sym: 1A2 - desc: data input - - num: 7 - sym: 2Y2 - desc: bus output - - num: 8 - sym: 1A3 - desc: data input - - num: 9 - sym: 2Y3 - desc: bus output - - num: 10 - sym: GND + '1~OE': + desc: 'output enable (active low)' + 1A0: + desc: 'data input' + 2Y0: + desc: 'bus output' + 1A1: + desc: 'data input' + 2Y1: + desc: 'bus output' + 1A2: + desc: 'data input' + 2Y2: + desc: 'bus output' + 1A3: + desc: 'data input' + 2Y3: + desc: 'bus output' + GND: desc: ground - - num: 11 - sym: 2A3 - desc: data input - - num: 12 - sym: 1Y3 - desc: bus output - - num: 13 - sym: 2A2 - desc: data input - - num: 14 - sym: 1Y2 - desc: bus output - - num: 15 - sym: 2A1 - desc: data input - - num: 16 - sym: 1Y1 - desc: bus output - - num: 17 - sym: 2A0 - desc: data input - - num: 18 - sym: 1Y0 - desc: bus output - - num: 19 - sym: 2OE - desc: output enable (active high) - - num: 20 - sym: Vcc - desc: supply voltage + 2A3: + desc: 'data input' + 1Y3: + desc: 'bus output' + 2A2: + desc: 'data input' + 1Y2: + desc: 'bus output' + 2A1: + desc: 'data input' + 1Y1: + desc: 'bus output' + 2A0: + desc: 'data input' + 1Y0: + desc: 'bus output' + 2OE: + desc: 'output enable (active high)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nAn to nYn - val: [7 (74HC), 11 (74HCT)] - unit: ns + - + param: 'Propagation delay, nAn to nYn' + val: + - '7 (74HC)' + - '11 (74HCT)' + unit: ns notes: - - Setting 1~OE high or 2OE low causes the outputs to assume a high-impedance off state. -... + - 'Setting 1~OE high or 2OE low causes the outputs to assume a high-impedance off state.' +packages: + DIP: + - '1~OE' + - 1A0 + - 2Y0 + - 1A1 + - 2Y1 + - 1A2 + - 2Y2 + - 1A3 + - 2Y3 + - GND + - 2A3 + - 1Y3 + - 2A2 + - 1Y2 + - 2A1 + - 1Y1 + - 2A0 + - 1Y0 + - 2OE + - Vcc diff --git a/74243.yaml b/74243.yaml index c2d0699..e773068 100644 --- a/74243.yaml +++ b/74243.yaml @@ -1,58 +1,53 @@ ---- -description: Quad bus transceiver; 3-state -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc243.pdf" +description: 'Quad bus transceiver; 3-state' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc243.pdf' pins: - - num: 1 - sym: ~OE~A - desc: output enable (active low) - - num: 2 - sym: NC - desc: no connection - - num: 3 - sym: A0 - desc: data input or output - - num: 4 - sym: A1 - desc: data input or output - - num: 5 - sym: A2 - desc: data input or output - - num: 6 - sym: A3 - desc: data input or output - - num: 7 - sym: GND + '~OE~A': + desc: 'output enable (active low)' + A0: + desc: 'data input or output' + A1: + desc: 'data input or output' + A2: + desc: 'data input or output' + A3: + desc: 'data input or output' + GND: desc: ground - - num: 8 - sym: B3 - desc: data output or input - - num: 9 - sym: B2 - desc: data output or input - - num: 10 - sym: B1 - desc: data output or input - - num: 11 - sym: B0 - desc: data output or input - - num: 12 - sym: NC - desc: no connection - - num: 13 - sym: OEB - desc: output enable (active high) - - num: 14 - sym: Vcc - desc: supply voltage + B3: + desc: 'data output or input' + B2: + desc: 'data output or input' + B1: + desc: 'data output or input' + B0: + desc: 'data output or input' + OEB: + desc: 'output enable (active high)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, An to Bn; Bn to An - val: 6 (74HC) - unit: ns + - + param: 'Propagation delay, An to Bn; Bn to An' + val: '6 (74HC)' + unit: ns notes: - - When ~OE~A and OEB are low, An are inputs. - - When ~OE~A and OEB are high, Bn are inputs. - - Otherwise, An and Bn are in a high-impedance off state. -... + - 'When ~OE~A and OEB are low, An are inputs.' + - 'When ~OE~A and OEB are high, Bn are inputs.' + - 'Otherwise, An and Bn are in a high-impedance off state.' +packages: + DIP: + - '~OE~A' + - NC + - A0 + - A1 + - A2 + - A3 + - GND + - B3 + - B2 + - B1 + - B0 + - NC + - OEB + - Vcc diff --git a/74244.yaml b/74244.yaml index 6073e98..8389e8d 100644 --- a/74244.yaml +++ b/74244.yaml @@ -1,74 +1,75 @@ ---- -description: Octal buffer/line driver; 3-state; non-inverting -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc244.74hct244.pdf" +description: 'Octal buffer/line driver; 3-state; non-inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc244.74hct244.pdf' pins: - - num: 1 - sym: 1~OE - desc: output enable (active low) - - num: 2 - sym: 1A0 - desc: data input - - num: 3 - sym: 2Y0 - desc: bus output - - num: 4 - sym: 1A1 - desc: data input - - num: 5 - sym: 2Y1 - desc: bus output - - num: 6 - sym: 1A2 - desc: data input - - num: 7 - sym: 2Y2 - desc: bus output - - num: 8 - sym: 1A3 - desc: data input - - num: 9 - sym: 2Y3 - desc: bus output - - num: 10 - sym: GND + '1~OE': + desc: 'output enable (active low)' + 1A0: + desc: 'data input' + 2Y0: + desc: 'bus output' + 1A1: + desc: 'data input' + 2Y1: + desc: 'bus output' + 1A2: + desc: 'data input' + 2Y2: + desc: 'bus output' + 1A3: + desc: 'data input' + 2Y3: + desc: 'bus output' + GND: desc: ground - - num: 11 - sym: 2A3 - desc: data input - - num: 12 - sym: 1Y3 - desc: bus output - - num: 13 - sym: 2A2 - desc: data input - - num: 14 - sym: 1Y2 - desc: bus output - - num: 15 - sym: 2A1 - desc: data input - - num: 16 - sym: 1Y1 - desc: bus output - - num: 17 - sym: 2A0 - desc: data input - - num: 18 - sym: 1Y0 - desc: bus output - - num: 19 - sym: 2~OE - desc: output enable (active low) - - num: 20 - sym: Vcc - desc: supply voltage + 2A3: + desc: 'data input' + 1Y3: + desc: 'bus output' + 2A2: + desc: 'data input' + 1Y2: + desc: 'bus output' + 2A1: + desc: 'data input' + 1Y1: + desc: 'bus output' + 2A0: + desc: 'data input' + 1Y0: + desc: 'bus output' + '2~OE': + desc: 'output enable (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nAn to nYn - val: [9 (74HC), 11 (74HCT)] - unit: ns + - + param: 'Propagation delay, nAn to nYn' + val: + - '9 (74HC)' + - '11 (74HCT)' + unit: ns notes: - - Setting 1~OE or 2~OE high causes the outputs to assume a high-impedance off state. -... + - 'Setting 1~OE or 2~OE high causes the outputs to assume a high-impedance off state.' +packages: + DIP: + - '1~OE' + - 1A0 + - 2Y0 + - 1A1 + - 2Y1 + - 1A2 + - 2Y2 + - 1A3 + - 2Y3 + - GND + - 2A3 + - 1Y3 + - 2A2 + - 1Y2 + - 2A1 + - 1Y1 + - 2A0 + - 1Y0 + - '2~OE' + - Vcc diff --git a/74245.yaml b/74245.yaml index e323324..70cf799 100644 --- a/74245.yaml +++ b/74245.yaml @@ -1,76 +1,77 @@ ---- -description: Octal bus transceiver; 3-state -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc245.74hct245.pdf" +description: 'Octal bus transceiver; 3-state' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc245.74hct245.pdf' pins: - - num: 1 - sym: DIR - desc: direction control - - num: 2 - sym: A0 - desc: data input/output - - num: 3 - sym: A1 - desc: data input/output - - num: 4 - sym: A2 - desc: data input/output - - num: 5 - sym: A3 - desc: data input/output - - num: 6 - sym: A4 - desc: data input/output - - num: 7 - sym: A5 - desc: data input/output - - num: 8 - sym: A6 - desc: data input/output - - num: 9 - sym: A7 - desc: data input/output - - num: 10 - sym: GND + DIR: + desc: 'direction control' + A0: + desc: 'data input/output' + A1: + desc: 'data input/output' + A2: + desc: 'data input/output' + A3: + desc: 'data input/output' + A4: + desc: 'data input/output' + A5: + desc: 'data input/output' + A6: + desc: 'data input/output' + A7: + desc: 'data input/output' + GND: desc: ground - - num: 11 - sym: B7 - desc: data input/output - - num: 12 - sym: B6 - desc: data input/output - - num: 13 - sym: B5 - desc: data input/output - - num: 14 - sym: B4 - desc: data input/output - - num: 15 - sym: B3 - desc: data input/output - - num: 16 - sym: B2 - desc: data input/output - - num: 17 - sym: B1 - desc: data input/output - - num: 18 - sym: B0 - desc: data input/output - - num: 19 - sym: ~OE - desc: output enable (active low) - - num: 20 - sym: Vcc - desc: supply voltage + B7: + desc: 'data input/output' + B6: + desc: 'data input/output' + B5: + desc: 'data input/output' + B4: + desc: 'data input/output' + B3: + desc: 'data input/output' + B2: + desc: 'data input/output' + B1: + desc: 'data input/output' + B0: + desc: 'data input/output' + '~OE': + desc: 'output enable (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, An to Bn or Bn to An - val: [7 (74HC), 10 (74HCT)] - unit: ns + - + param: 'Propagation delay, An to Bn or Bn to An' + val: + - '7 (74HC)' + - '10 (74HCT)' + unit: ns notes: - - When DIR is high, An are inputs. - - When DIR is low, Bn are inputs. - - When ~OE is high, An and Bn are in a high-impedance off state. -... + - 'When DIR is high, An are inputs.' + - 'When DIR is low, Bn are inputs.' + - 'When ~OE is high, An and Bn are in a high-impedance off state.' +packages: + DIP: + - DIR + - A0 + - A1 + - A2 + - A3 + - A4 + - A5 + - A6 + - A7 + - GND + - B7 + - B6 + - B5 + - B4 + - B3 + - B2 + - B1 + - B0 + - '~OE' + - Vcc diff --git a/74251.yaml b/74251.yaml index 02e5890..595cc3f 100644 --- a/74251.yaml +++ b/74251.yaml @@ -1,69 +1,77 @@ ---- -description: 8-input multiplexer; 3-state -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc251.74hct251.pdf" +description: '8-input multiplexer; 3-state' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc251.74hct251.pdf' pins: - - num: 1 - sym: I__3 - desc: multiplexer input - - num: 2 - sym: I__2 - desc: multiplexer input - - num: 3 - sym: I__1 - desc: multiplexer input - - num: 4 - sym: I__0 - desc: multiplexer input - - num: 5 - sym: Y - desc: multiplexer output - - num: 6 - sym: ~Y - desc: complementary multiplexer output - - num: 7 - sym: ~OE - desc: enable input (active low; outputs in high-impedance off state when high) - - num: 8 - sym: GND + 'I__3': + desc: 'multiplexer input' + 'I__2': + desc: 'multiplexer input' + 'I__1': + desc: 'multiplexer input' + 'I__0': + desc: 'multiplexer input' + 'Y': + desc: 'multiplexer output' + '~Y': + desc: 'complementary multiplexer output' + '~OE': + desc: 'enable input (active low; outputs in high-impedance off state when high)' + GND: desc: ground - - num: 9 - sym: S__2 - desc: select input - - num: 10 - sym: S__1 - desc: select input - - num: 11 - sym: S__0 - desc: select input - - num: 12 - sym: I__7 - desc: multiplexer input - - num: 13 - sym: I__6 - desc: multiplexer input - - num: 14 - sym: I__5 - desc: multiplexer input - - num: 15 - sym: I__4 - desc: multiplexer input - - num: 16 - sym: Vcc - desc: supply voltage + 'S__2': + desc: 'select input' + 'S__1': + desc: 'select input' + 'S__0': + desc: 'select input' + 'I__7': + desc: 'multiplexer input' + 'I__6': + desc: 'multiplexer input' + 'I__5': + desc: 'multiplexer input' + 'I__4': + desc: 'multiplexer input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, I__n to Y - val: [15 (74HC), 19 (74HCT)] - unit: ns - - param: Propagation delay, I__n to ~Y - val: [17 (74HC), 19 (74HCT)] - unit: ns - - param: Propagation delay, S__n to Y - val: 20 (74HC/HCT) - unit: ns - - param: Propagation delay, S__n to ~Y - val: [21 (74HC), 21 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, I__n to Y' + val: + - '15 (74HC)' + - '19 (74HCT)' + unit: ns + - + param: 'Propagation delay, I__n to ~Y' + val: + - '17 (74HC)' + - '19 (74HCT)' + unit: ns + - + param: 'Propagation delay, S__n to Y' + val: '20 (74HC/HCT)' + unit: ns + - + param: 'Propagation delay, S__n to ~Y' + val: + - '21 (74HC)' + - '21 (74HCT)' + unit: ns +packages: + DIP: + - 'I__3' + - 'I__2' + - 'I__1' + - 'I__0' + - 'Y' + - '~Y' + - '~OE' + - GND + - 'S__2' + - 'S__1' + - 'S__0' + - 'I__7' + - 'I__6' + - 'I__5' + - 'I__4' + - Vcc diff --git a/74253.yaml b/74253.yaml index b73230f..99a0b6e 100644 --- a/74253.yaml +++ b/74253.yaml @@ -1,65 +1,68 @@ ---- -description: Dual 4-input multiplexer; 3-state -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc253.74hct253.pdf" +description: 'Dual 4-input multiplexer; 3-state' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc253.74hct253.pdf' pins: - - num: 1 - sym: 1~OE - desc: enable input 1 (active low) - - num: 2 - sym: S__1 - desc: common data select input - - num: 3 - sym: 1I__3 - desc: data input from source 1 - - num: 4 - sym: 1I__2 - desc: data input from source 1 - - num: 5 - sym: 1I__1 - desc: data input from source 1 - - num: 6 - sym: 1I__0 - desc: data input from source 1 - - num: 7 - sym: 1Y - desc: multiplexer output from source 1 - - num: 8 - sym: GND + '1~OE': + desc: 'enable input 1 (active low)' + 'S__1': + desc: 'common data select input' + '1I__3': + desc: 'data input from source 1' + '1I__2': + desc: 'data input from source 1' + '1I__1': + desc: 'data input from source 1' + '1I__0': + desc: 'data input from source 1' + 1Y: + desc: 'multiplexer output from source 1' + GND: desc: ground - - num: 9 - sym: 2Y - desc: multiplexer output from source 2 - - num: 10 - sym: 2I__0 - desc: data input from source 2 - - num: 11 - sym: 2I__1 - desc: data input from source 2 - - num: 12 - sym: 2I__2 - desc: data input from source 2 - - num: 13 - sym: 2I__3 - desc: data input from source 2 - - num: 14 - sym: S__0 - desc: common data select input - - num: 15 - sym: 2~OE - desc: enable input 2 (active low) - - num: 16 - sym: Vcc - desc: supply voltage + 2Y: + desc: 'multiplexer output from source 2' + '2I__0': + desc: 'data input from source 2' + '2I__1': + desc: 'data input from source 2' + '2I__2': + desc: 'data input from source 2' + '2I__3': + desc: 'data input from source 2' + 'S__0': + desc: 'common data select input' + '2~OE': + desc: 'enable input 2 (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, 1I__n, 2I__n to nY - val: [17 (74HC/HCT)] - unit: ns - - param: Propagation delay, S__n to nY - val: [18 (74HC), 19 (74HCT)] - unit: ns + - + param: 'Propagation delay, 1I__n, 2I__n to nY' + val: + - '17 (74HC/HCT)' + unit: ns + - + param: 'Propagation delay, S__n to nY' + val: + - '18 (74HC)' + - '19 (74HCT)' + unit: ns notes: - - When 1~OE or 2~OE is high, the outputs are forced to a high-impedance off state. -... + - 'When 1~OE or 2~OE is high, the outputs are forced to a high-impedance off state.' +packages: + DIP: + - '1~OE' + - 'S__1' + - '1I__3' + - '1I__2' + - '1I__1' + - '1I__0' + - 1Y + - GND + - 2Y + - '2I__0' + - '2I__1' + - '2I__2' + - '2I__3' + - 'S__0' + - '2~OE' + - Vcc diff --git a/74257.yaml b/74257.yaml index 99843ae..f045e02 100644 --- a/74257.yaml +++ b/74257.yaml @@ -1,63 +1,67 @@ ---- -description: Quad 2-input multiplexer; 3-state -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc257.74hct257.pdf" +description: 'Quad 2-input multiplexer; 3-state' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc257.74hct257.pdf' pins: - - num: 1 - sym: S - desc: common data select input - - num: 2 - sym: 1I__0 - desc: data input from source 0 - - num: 3 - sym: 1I__1 - desc: data input from source 1 - - num: 4 - sym: 1Y - desc: multiplexer output - - num: 5 - sym: 2I__0 - desc: data input from source 0 - - num: 6 - sym: 2I__1 - desc: data input from source 1 - - num: 7 - sym: 2Y - desc: multiplexer output - - num: 8 - sym: GND + S: + desc: 'common data select input' + '1I__0': + desc: 'data input from source 0' + '1I__1': + desc: 'data input from source 1' + 1Y: + desc: 'multiplexer output' + '2I__0': + desc: 'data input from source 0' + '2I__1': + desc: 'data input from source 1' + 2Y: + desc: 'multiplexer output' + GND: desc: ground - - num: 9 - sym: 3Y - desc: multiplexer output - - num: 10 - sym: 3I__1 - desc: data input from source 1 - - num: 11 - sym: 3I__0 - desc: data input from source 0 - - num: 12 - sym: 4Y - desc: multiplexer output - - num: 13 - sym: 4I__1 - desc: data input from source 1 - - num: 14 - sym: 4I__0 - desc: data input from source 0 - - num: 15 - sym: ~OE - desc: enable input (active low; outputs in high-impedance off state when high) - - num: 16 - sym: Vcc - desc: supply voltage + 3Y: + desc: 'multiplexer output' + '3I__1': + desc: 'data input from source 1' + '3I__0': + desc: 'data input from source 0' + 4Y: + desc: 'multiplexer output' + '4I__1': + desc: 'data input from source 1' + '4I__0': + desc: 'data input from source 0' + '~OE': + desc: 'enable input (active low; outputs in high-impedance off state when high)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nI__0, nI__1 to nY - val: [11 (74HC), 13 (74HCT)] - unit: ns - - param: Propagation delay, S to nY - val: [14 (74HC), 17 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, nI__0, nI__1 to nY' + val: + - '11 (74HC)' + - '13 (74HCT)' + unit: ns + - + param: 'Propagation delay, S to nY' + val: + - '14 (74HC)' + - '17 (74HCT)' + unit: ns +packages: + DIP: + - S + - '1I__0' + - '1I__1' + - 1Y + - '2I__0' + - '2I__1' + - 2Y + - GND + - 3Y + - '3I__1' + - '3I__0' + - 4Y + - '4I__1' + - '4I__0' + - '~OE' + - Vcc diff --git a/74258.yaml b/74258.yaml index 7f6cd80..0c2606c 100644 --- a/74258.yaml +++ b/74258.yaml @@ -1,63 +1,63 @@ ---- -description: Quad 2-input multiplexer; 3-state; inverting -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc258.pdf" +description: 'Quad 2-input multiplexer; 3-state; inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc258.pdf' pins: - - num: 1 - sym: S - desc: common data select input - - num: 2 - sym: 1I__0 - desc: data input from source 0 - - num: 3 - sym: 1I__1 - desc: data input from source 1 - - num: 4 - sym: 1~Y - desc: multiplexer output - - num: 5 - sym: 2I__0 - desc: data input from source 0 - - num: 6 - sym: 2I__1 - desc: data input from source 1 - - num: 7 - sym: 2~Y - desc: multiplexer output - - num: 8 - sym: GND + S: + desc: 'common data select input' + '1I__0': + desc: 'data input from source 0' + '1I__1': + desc: 'data input from source 1' + '1~Y': + desc: 'multiplexer output' + '2I__0': + desc: 'data input from source 0' + '2I__1': + desc: 'data input from source 1' + '2~Y': + desc: 'multiplexer output' + GND: desc: ground - - num: 9 - sym: 3~Y - desc: multiplexer output - - num: 10 - sym: 3I__1 - desc: data input from source 1 - - num: 11 - sym: 3I__0 - desc: data input from source 0 - - num: 12 - sym: 4~Y - desc: multiplexer output - - num: 13 - sym: 4I__1 - desc: data input from source 1 - - num: 14 - sym: 4I__0 - desc: data input from source 0 - - num: 15 - sym: ~OE - desc: enable input (active low; outputs in high-impedance off state when high) - - num: 16 - sym: Vcc - desc: supply voltage + '3~Y': + desc: 'multiplexer output' + '3I__1': + desc: 'data input from source 1' + '3I__0': + desc: 'data input from source 0' + '4~Y': + desc: 'multiplexer output' + '4I__1': + desc: 'data input from source 1' + '4I__0': + desc: 'data input from source 0' + '~OE': + desc: 'enable input (active low; outputs in high-impedance off state when high)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nI__0, nI__1 to n~Y - val: 9 (74HC) - unit: ns - - param: Propagation delay, S to n~Y - val: 14 (74HC) - unit: ns -... + - + param: 'Propagation delay, nI__0, nI__1 to n~Y' + val: '9 (74HC)' + unit: ns + - + param: 'Propagation delay, S to n~Y' + val: '14 (74HC)' + unit: ns +packages: + DIP: + - S + - '1I__0' + - '1I__1' + - '1~Y' + - '2I__0' + - '2I__1' + - '2~Y' + - GND + - '3~Y' + - '3I__1' + - '3I__0' + - '4~Y' + - '4I__1' + - '4I__0' + - '~OE' + - Vcc diff --git a/74259.yaml b/74259.yaml index 7484a02..e71689c 100644 --- a/74259.yaml +++ b/74259.yaml @@ -1,66 +1,73 @@ ---- -description: 8-bit addressable latch -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc259.74hct259.pdf" +description: '8-bit addressable latch' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc259.74hct259.pdf' pins: - - num: 1 - sym: A0 - desc: address input - - num: 2 - sym: A1 - desc: address input - - num: 3 - sym: A2 - desc: address input - - num: 4 - sym: Q0 - desc: latch output - - num: 5 - sym: Q1 - desc: latch output - - num: 6 - sym: Q2 - desc: latch output - - num: 7 - sym: Q3 - desc: latch output - - num: 8 - sym: GND + A0: + desc: 'address input' + A1: + desc: 'address input' + A2: + desc: 'address input' + Q0: + desc: 'latch output' + Q1: + desc: 'latch output' + Q2: + desc: 'latch output' + Q3: + desc: 'latch output' + GND: desc: ground - - num: 9 - sym: Q4 - desc: latch output - - num: 10 - sym: Q5 - desc: latch output - - num: 11 - sym: Q6 - desc: latch output - - num: 12 - sym: Q7 - desc: latch output - - num: 13 - sym: D - desc: data input - - num: 14 - sym: ~LE - desc: latch enable input (active low) - - num: 15 - sym: ~MR - desc: conditional reset input (active low) - - num: 16 - sym: Vcc - desc: supply voltage + Q4: + desc: 'latch output' + Q5: + desc: 'latch output' + Q6: + desc: 'latch output' + Q7: + desc: 'latch output' + D: + desc: 'data input' + '~LE': + desc: 'latch enable input (active low)' + '~MR': + desc: 'conditional reset input (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, D to Qn - val: [18 (74HC), 20 (74HCT)] - unit: ns - - param: Propagation delay, An to Qn - val: [17 (74HC), 20 (74HCT)] - unit: ns - - param: Propagation delay, ~LE to Qn - val: [17 (74HC), 20 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, D to Qn' + val: + - '18 (74HC)' + - '20 (74HCT)' + unit: ns + - + param: 'Propagation delay, An to Qn' + val: + - '17 (74HC)' + - '20 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~LE to Qn' + val: + - '17 (74HC)' + - '20 (74HCT)' + unit: ns +packages: + DIP: + - A0 + - A1 + - A2 + - Q0 + - Q1 + - Q2 + - Q3 + - GND + - Q4 + - Q5 + - Q6 + - Q7 + - D + - '~LE' + - '~MR' + - Vcc diff --git a/7427.yaml b/7427.yaml index fc760e1..810cd53 100644 --- a/7427.yaml +++ b/7427.yaml @@ -1,54 +1,55 @@ ---- -description: Triple 3-input NOR gate -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.nxp.com/acrobat_download/datasheets/74HC_HCT27_3.pdf" +description: 'Triple 3-input NOR gate' +family: '7400' +datasheet: 'http://www.nxp.com/acrobat_download/datasheets/74HC_HCT27_3.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: 2A - desc: data input - - num: 4 - sym: 2B - desc: data input - - num: 5 - sym: 2C - desc: data input - - num: 6 - sym: 2Y - desc: data output - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 2C: + desc: 'data input' + 2Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 3Y - desc: data output - - num: 9 - sym: 3A - desc: data input - - num: 10 - sym: 3B - desc: data input - - num: 11 - sym: 3C - desc: data input - - num: 12 - sym: 1Y - desc: data output - - num: 13 - sym: 1C - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage + 3Y: + desc: 'data output' + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 3C: + desc: 'data input' + 1Y: + desc: 'data output' + 1C: + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA, nB, nC to nY - val: [8 (74HC), 10 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, nA, nB, nC to nY' + val: + - '8 (74HC)' + - '10 (74HCT)' + unit: ns +packages: + DIP: + - 1A + - 1B + - 2A + - 2B + - 2C + - 2Y + - GND + - 3Y + - 3A + - 3B + - 3C + - 1Y + - 1C + - Vcc diff --git a/74273.yaml b/74273.yaml index efc25f9..82638d1 100644 --- a/74273.yaml +++ b/74273.yaml @@ -1,75 +1,77 @@ ---- -description: Octal D-type flip-flop with reset; positive-edge trigger -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc273.74hct273.pdf" +description: 'Octal D-type flip-flop with reset; positive-edge trigger' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc273.74hct273.pdf' pins: - - num: 1 - sym: ~MR - desc: master reset input (active low) - - num: 2 - sym: Q0 - desc: flip-flop output - - num: 3 - sym: D0 - desc: data input - - num: 4 - sym: D1 - desc: data input - - num: 5 - sym: Q1 - desc: flip-flop output - - num: 6 - sym: Q2 - desc: flip-flop output - - num: 7 - sym: D2 - desc: data input - - num: 8 - sym: D3 - desc: data input - - num: 9 - sym: Q3 - desc: flip-flop output - - num: 10 - sym: GND + '~MR': + desc: 'master reset input (active low)' + Q0: + desc: 'flip-flop output' + D0: + desc: 'data input' + D1: + desc: 'data input' + Q1: + desc: 'flip-flop output' + Q2: + desc: 'flip-flop output' + D2: + desc: 'data input' + D3: + desc: 'data input' + Q3: + desc: 'flip-flop output' + GND: desc: ground - - num: 11 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 12 - sym: Q4 - desc: flip-flop output - - num: 13 - sym: D4 - desc: data input - - num: 14 - sym: D5 - desc: data input - - num: 15 - sym: Q5 - desc: flip-flop output - - num: 16 - sym: Q6 - desc: flip-flop output - - num: 17 - sym: D6 - desc: data input - - num: 18 - sym: D7 - desc: data input - - num: 19 - sym: Q7 - desc: flip-flop output - - num: 20 - sym: Vcc - desc: supply voltage + CP: + desc: 'clock input (low-to-high, edge-triggered)' + Q4: + desc: 'flip-flop output' + D4: + desc: 'data input' + D5: + desc: 'data input' + Q5: + desc: 'flip-flop output' + Q6: + desc: 'flip-flop output' + D6: + desc: 'data input' + D7: + desc: 'data input' + Q7: + desc: 'flip-flop output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to Qn - val: 15 (74HC/HCT) - unit: ns - - param: Maximum clock frequency - val: [66 (74HC), 36 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, CP to Qn' + val: '15 (74HC/HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '66 (74HC)' + - '36 (74HCT)' + unit: MHz +packages: + DIP: + - '~MR' + - Q0 + - D0 + - D1 + - Q1 + - Q2 + - D2 + - D3 + - Q3 + - GND + - CP + - Q4 + - D4 + - D5 + - Q5 + - Q6 + - D6 + - D7 + - Q7 + - Vcc diff --git a/74280.yaml b/74280.yaml index 7c3ad1a..fa8ba18 100644 --- a/74280.yaml +++ b/74280.yaml @@ -1,57 +1,59 @@ ---- -description: 9-bit odd/even parity generator/checker -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc280.74hct280.pdf" +description: '9-bit odd/even parity generator/checker' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc280.74hct280.pdf' pins: - - num: 1 - sym: I__6 - desc: data input - - num: 2 - sym: I__7 - desc: data input - - num: 3 - sym: NC - desc: no connection - - num: 4 - sym: I__8 - desc: data input - - num: 5 - sym: "Σ__E" - desc: even parity output - - num: 6 - sym: "Σ__O" - desc: odd parity output - - num: 7 - sym: GND + 'I__6': + desc: 'data input' + 'I__7': + desc: 'data input' + 'I__8': + desc: 'data input' + 'Σ__E': + desc: 'even parity output' + 'Σ__O': + desc: 'odd parity output' + GND: desc: ground - - num: 8 - sym: I__0 - desc: data input - - num: 9 - sym: I__1 - desc: data input - - num: 10 - sym: I__2 - desc: data input - - num: 11 - sym: I__3 - desc: data input - - num: 12 - sym: I__4 - desc: data input - - num: 13 - sym: I__5 - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage + 'I__0': + desc: 'data input' + 'I__1': + desc: 'data input' + 'I__2': + desc: 'data input' + 'I__3': + desc: 'data input' + 'I__4': + desc: 'data input' + 'I__5': + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, I__n to Σ__E - val: [17 (74HC), 18 (74HCT)] - unit: ns - - param: Propagation delay, I__n to Σ__O - val: [20 (74HC), 22 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, I__n to Σ__E' + val: + - '17 (74HC)' + - '18 (74HCT)' + unit: ns + - + param: 'Propagation delay, I__n to Σ__O' + val: + - '20 (74HC)' + - '22 (74HCT)' + unit: ns +packages: + DIP: + - 'I__6' + - 'I__7' + - NC + - 'I__8' + - 'Σ__E' + - 'Σ__O' + - GND + - 'I__0' + - 'I__1' + - 'I__2' + - 'I__3' + - 'I__4' + - 'I__5' + - Vcc diff --git a/74283.yaml b/74283.yaml index 874927d..67c7cfb 100644 --- a/74283.yaml +++ b/74283.yaml @@ -1,78 +1,97 @@ ---- -description: 4-bit binary full adder with fast carry -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc283.pdf" +description: '4-bit binary full adder with fast carry' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc283.pdf' pins: - - num: 1 - sym: S2 - desc: sum output - - num: 2 - sym: B2 - desc: B operand input - - num: 3 - sym: A2 - desc: A operand input - - num: 4 - sym: S1 - desc: sum output - - num: 5 - sym: A1 - desc: A operand input - - num: 6 - sym: B1 - desc: B operand input - - num: 7 - sym: CIN - desc: carry input - - num: 8 - sym: GND + S2: + desc: 'sum output' + B2: + desc: 'B operand input' + A2: + desc: 'A operand input' + S1: + desc: 'sum output' + A1: + desc: 'A operand input' + B1: + desc: 'B operand input' + CIN: + desc: 'carry input' + GND: desc: ground - - num: 9 - sym: COUT - desc: carry output - - num: 10 - sym: S4 - desc: sum output - - num: 11 - sym: B4 - desc: B operand input - - num: 12 - sym: A4 - desc: A operand input - - num: 13 - sym: S3 - desc: sum output - - num: 14 - sym: A3 - desc: A operand input - - num: 15 - sym: B3 - desc: B operand input - - num: 16 - sym: Vcc - desc: supply voltage + COUT: + desc: 'carry output' + S4: + desc: 'sum output' + B4: + desc: 'B operand input' + A4: + desc: 'A operand input' + S3: + desc: 'sum output' + A3: + desc: 'A operand input' + B3: + desc: 'B operand input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CIN to S1 - val: [16 (74HC), 15 (74HCT)] - unit: ns - - param: Propagation delay, CIN to S2 - val: [18 (74HC), 21 (74HCT)] - unit: ns - - param: Propagation delay, CIN to S3 - val: [20 (74HC), 23 (74HCT)] - unit: ns - - param: Propagation delay, CIN to S4 - val: [23 (74HC), 27 (74HCT)] - unit: ns - - param: Propagation delay, An, Bn to Sn - val: [21 (74HC), 25 (74HCT)] - unit: ns - - param: Propagation delay, CIN to COUT - val: [20 (74HC), 23 (74HCT)] - unit: ns - - param: Propagation delay, An, Bn to COUT - val: [20 (74HC), 24 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, CIN to S1' + val: + - '16 (74HC)' + - '15 (74HCT)' + unit: ns + - + param: 'Propagation delay, CIN to S2' + val: + - '18 (74HC)' + - '21 (74HCT)' + unit: ns + - + param: 'Propagation delay, CIN to S3' + val: + - '20 (74HC)' + - '23 (74HCT)' + unit: ns + - + param: 'Propagation delay, CIN to S4' + val: + - '23 (74HC)' + - '27 (74HCT)' + unit: ns + - + param: 'Propagation delay, An, Bn to Sn' + val: + - '21 (74HC)' + - '25 (74HCT)' + unit: ns + - + param: 'Propagation delay, CIN to COUT' + val: + - '20 (74HC)' + - '23 (74HCT)' + unit: ns + - + param: 'Propagation delay, An, Bn to COUT' + val: + - '20 (74HC)' + - '24 (74HCT)' + unit: ns +packages: + DIP: + - S2 + - B2 + - A2 + - S1 + - A1 + - B1 + - CIN + - GND + - COUT + - S4 + - B4 + - A4 + - S3 + - A3 + - B3 + - Vcc diff --git a/74299.yaml b/74299.yaml index 1f4eeb2..eb9e5fd 100644 --- a/74299.yaml +++ b/74299.yaml @@ -1,86 +1,96 @@ ---- -description: 8-bit universal shift register; 3-state -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc299.74hct299.pdf" +description: '8-bit universal shift register; 3-state' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc299.74hct299.pdf' pins: - - num: 1 - sym: S0 - desc: mode select input - - num: 2 - sym: ~OE~1 - desc: output enable (active low) - - num: 3 - sym: ~OE~2 - desc: output enable (active low) - - num: 4 - sym: I/O6 - desc: parallel data input/output - - num: 5 - sym: I/O4 - desc: parallel data input/output - - num: 6 - sym: I/O2 - desc: parallel data input/output - - num: 7 - sym: I/O0 - desc: parallel data input/output - - num: 8 - sym: Q0 - desc: serial output (standard output) - - num: 9 - sym: ~MR - desc: asynchronous master reset (active low) - - num: 10 - sym: GND + S0: + desc: 'mode select input' + '~OE~1': + desc: 'output enable (active low)' + '~OE~2': + desc: 'output enable (active low)' + I/O6: + desc: 'parallel data input/output' + I/O4: + desc: 'parallel data input/output' + I/O2: + desc: 'parallel data input/output' + I/O0: + desc: 'parallel data input/output' + Q0: + desc: 'serial output (standard output)' + '~MR': + desc: 'asynchronous master reset (active low)' + GND: desc: ground - - num: 11 - sym: DSR - desc: serial data shift-right input - - num: 12 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 13 - sym: I/O1 - desc: parallel data input/output - - num: 14 - sym: I/O3 - desc: parallel data input/output - - num: 15 - sym: I/O5 - desc: parallel data input/output - - num: 16 - sym: I/O7 - desc: parallel data input/output - - num: 17 - sym: Q7 - desc: serial output (standard output) - - num: 18 - sym: DSL - desc: serial data shift-left input - - num: 19 - sym: S1 - desc: mode select input - - num: 20 - sym: Vcc - desc: supply voltage + DSR: + desc: 'serial data shift-right input' + CP: + desc: 'clock input (low-to-high, edge-triggered)' + I/O1: + desc: 'parallel data input/output' + I/O3: + desc: 'parallel data input/output' + I/O5: + desc: 'parallel data input/output' + I/O7: + desc: 'parallel data input/output' + Q7: + desc: 'serial output (standard output)' + DSL: + desc: 'serial data shift-left input' + S1: + desc: 'mode select input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to Q0, Q7 - val: [20 (74HC), 19 (74HCT)] - unit: ns - - param: Propagation delay, CP to I/On - val: [20 (74HC), 19 (74HCT)] - unit: ns - - param: Propagation delay, ~MR to Q0, Q7, I/On - val: [20 (74HC), 23 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [50 (74HC), 46 (74HCT)] - unit: MHz + - + param: 'Propagation delay, CP to Q0, Q7' + val: + - '20 (74HC)' + - '19 (74HCT)' + unit: ns + - + param: 'Propagation delay, CP to I/On' + val: + - '20 (74HC)' + - '19 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~MR to Q0, Q7, I/On' + val: + - '20 (74HC)' + - '23 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '50 (74HC)' + - '46 (74HCT)' + unit: MHz notes: - - S1 and S0 are low; hold (do nothing) - - "S1 is high and S0 is low; shift left (DSL → Q7, Q7 → Q6...)" - - "S1 is low and S0 is high; shift right (DSR → Q0, Q0 → Q1...)" - - "S1 and S0 are high; parallel load (I/On → Qn)" -... + - 'S1 and S0 are low; hold (do nothing)' + - 'S1 is high and S0 is low; shift left (DSL → Q7, Q7 → Q6...)' + - 'S1 is low and S0 is high; shift right (DSR → Q0, Q0 → Q1...)' + - 'S1 and S0 are high; parallel load (I/On → Qn)' +packages: + DIP: + - S0 + - '~OE~1' + - '~OE~2' + - I/O6 + - I/O4 + - I/O2 + - I/O0 + - Q0 + - '~MR' + - GND + - DSR + - CP + - I/O1 + - I/O3 + - I/O5 + - I/O7 + - Q7 + - DSL + - S1 + - Vcc diff --git a/7430.yaml b/7430.yaml index f83a617..a6ed816 100644 --- a/7430.yaml +++ b/7430.yaml @@ -1,54 +1,49 @@ ---- -description: 8-input NAND gate -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc30.74hct30.pdf" +description: '8-input NAND gate' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc30.74hct30.pdf' pins: - - num: 1 - sym: A - desc: data input - - num: 2 - sym: B - desc: data input - - num: 3 - sym: C - desc: data input - - num: 4 - sym: D - desc: data input - - num: 5 - sym: E - desc: data input - - num: 6 - sym: F - desc: data input - - num: 7 - sym: GND + A: + desc: 'data input' + B: + desc: 'data input' + C: + desc: 'data input' + D: + desc: 'data input' + E: + desc: 'data input' + F: + desc: 'data input' + GND: desc: ground - - num: 8 - sym: Y - desc: data output - - num: 9 - sym: NC - desc: no connection - - num: 10 - sym: NC - desc: no connection - - num: 11 - sym: G - desc: data input - - num: 12 - sym: H - desc: data input - - num: 13 - sym: NC - desc: no connection - - num: 14 - sym: Vcc - desc: supply voltage + 'Y': + desc: 'data output' + G: + desc: 'data input' + H: + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, A, B, C, D, E, F, G, H, to Y - val: [12 (74HC), 12 (74HCT)] + - + param: 'Propagation delay, A, B, C, D, E, F, G, H, to Y' + val: + - '12 (74HC)' + - '12 (74HCT)' unit: ns -... +packages: + DIP: + - A + - B + - C + - D + - E + - F + - GND + - 'Y' + - NC + - NC + - G + - H + - NC + - Vcc diff --git a/7432.yaml b/7432.yaml index f34be38..690bd76 100644 --- a/7432.yaml +++ b/7432.yaml @@ -1,54 +1,55 @@ ---- -description: Quad 2-input OR gate -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc32.74hct32.pdf" +description: 'Quad 2-input OR gate' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc32.74hct32.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 1B - desc: data input - - num: 3 - sym: 1Y - desc: data output - - num: 4 - sym: 2A - desc: data input - - num: 5 - sym: 2B - desc: data input - - num: 6 - sym: 2Y - desc: data output - - num: 7 - sym: GND + 1A: + desc: 'data input' + 1B: + desc: 'data input' + 1Y: + desc: 'data output' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 2Y: + desc: 'data output' + GND: desc: ground - - num: 8 - sym: 3Y - desc: data output - - num: 9 - sym: 3A - desc: data input - - num: 10 - sym: 3B - desc: data input - - num: 11 - sym: 4Y - desc: data output - - num: 12 - sym: 4A - desc: data input - - num: 13 - sym: 4B - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage + 3Y: + desc: 'data output' + 3A: + desc: 'data input' + 3B: + desc: 'data input' + 4Y: + desc: 'data output' + 4A: + desc: 'data input' + 4B: + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA, nB to nY - val: [6 (74HC), 9 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, nA, nB to nY' + val: + - '6 (74HC)' + - '9 (74HCT)' + unit: ns +packages: + DIP: + - 1A + - 1B + - 1Y + - 2A + - 2B + - 2Y + - GND + - 3Y + - 3A + - 3B + - 4Y + - 4A + - 4B + - Vcc diff --git a/74365.yaml b/74365.yaml index 2295f90..32e3d4c 100644 --- a/74365.yaml +++ b/74365.yaml @@ -1,62 +1,63 @@ ---- -description: Hex buffer/line driver; 3-state; non-inverting -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc365.74hct365.pdf" +description: 'Hex buffer/line driver; 3-state; non-inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc365.74hct365.pdf' pins: - - num: 1 - sym: ~OE~__1 - desc: output enable (active low) - - num: 2 - sym: 1A - desc: data input - - num: 3 - sym: 1Y - desc: bus output - - num: 4 - sym: 2A - desc: data input - - num: 5 - sym: 2Y - desc: bus output - - num: 6 - sym: 3A - desc: data input - - num: 7 - sym: 3Y - desc: bus output - - num: 8 - sym: GND + '~OE~__1': + desc: 'output enable (active low)' + 1A: + desc: 'data input' + 1Y: + desc: 'bus output' + 2A: + desc: 'data input' + 2Y: + desc: 'bus output' + 3A: + desc: 'data input' + 3Y: + desc: 'bus output' + GND: desc: ground - - num: 9 - sym: 4Y - desc: bus output - - num: 10 - sym: 4A - desc: data input - - num: 11 - sym: 5Y - desc: bus output - - num: 12 - sym: 5A - desc: data input - - num: 13 - sym: 6Y - desc: bus output - - num: 14 - sym: 6A - desc: data input - - num: 15 - sym: ~OE~__2 - desc: output enable (active low) - - num: 16 - sym: Vcc - desc: supply voltage + 4Y: + desc: 'bus output' + 4A: + desc: 'data input' + 5Y: + desc: 'bus output' + 5A: + desc: 'data input' + 6Y: + desc: 'bus output' + 6A: + desc: 'data input' + '~OE~__2': + desc: 'output enable (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA to nY - val: [9 (74HC), 11 (74HCT)] - unit: ns + - + param: 'Propagation delay, nA to nY' + val: + - '9 (74HC)' + - '11 (74HCT)' + unit: ns notes: - - Setting ~OE~__1 or ~OE~__2 high causes the outputs to assume a high-impedance off state. -... + - 'Setting ~OE~__1 or ~OE~__2 high causes the outputs to assume a high-impedance off state.' +packages: + DIP: + - '~OE~__1' + - 1A + - 1Y + - 2A + - 2Y + - 3A + - 3Y + - GND + - 4Y + - 4A + - 5Y + - 5A + - 6Y + - 6A + - '~OE~__2' + - Vcc diff --git a/74366.yaml b/74366.yaml index 4ebfcb7..bb8a575 100644 --- a/74366.yaml +++ b/74366.yaml @@ -1,62 +1,63 @@ ---- -description: Hex buffer/line driver; 3-state; inverting -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc366.74hct366.pdf" +description: 'Hex buffer/line driver; 3-state; inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc366.74hct366.pdf' pins: - - num: 1 - sym: ~OE~__1 - desc: output enable (active low) - - num: 2 - sym: 1A - desc: data input - - num: 3 - sym: 1Y - desc: bus output - - num: 4 - sym: 2A - desc: data input - - num: 5 - sym: 2Y - desc: bus output - - num: 6 - sym: 3A - desc: data input - - num: 7 - sym: 3Y - desc: bus output - - num: 8 - sym: GND + '~OE~__1': + desc: 'output enable (active low)' + 1A: + desc: 'data input' + 1Y: + desc: 'bus output' + 2A: + desc: 'data input' + 2Y: + desc: 'bus output' + 3A: + desc: 'data input' + 3Y: + desc: 'bus output' + GND: desc: ground - - num: 9 - sym: 4Y - desc: bus output - - num: 10 - sym: 4A - desc: data input - - num: 11 - sym: 5Y - desc: bus output - - num: 12 - sym: 5A - desc: data input - - num: 13 - sym: 6Y - desc: bus output - - num: 14 - sym: 6A - desc: data input - - num: 15 - sym: ~OE~__2 - desc: output enable (active low) - - num: 16 - sym: Vcc - desc: supply voltage + 4Y: + desc: 'bus output' + 4A: + desc: 'data input' + 5Y: + desc: 'bus output' + 5A: + desc: 'data input' + 6Y: + desc: 'bus output' + 6A: + desc: 'data input' + '~OE~__2': + desc: 'output enable (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA to nY - val: [10 (74HC), 11 (74HCT)] - unit: ns + - + param: 'Propagation delay, nA to nY' + val: + - '10 (74HC)' + - '11 (74HCT)' + unit: ns notes: - - Setting ~OE~__1 or ~OE~__2 high causes the outputs to assume a high-impedance off state. -... + - 'Setting ~OE~__1 or ~OE~__2 high causes the outputs to assume a high-impedance off state.' +packages: + DIP: + - '~OE~__1' + - 1A + - 1Y + - 2A + - 2Y + - 3A + - 3Y + - GND + - 4Y + - 4A + - 5Y + - 5A + - 6Y + - 6A + - '~OE~__2' + - Vcc diff --git a/74367.yaml b/74367.yaml index b9eb949..3c0f815 100644 --- a/74367.yaml +++ b/74367.yaml @@ -1,62 +1,63 @@ ---- -description: Hex buffer/line driver; 3-state; non-inverting -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc367.74hct367.pdf" +description: 'Hex buffer/line driver; 3-state; non-inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc367.74hct367.pdf' pins: - - num: 1 - sym: ~OE~__1 - desc: output enable (active low) - - num: 2 - sym: 1A - desc: data input - - num: 3 - sym: 1Y - desc: bus output - - num: 4 - sym: 2A - desc: data input - - num: 5 - sym: 2Y - desc: bus output - - num: 6 - sym: 3A - desc: data input - - num: 7 - sym: 3Y - desc: bus output - - num: 8 - sym: GND + '~OE~__1': + desc: 'output enable (active low)' + 1A: + desc: 'data input' + 1Y: + desc: 'bus output' + 2A: + desc: 'data input' + 2Y: + desc: 'bus output' + 3A: + desc: 'data input' + 3Y: + desc: 'bus output' + GND: desc: ground - - num: 9 - sym: 4Y - desc: bus output - - num: 10 - sym: 4A - desc: data input - - num: 11 - sym: 5Y - desc: bus output - - num: 12 - sym: 5A - desc: data input - - num: 13 - sym: 6Y - desc: bus output - - num: 14 - sym: 6A - desc: data input - - num: 15 - sym: ~OE~__2 - desc: output enable (active low) - - num: 16 - sym: Vcc - desc: supply voltage + 4Y: + desc: 'bus output' + 4A: + desc: 'data input' + 5Y: + desc: 'bus output' + 5A: + desc: 'data input' + 6Y: + desc: 'bus output' + 6A: + desc: 'data input' + '~OE~__2': + desc: 'output enable (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA to nY - val: [8 (74HC), 11 (74HCT)] - unit: ns + - + param: 'Propagation delay, nA to nY' + val: + - '8 (74HC)' + - '11 (74HCT)' + unit: ns notes: - - Setting ~OE~__1 or ~OE~__2 high causes the outputs to assume a high-impedance off state. -... + - 'Setting ~OE~__1 or ~OE~__2 high causes the outputs to assume a high-impedance off state.' +packages: + DIP: + - '~OE~__1' + - 1A + - 1Y + - 2A + - 2Y + - 3A + - 3Y + - GND + - 4Y + - 4A + - 5Y + - 5A + - 6Y + - 6A + - '~OE~__2' + - Vcc diff --git a/74368.yaml b/74368.yaml index 80ea3a8..e36362d 100644 --- a/74368.yaml +++ b/74368.yaml @@ -1,62 +1,63 @@ ---- -description: Hex buffer/line driver; 3-state; inverting -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc368.74hct368.pdf" +description: 'Hex buffer/line driver; 3-state; inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc368.74hct368.pdf' pins: - - num: 1 - sym: ~OE~__1 - desc: output enable (active low) - - num: 2 - sym: 1A - desc: data input - - num: 3 - sym: 1Y - desc: bus output - - num: 4 - sym: 2A - desc: data input - - num: 5 - sym: 2Y - desc: bus output - - num: 6 - sym: 3A - desc: data input - - num: 7 - sym: 3Y - desc: bus output - - num: 8 - sym: GND + '~OE~__1': + desc: 'output enable (active low)' + 1A: + desc: 'data input' + 1Y: + desc: 'bus output' + 2A: + desc: 'data input' + 2Y: + desc: 'bus output' + 3A: + desc: 'data input' + 3Y: + desc: 'bus output' + GND: desc: ground - - num: 9 - sym: 4Y - desc: bus output - - num: 10 - sym: 4A - desc: data input - - num: 11 - sym: 5Y - desc: bus output - - num: 12 - sym: 5A - desc: data input - - num: 13 - sym: 6Y - desc: bus output - - num: 14 - sym: 6A - desc: data input - - num: 15 - sym: ~OE~__2 - desc: output enable (active low) - - num: 16 - sym: Vcc - desc: supply voltage + 4Y: + desc: 'bus output' + 4A: + desc: 'data input' + 5Y: + desc: 'bus output' + 5A: + desc: 'data input' + 6Y: + desc: 'bus output' + 6A: + desc: 'data input' + '~OE~__2': + desc: 'output enable (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nA to nY - val: [9 (74HC), 11 (74HCT)] - unit: ns + - + param: 'Propagation delay, nA to nY' + val: + - '9 (74HC)' + - '11 (74HCT)' + unit: ns notes: - - Setting ~OE~__1 or ~OE~__2 high causes the outputs to assume a high-impedance off state. -... + - 'Setting ~OE~__1 or ~OE~__2 high causes the outputs to assume a high-impedance off state.' +packages: + DIP: + - '~OE~__1' + - 1A + - 1Y + - 2A + - 2Y + - 3A + - 3Y + - GND + - 4Y + - 4A + - 5Y + - 5A + - 6Y + - 6A + - '~OE~__2' + - Vcc diff --git a/74373.yaml b/74373.yaml index f3454db..7f39183 100644 --- a/74373.yaml +++ b/74373.yaml @@ -1,75 +1,79 @@ ---- -description: Octal D-type transparent latch; 3-state -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc373.74hct373.pdf" +description: 'Octal D-type transparent latch; 3-state' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc373.74hct373.pdf' pins: - - num: 1 - sym: ~OE - desc: output enable (active low) - - num: 2 - sym: Q0 - desc: latch output - - num: 3 - sym: D0 - desc: data input - - num: 4 - sym: D1 - desc: data input - - num: 5 - sym: Q1 - desc: latch output - - num: 6 - sym: Q2 - desc: latch output - - num: 7 - sym: D2 - desc: data input - - num: 8 - sym: D3 - desc: data input - - num: 9 - sym: Q3 - desc: latch output - - num: 10 - sym: GND + '~OE': + desc: 'output enable (active low)' + Q0: + desc: 'latch output' + D0: + desc: 'data input' + D1: + desc: 'data input' + Q1: + desc: 'latch output' + Q2: + desc: 'latch output' + D2: + desc: 'data input' + D3: + desc: 'data input' + Q3: + desc: 'latch output' + GND: desc: ground - - num: 11 - sym: LE - desc: latch enable (active high) - - num: 12 - sym: Q4 - desc: latch output - - num: 13 - sym: D4 - desc: data input - - num: 14 - sym: D5 - desc: data input - - num: 15 - sym: Q5 - desc: latch output - - num: 16 - sym: Q6 - desc: latch output - - num: 17 - sym: D6 - desc: data input - - num: 18 - sym: D7 - desc: data input - - num: 19 - sym: Q7 - desc: latch output - - num: 20 - sym: Vcc - desc: supply voltage + LE: + desc: 'latch enable (active high)' + Q4: + desc: 'latch output' + D4: + desc: 'data input' + D5: + desc: 'data input' + Q5: + desc: 'latch output' + Q6: + desc: 'latch output' + D6: + desc: 'data input' + D7: + desc: 'data input' + Q7: + desc: 'latch output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, Dn to Qn - val: [12 (74HC), 14 (74HCT)] - unit: ns - - param: Propagation delay, LE to Qn - val: [15 (74HC), 13 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, Dn to Qn' + val: + - '12 (74HC)' + - '14 (74HCT)' + unit: ns + - + param: 'Propagation delay, LE to Qn' + val: + - '15 (74HC)' + - '13 (74HCT)' + unit: ns +packages: + DIP: + - '~OE' + - Q0 + - D0 + - D1 + - Q1 + - Q2 + - D2 + - D3 + - Q3 + - GND + - LE + - Q4 + - D4 + - D5 + - Q5 + - Q6 + - D6 + - D7 + - Q7 + - Vcc diff --git a/74374.yaml b/74374.yaml index f846b23..81aba10 100644 --- a/74374.yaml +++ b/74374.yaml @@ -1,75 +1,79 @@ ---- -description: Octal D-type flip-flop; positive-edge trigger; 3-state -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc374.74hct374.pdf" +description: 'Octal D-type flip-flop; positive-edge trigger; 3-state' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc374.74hct374.pdf' pins: - - num: 1 - sym: ~OE - desc: output enable (active low) - - num: 2 - sym: Q0 - desc: flip-flop output - - num: 3 - sym: D0 - desc: data input - - num: 4 - sym: D1 - desc: data input - - num: 5 - sym: Q1 - desc: flip-flop output - - num: 6 - sym: Q2 - desc: flip-flop output - - num: 7 - sym: D2 - desc: data input - - num: 8 - sym: D3 - desc: data input - - num: 9 - sym: Q3 - desc: flip-flop output - - num: 10 - sym: GND + '~OE': + desc: 'output enable (active low)' + Q0: + desc: 'flip-flop output' + D0: + desc: 'data input' + D1: + desc: 'data input' + Q1: + desc: 'flip-flop output' + Q2: + desc: 'flip-flop output' + D2: + desc: 'data input' + D3: + desc: 'data input' + Q3: + desc: 'flip-flop output' + GND: desc: ground - - num: 11 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 12 - sym: Q4 - desc: flip-flop output - - num: 13 - sym: D4 - desc: data input - - num: 14 - sym: D5 - desc: data input - - num: 15 - sym: Q5 - desc: flip-flop output - - num: 16 - sym: Q6 - desc: flip-flop output - - num: 17 - sym: D6 - desc: data input - - num: 18 - sym: D7 - desc: data input - - num: 19 - sym: Q7 - desc: flip-flop output - - num: 20 - sym: Vcc - desc: supply voltage + CP: + desc: 'clock input (low-to-high, edge-triggered)' + Q4: + desc: 'flip-flop output' + D4: + desc: 'data input' + D5: + desc: 'data input' + Q5: + desc: 'flip-flop output' + Q6: + desc: 'flip-flop output' + D6: + desc: 'data input' + D7: + desc: 'data input' + Q7: + desc: 'flip-flop output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to Qn - val: [15 (74HC), 13 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [77 (74HC), 48 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, CP to Qn' + val: + - '15 (74HC)' + - '13 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '77 (74HC)' + - '48 (74HCT)' + unit: MHz +packages: + DIP: + - '~OE' + - Q0 + - D0 + - D1 + - Q1 + - Q2 + - D2 + - D3 + - Q3 + - GND + - CP + - Q4 + - D4 + - D5 + - Q5 + - Q6 + - D6 + - D7 + - Q7 + - Vcc diff --git a/74377.yaml b/74377.yaml index 0d3d91c..a4ea186 100644 --- a/74377.yaml +++ b/74377.yaml @@ -1,75 +1,79 @@ ---- -description: Octal D-type flip-flop with data enable; positive-edge trigger -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc377.74hct377.pdf" +description: 'Octal D-type flip-flop with data enable; positive-edge trigger' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc377.74hct377.pdf' pins: - - num: 1 - sym: ~E - desc: data enable (active low) - - num: 2 - sym: Q0 - desc: flip-flop output - - num: 3 - sym: D0 - desc: data input - - num: 4 - sym: D1 - desc: data input - - num: 5 - sym: Q1 - desc: flip-flop output - - num: 6 - sym: Q2 - desc: flip-flop output - - num: 7 - sym: D2 - desc: data input - - num: 8 - sym: D3 - desc: data input - - num: 9 - sym: Q3 - desc: flip-flop output - - num: 10 - sym: GND + '~E': + desc: 'data enable (active low)' + Q0: + desc: 'flip-flop output' + D0: + desc: 'data input' + D1: + desc: 'data input' + Q1: + desc: 'flip-flop output' + Q2: + desc: 'flip-flop output' + D2: + desc: 'data input' + D3: + desc: 'data input' + Q3: + desc: 'flip-flop output' + GND: desc: ground - - num: 11 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 12 - sym: Q4 - desc: flip-flop output - - num: 13 - sym: D4 - desc: data input - - num: 14 - sym: D5 - desc: data input - - num: 15 - sym: Q5 - desc: flip-flop output - - num: 16 - sym: Q6 - desc: flip-flop output - - num: 17 - sym: D6 - desc: data input - - num: 18 - sym: D7 - desc: data input - - num: 19 - sym: Q7 - desc: flip-flop output - - num: 20 - sym: Vcc - desc: supply voltage + CP: + desc: 'clock input (low-to-high, edge-triggered)' + Q4: + desc: 'flip-flop output' + D4: + desc: 'data input' + D5: + desc: 'data input' + Q5: + desc: 'flip-flop output' + Q6: + desc: 'flip-flop output' + D6: + desc: 'data input' + D7: + desc: 'data input' + Q7: + desc: 'flip-flop output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to Qn - val: [13 (74HC), 14 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [77 (74HC), 53 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, CP to Qn' + val: + - '13 (74HC)' + - '14 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '77 (74HC)' + - '53 (74HCT)' + unit: MHz +packages: + DIP: + - '~E' + - Q0 + - D0 + - D1 + - Q1 + - Q2 + - D2 + - D3 + - Q3 + - GND + - CP + - Q4 + - D4 + - D5 + - Q5 + - Q6 + - D6 + - D7 + - Q7 + - Vcc diff --git a/74390.yaml b/74390.yaml index 67fc565..9258d9f 100644 --- a/74390.yaml +++ b/74390.yaml @@ -1,75 +1,91 @@ ---- -description: Dual decade ripple counter -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc390.74hct390.pdf" +description: 'Dual decade ripple counter' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc390.74hct390.pdf' pins: - - num: 1 - sym: 1~CP~__0 - desc: clock input, divide-by-2 section (high-to-low, edge-triggered) - - num: 2 - sym: 1MR - desc: asynchronous master reset (active high) - - num: 3 - sym: 1Q__0 - desc: flip-flop output - - num: 4 - sym: 1~CP~__1 - desc: clock input, divide-by-5 section (high-to-low, edge-triggered) - - num: 5 - sym: 1Q__1 - desc: flip-flop output - - num: 6 - sym: 1Q__2 - desc: flip-flop output - - num: 7 - sym: 1Q__3 - desc: flip-flop output - - num: 8 - sym: GND - desc: ground - - num: 9 - sym: 2Q__3 - desc: flip-flop output - - num: 10 - sym: 2Q__2 - desc: flip-flop output - - num: 11 - sym: 2Q__1 - desc: flip-flop output - - num: 12 - sym: 2~CP~__1 - desc: clock input, divide-by-5 section (high-to-low, edge-triggered) - - num: 13 - sym: 2Q__0 - desc: flip-flop output - - num: 14 - sym: 2MR - desc: asynchronous master reset (active high) - - num: 15 - sym: 2~CP~__0 - desc: clock input, divide-by-2 section (high-to-low, edge-triggered) - - num: 16 - sym: Vcc - desc: supply voltage + '1~CP~__0': + desc: 'clock input, divide-by-2 section (high-to-low, edge-triggered)' + 1MR: + desc: 'asynchronous master reset (active high)' + '1Q__0': + desc: 'flip-flop output' + '1~CP~__1': + desc: 'clock input, divide-by-5 section (high-to-low, edge-triggered)' + '1Q__1': + desc: 'flip-flop output' + '1Q__2': + desc: 'flip-flop output' + '1Q__3': + desc: 'flip-flop output' + GND: + desc: ground + '2Q__3': + desc: 'flip-flop output' + '2Q__2': + desc: 'flip-flop output' + '2Q__1': + desc: 'flip-flop output' + '2~CP~__1': + desc: 'clock input, divide-by-5 section (high-to-low, edge-triggered)' + '2Q__0': + desc: 'flip-flop output' + 2MR: + desc: 'asynchronous master reset (active high)' + '2~CP~__0': + desc: 'clock input, divide-by-2 section (high-to-low, edge-triggered)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, n~CP~__0 to nQ__0 - val: [14 (74HC), 18 (74HCT)] - unit: ns - - param: Propagation delay, n~CP~__1 to nQ__1 - val: [15 (74HC), 19 (74HCT)] - unit: ns - - param: Propagation delay, n~CP~__1 to nQ__2 - val: [23 (74HC), 26 (74HCT)] - unit: ns - - param: Propagation delay, n~CP~__1 to nQ__3 - val: [15 (74HC), 19 (74HCT)] - unit: ns - - param: Propagation delay, nMR to nQ__n - val: [16 (74HC), 18 (74HCT)] - unit: ns - - param: Maximum clock frequency, n~CP~__0 and n~CP~__1 - val: [66 (74HC), 61 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, n~CP~__0 to nQ__0' + val: + - '14 (74HC)' + - '18 (74HCT)' + unit: ns + - + param: 'Propagation delay, n~CP~__1 to nQ__1' + val: + - '15 (74HC)' + - '19 (74HCT)' + unit: ns + - + param: 'Propagation delay, n~CP~__1 to nQ__2' + val: + - '23 (74HC)' + - '26 (74HCT)' + unit: ns + - + param: 'Propagation delay, n~CP~__1 to nQ__3' + val: + - '15 (74HC)' + - '19 (74HCT)' + unit: ns + - + param: 'Propagation delay, nMR to nQ__n' + val: + - '16 (74HC)' + - '18 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency, n~CP~__0 and n~CP~__1' + val: + - '66 (74HC)' + - '61 (74HCT)' + unit: MHz +packages: + DIP: + - '1~CP~__0' + - 1MR + - '1Q__0' + - '1~CP~__1' + - '1Q__1' + - '1Q__2' + - '1Q__3' + - GND + - '2Q__3' + - '2Q__2' + - '2Q__1' + - '2~CP~__1' + - '2Q__0' + - 2MR + - '2~CP~__0' + - Vcc diff --git a/74393.yaml b/74393.yaml index ccc464d..e537e2c 100644 --- a/74393.yaml +++ b/74393.yaml @@ -1,63 +1,73 @@ ---- -description: Dual 4-bit binary ripple counter -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc393.74hct393.pdf" +description: 'Dual 4-bit binary ripple counter' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc393.74hct393.pdf' pins: - - num: 1 - sym: 1~CP - desc: clock input (high-to-low, edge-triggered) - - num: 2 - sym: 1MR - desc: asynchronous master reset (active high) - - num: 3 - sym: 1Q0 - desc: flip-flop output - - num: 4 - sym: 1Q1 - desc: flip-flop output - - num: 5 - sym: 1Q2 - desc: flip-flop output - - num: 6 - sym: 1Q3 - desc: flip-flop output - - num: 7 - sym: GND - desc: ground - - num: 8 - sym: 2Q3 - desc: flip-flop output - - num: 9 - sym: 2Q2 - desc: flip-flop output - - num: 10 - sym: 2Q1 - desc: flip-flop output - - num: 11 - sym: 2Q0 - desc: flip-flop output - - num: 12 - sym: 2MR - desc: asynchronous master reset (active high) - - num: 13 - sym: 2~CP - desc: clock input (high-to-low, edge-triggered) - - num: 14 - sym: Vcc - desc: supply voltage + '1~CP': + desc: 'clock input (high-to-low, edge-triggered)' + 1MR: + desc: 'asynchronous master reset (active high)' + 1Q0: + desc: 'flip-flop output' + 1Q1: + desc: 'flip-flop output' + 1Q2: + desc: 'flip-flop output' + 1Q3: + desc: 'flip-flop output' + GND: + desc: ground + 2Q3: + desc: 'flip-flop output' + 2Q2: + desc: 'flip-flop output' + 2Q1: + desc: 'flip-flop output' + 2Q0: + desc: 'flip-flop output' + 2MR: + desc: 'asynchronous master reset (active high)' + '2~CP': + desc: 'clock input (high-to-low, edge-triggered)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, n~CP to nQ0 - val: [12 (74HC), 20 (74HCT)] - unit: ns - - param: Propagation delay, nQx to nQ(x+1) - val: [5 (74HC), 6 (74HCT)] - unit: ns - - param: Propagation delay, nMR to nQx - val: [11 (74HC), 15 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [99 (74HC), 53 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, n~CP to nQ0' + val: + - '12 (74HC)' + - '20 (74HCT)' + unit: ns + - + param: 'Propagation delay, nQx to nQ(x+1)' + val: + - '5 (74HC)' + - '6 (74HCT)' + unit: ns + - + param: 'Propagation delay, nMR to nQx' + val: + - '11 (74HC)' + - '15 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '99 (74HC)' + - '53 (74HCT)' + unit: MHz +packages: + DIP: + - '1~CP' + - 1MR + - 1Q0 + - 1Q1 + - 1Q2 + - 1Q3 + - GND + - 2Q3 + - 2Q2 + - 2Q1 + - 2Q0 + - 2MR + - '2~CP' + - Vcc diff --git a/7442.yaml b/7442.yaml index 170eb7d..7081d92 100644 --- a/7442.yaml +++ b/7442.yaml @@ -1,60 +1,61 @@ ---- -description: BCD to decimal decoder (1-of-10) -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc42.74hct42.pdf" +description: 'BCD to decimal decoder (1-of-10)' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc42.74hct42.pdf' pins: - - num: 1 - sym: ~Y~__0 + '~Y~__0': desc: output - - num: 2 - sym: ~Y~__1 + '~Y~__1': desc: output - - num: 3 - sym: ~Y~__2 + '~Y~__2': desc: output - - num: 4 - sym: ~Y~__3 + '~Y~__3': desc: output - - num: 5 - sym: ~Y~__4 + '~Y~__4': desc: output - - num: 6 - sym: ~Y~__5 + '~Y~__5': desc: output - - num: 7 - sym: ~Y~__6 + '~Y~__6': desc: output - - num: 8 - sym: GND + GND: desc: ground - - num: 9 - sym: ~Y~__7 - desc: output - - num: 10 - sym: ~Y~__8 - desc: output - - num: 11 - sym: ~Y~__9 - desc: output - - num: 12 - sym: A__3 - desc: data input - - num: 13 - sym: A__2 - desc: data input - - num: 14 - sym: A__1 - desc: data input - - num: 15 - sym: A__0 - desc: data input - - num: 16 - sym: Vcc - desc: supply voltage + '~Y~__7': + desc: output + '~Y~__8': + desc: output + '~Y~__9': + desc: output + 'A__3': + desc: 'data input' + 'A__2': + desc: 'data input' + 'A__1': + desc: 'data input' + 'A__0': + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: propagation delay, A__n to ~Y~__n - val: [14 (74HC), 17 (74HCT)] - unit: ns -... + - + param: 'propagation delay, A__n to ~Y~__n' + val: + - '14 (74HC)' + - '17 (74HCT)' + unit: ns +packages: + DIP: + - '~Y~__0' + - '~Y~__1' + - '~Y~__2' + - '~Y~__3' + - '~Y~__4' + - '~Y~__5' + - '~Y~__6' + - GND + - '~Y~__7' + - '~Y~__8' + - '~Y~__9' + - 'A__3' + - 'A__2' + - 'A__1' + - 'A__0' + - Vcc diff --git a/74423.yaml b/74423.yaml index 798a9f3..1836138 100644 --- a/74423.yaml +++ b/74423.yaml @@ -1,74 +1,85 @@ ---- -description: "Dual retriggerable monostable multivibrator with reset" -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc423.74hct423.pdf" +description: 'Dual retriggerable monostable multivibrator with reset' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc423.74hct423.pdf' pins: - - num: 1 - sym: 1~A - desc: negative-edge triggered input 1 - - num: 2 - sym: 1B - desc: positive-edge triggered input 1 - - num: 3 - sym: 1~R~D - desc: direct reset (active low) 1 - - num: 4 - sym: 1~Q - desc: active low output 1 - - num: 5 - sym: 2Q - desc: active high output 2 - - num: 6 - sym: 2CEXT - desc: external capacitor connection 2 - - num: 7 - sym: 2REXT/CEXT - desc: external resistor and capacitor connection 2 - - num: 8 - sym: GND + '1~A': + desc: 'negative-edge triggered input 1' + 1B: + desc: 'positive-edge triggered input 1' + '1~R~D': + desc: 'direct reset (active low) 1' + '1~Q': + desc: 'active low output 1' + 2Q: + desc: 'active high output 2' + 2CEXT: + desc: 'external capacitor connection 2' + 2REXT/CEXT: + desc: 'external resistor and capacitor connection 2' + GND: desc: ground - - num: 9 - sym: 2~A - desc: negative-edge triggered input 2 - - num: 10 - sym: 2B - desc: positive-edge triggered input 2 - - num: 11 - sym: 2~R~D - desc: direct reset (active low) 2 - - num: 12 - sym: 2~Q - desc: active low output 2 - - num: 13 - sym: 1Q - desc: active high output 1 - - num: 14 - sym: 1CEXT - desc: external capacitor connection 1 - - num: 15 - sym: 1REXT/CEXT - desc: external resistor and capacitor connection 1 - - num: 16 - sym: Vcc - desc: supply voltage + '2~A': + desc: 'negative-edge triggered input 2' + 2B: + desc: 'positive-edge triggered input 2' + '2~R~D': + desc: 'direct reset (active low) 2' + '2~Q': + desc: 'active low output 2' + 1Q: + desc: 'active high output 1' + 1CEXT: + desc: 'external capacitor connection 1' + 1REXT/CEXT: + desc: 'external resistor and capacitor connection 1' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, n~R~D, n~A, nB to nQ or n~Q - val: [25 (74HC), 26(74HCT)] - unit: ns - - param: Propagation delay, n~R~D to nQ or n~Q - val: [20 (74HC), 22 (74HCT)] - unit: ns - - param: Output transition time - val: [7 (74HC/HCT)] - unit: ns - - param: Retrigger time n~A, nB - val: [110 (74HC/HCT)] - unit: ns - - param: External timing resistor - val: [2 (min), 1000 (max)] - unit: kΩ + - + param: 'Propagation delay, n~R~D, n~A, nB to nQ or n~Q' + val: + - '25 (74HC)' + - 26(74HCT) + unit: ns + - + param: 'Propagation delay, n~R~D to nQ or n~Q' + val: + - '20 (74HC)' + - '22 (74HCT)' + unit: ns + - + param: 'Output transition time' + val: + - '7 (74HC/HCT)' + unit: ns + - + param: 'Retrigger time n~A, nB' + val: + - '110 (74HC/HCT)' + unit: ns + - + param: 'External timing resistor' + val: + - '2 (min)' + - '1000 (max)' + unit: 'kΩ' notes: - - The 74423 is identical to the 74123, except it cannot be triggered via the reset input. -... + - 'The 74423 is identical to the 74123, except it cannot be triggered via the reset input.' +packages: + DIP: + - '1~A' + - 1B + - '1~R~D' + - '1~Q' + - 2Q + - 2CEXT + - 2REXT/CEXT + - GND + - '2~A' + - 2B + - '2~R~D' + - '2~Q' + - 1Q + - 1CEXT + - 1REXT/CEXT + - Vcc diff --git a/74540.yaml b/74540.yaml index 240374d..d63f301 100644 --- a/74540.yaml +++ b/74540.yaml @@ -1,72 +1,73 @@ ---- -description: Octal buffer/line driver; 3-state; inverting -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc540.74hct540.pdf" +description: 'Octal buffer/line driver; 3-state; inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc540.74hct540.pdf' pins: - - num: 1 - sym: ~OE~1 - desc: output enable (active low) - - num: 2 - sym: A__0 - desc: data input - - num: 3 - sym: A__1 - desc: data input - - num: 4 - sym: A__2 - desc: data input - - num: 5 - sym: A__3 - desc: data input - - num: 6 - sym: A__4 - desc: data input - - num: 7 - sym: A__5 - desc: data input - - num: 8 - sym: A__6 - desc: data input - - num: 9 - sym: A__7 - desc: data input - - num: 10 - sym: GND + '~OE~1': + desc: 'output enable (active low)' + 'A__0': + desc: 'data input' + 'A__1': + desc: 'data input' + 'A__2': + desc: 'data input' + 'A__3': + desc: 'data input' + 'A__4': + desc: 'data input' + 'A__5': + desc: 'data input' + 'A__6': + desc: 'data input' + 'A__7': + desc: 'data input' + GND: desc: ground - - num: 11 - sym: ~Y~__7 - desc: bus output - - num: 12 - sym: ~Y~__6 - desc: bus output - - num: 13 - sym: ~Y~__5 - desc: bus output - - num: 14 - sym: ~Y~__4 - desc: bus output - - num: 15 - sym: ~Y~__3 - desc: bus output - - num: 16 - sym: ~Y~__2 - desc: bus output - - num: 17 - sym: ~Y~__1 - desc: bus output - - num: 18 - sym: ~Y~__0 - desc: bus output - - num: 19 - sym: ~OE~__2 - desc: output enable (active low) - - num: 20 - sym: Vcc - desc: supply voltage + '~Y~__7': + desc: 'bus output' + '~Y~__6': + desc: 'bus output' + '~Y~__5': + desc: 'bus output' + '~Y~__4': + desc: 'bus output' + '~Y~__3': + desc: 'bus output' + '~Y~__2': + desc: 'bus output' + '~Y~__1': + desc: 'bus output' + '~Y~__0': + desc: 'bus output' + '~OE~__2': + desc: 'output enable (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, A__n to ~Y~__n - val: [9 (74HC), 11 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, A__n to ~Y~__n' + val: + - '9 (74HC)' + - '11 (74HCT)' + unit: ns +packages: + DIP: + - '~OE~1' + - 'A__0' + - 'A__1' + - 'A__2' + - 'A__3' + - 'A__4' + - 'A__5' + - 'A__6' + - 'A__7' + - GND + - '~Y~__7' + - '~Y~__6' + - '~Y~__5' + - '~Y~__4' + - '~Y~__3' + - '~Y~__2' + - '~Y~__1' + - '~Y~__0' + - '~OE~__2' + - Vcc diff --git a/74541.yaml b/74541.yaml index f1103f0..f472848 100644 --- a/74541.yaml +++ b/74541.yaml @@ -1,72 +1,73 @@ ---- -description: Octal buffer/line driver; 3-state; non-inverting -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc541.74hct541.pdf" +description: 'Octal buffer/line driver; 3-state; non-inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc541.74hct541.pdf' pins: - - num: 1 - sym: ~OE~1 - desc: output enable (active low) - - num: 2 - sym: A__0 - desc: data input - - num: 3 - sym: A__1 - desc: data input - - num: 4 - sym: A__2 - desc: data input - - num: 5 - sym: A__3 - desc: data input - - num: 6 - sym: A__4 - desc: data input - - num: 7 - sym: A__5 - desc: data input - - num: 8 - sym: A__6 - desc: data input - - num: 9 - sym: A__7 - desc: data input - - num: 10 - sym: GND + '~OE~1': + desc: 'output enable (active low)' + 'A__0': + desc: 'data input' + 'A__1': + desc: 'data input' + 'A__2': + desc: 'data input' + 'A__3': + desc: 'data input' + 'A__4': + desc: 'data input' + 'A__5': + desc: 'data input' + 'A__6': + desc: 'data input' + 'A__7': + desc: 'data input' + GND: desc: ground - - num: 11 - sym: Y__7 - desc: bus output - - num: 12 - sym: Y__6 - desc: bus output - - num: 13 - sym: Y__5 - desc: bus output - - num: 14 - sym: Y__4 - desc: bus output - - num: 15 - sym: Y__3 - desc: bus output - - num: 16 - sym: Y__2 - desc: bus output - - num: 17 - sym: Y__1 - desc: bus output - - num: 18 - sym: Y__0 - desc: bus output - - num: 19 - sym: ~OE~__2 - desc: output enable (active low) - - num: 20 - sym: Vcc - desc: supply voltage + 'Y__7': + desc: 'bus output' + 'Y__6': + desc: 'bus output' + 'Y__5': + desc: 'bus output' + 'Y__4': + desc: 'bus output' + 'Y__3': + desc: 'bus output' + 'Y__2': + desc: 'bus output' + 'Y__1': + desc: 'bus output' + 'Y__0': + desc: 'bus output' + '~OE~__2': + desc: 'output enable (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, A__n to Y__n - val: [10 (74HC), 12 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, A__n to Y__n' + val: + - '10 (74HC)' + - '12 (74HCT)' + unit: ns +packages: + DIP: + - '~OE~1' + - 'A__0' + - 'A__1' + - 'A__2' + - 'A__3' + - 'A__4' + - 'A__5' + - 'A__6' + - 'A__7' + - GND + - 'Y__7' + - 'Y__6' + - 'Y__5' + - 'Y__4' + - 'Y__3' + - 'Y__2' + - 'Y__1' + - 'Y__0' + - '~OE~__2' + - Vcc diff --git a/74563.yaml b/74563.yaml index b5ebe04..1be7e9e 100644 --- a/74563.yaml +++ b/74563.yaml @@ -1,72 +1,73 @@ ---- -description: Octal D-type transparent latch; 3-state; inverting -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc563.74hct563.pdf" +description: 'Octal D-type transparent latch; 3-state; inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc563.74hct563.pdf' pins: - - num: 1 - sym: ~OE - desc: output enable (active low) - - num: 2 - sym: D__0 - desc: data input - - num: 3 - sym: D__1 - desc: data input - - num: 4 - sym: D__2 - desc: data input - - num: 5 - sym: D__3 - desc: data input - - num: 6 - sym: D__4 - desc: data input - - num: 7 - sym: D__5 - desc: data input - - num: 8 - sym: D__6 - desc: data input - - num: 9 - sym: D__7 - desc: data input - - num: 10 - sym: GND + '~OE': + desc: 'output enable (active low)' + 'D__0': + desc: 'data input' + 'D__1': + desc: 'data input' + 'D__2': + desc: 'data input' + 'D__3': + desc: 'data input' + 'D__4': + desc: 'data input' + 'D__5': + desc: 'data input' + 'D__6': + desc: 'data input' + 'D__7': + desc: 'data input' + GND: desc: ground - - num: 11 - sym: LE - desc: latch enable (active high) - - num: 12 - sym: ~Q~__7 - desc: latch output - - num: 13 - sym: ~Q~__6 - desc: latch output - - num: 14 - sym: ~Q~__5 - desc: latch output - - num: 15 - sym: ~Q~__4 - desc: latch output - - num: 16 - sym: ~Q~__3 - desc: latch output - - num: 17 - sym: ~Q~__2 - desc: latch output - - num: 18 - sym: ~Q~__1 - desc: latch output - - num: 19 - sym: ~Q~__0 - desc: latch output - - num: 20 - sym: Vcc - desc: supply voltage + LE: + desc: 'latch enable (active high)' + '~Q~__7': + desc: 'latch output' + '~Q~__6': + desc: 'latch output' + '~Q~__5': + desc: 'latch output' + '~Q~__4': + desc: 'latch output' + '~Q~__3': + desc: 'latch output' + '~Q~__2': + desc: 'latch output' + '~Q~__1': + desc: 'latch output' + '~Q~__0': + desc: 'latch output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, D__n, LE to ~Q~__n - val: [14 (74HC), 16 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, D__n, LE to ~Q~__n' + val: + - '14 (74HC)' + - '16 (74HCT)' + unit: ns +packages: + DIP: + - '~OE' + - 'D__0' + - 'D__1' + - 'D__2' + - 'D__3' + - 'D__4' + - 'D__5' + - 'D__6' + - 'D__7' + - GND + - LE + - '~Q~__7' + - '~Q~__6' + - '~Q~__5' + - '~Q~__4' + - '~Q~__3' + - '~Q~__2' + - '~Q~__1' + - '~Q~__0' + - Vcc diff --git a/74564.yaml b/74564.yaml index a4b6ffd..7e14b66 100644 --- a/74564.yaml +++ b/74564.yaml @@ -1,75 +1,75 @@ ---- -description: Octal D-type flip-flop; positive-edge trigger; 3-state; inverting -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc564.pdf" +description: 'Octal D-type flip-flop; positive-edge trigger; 3-state; inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc564.pdf' pins: - - num: 1 - sym: ~OE - desc: output enable (active low) - - num: 2 - sym: D__0 - desc: data input - - num: 3 - sym: D__1 - desc: data input - - num: 4 - sym: D__2 - desc: data input - - num: 5 - sym: D__3 - desc: data input - - num: 6 - sym: D__4 - desc: data input - - num: 7 - sym: D__5 - desc: data input - - num: 8 - sym: D__6 - desc: data input - - num: 9 - sym: D__7 - desc: data input - - num: 10 - sym: GND + '~OE': + desc: 'output enable (active low)' + 'D__0': + desc: 'data input' + 'D__1': + desc: 'data input' + 'D__2': + desc: 'data input' + 'D__3': + desc: 'data input' + 'D__4': + desc: 'data input' + 'D__5': + desc: 'data input' + 'D__6': + desc: 'data input' + 'D__7': + desc: 'data input' + GND: desc: ground - - num: 11 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 12 - sym: ~Q~__7 - desc: flip-flop output - - num: 13 - sym: ~Q~__6 - desc: flip-flop output - - num: 14 - sym: ~Q~__5 - desc: flip-flop output - - num: 15 - sym: ~Q~__4 - desc: flip-flop output - - num: 16 - sym: ~Q~__3 - desc: flip-flop output - - num: 17 - sym: ~Q~__2 - desc: flip-flop output - - num: 18 - sym: ~Q~__1 - desc: flip-flop output - - num: 19 - sym: ~Q~__0 - desc: flip-flop output - - num: 20 - sym: Vcc - desc: supply voltage + CP: + desc: 'clock input (low-to-high, edge-triggered)' + '~Q~__7': + desc: 'flip-flop output' + '~Q~__6': + desc: 'flip-flop output' + '~Q~__5': + desc: 'flip-flop output' + '~Q~__4': + desc: 'flip-flop output' + '~Q~__3': + desc: 'flip-flop output' + '~Q~__2': + desc: 'flip-flop output' + '~Q~__1': + desc: 'flip-flop output' + '~Q~__0': + desc: 'flip-flop output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to ~Q~__n - val: 15 (74HC) - unit: ns - - param: Maximum clock frequency - val: 127 (74HC) - unit: MHz -... + - + param: 'Propagation delay, CP to ~Q~__n' + val: '15 (74HC)' + unit: ns + - + param: 'Maximum clock frequency' + val: '127 (74HC)' + unit: MHz +packages: + DIP: + - '~OE' + - 'D__0' + - 'D__1' + - 'D__2' + - 'D__3' + - 'D__4' + - 'D__5' + - 'D__6' + - 'D__7' + - GND + - CP + - '~Q~__7' + - '~Q~__6' + - '~Q~__5' + - '~Q~__4' + - '~Q~__3' + - '~Q~__2' + - '~Q~__1' + - '~Q~__0' + - Vcc diff --git a/74573.yaml b/74573.yaml index 6303b5c..d7a9680 100644 --- a/74573.yaml +++ b/74573.yaml @@ -1,75 +1,77 @@ ---- -description: Octal D-type transparent latch; 3-state; non-inverting -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc573.74hct573.pdf" +description: 'Octal D-type transparent latch; 3-state; non-inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc573.74hct573.pdf' pins: - - num: 1 - sym: ~OE - desc: output enable (active low) - - num: 2 - sym: D__0 - desc: data input - - num: 3 - sym: D__1 - desc: data input - - num: 4 - sym: D__2 - desc: data input - - num: 5 - sym: D__3 - desc: data input - - num: 6 - sym: D__4 - desc: data input - - num: 7 - sym: D__5 - desc: data input - - num: 8 - sym: D__6 - desc: data input - - num: 9 - sym: D__7 - desc: data input - - num: 10 - sym: GND + '~OE': + desc: 'output enable (active low)' + 'D__0': + desc: 'data input' + 'D__1': + desc: 'data input' + 'D__2': + desc: 'data input' + 'D__3': + desc: 'data input' + 'D__4': + desc: 'data input' + 'D__5': + desc: 'data input' + 'D__6': + desc: 'data input' + 'D__7': + desc: 'data input' + GND: desc: ground - - num: 11 - sym: LE - desc: latch enable (active high) - - num: 12 - sym: Q__7 - desc: latch output - - num: 13 - sym: Q__6 - desc: latch output - - num: 14 - sym: Q__5 - desc: latch output - - num: 15 - sym: Q__4 - desc: latch output - - num: 16 - sym: Q__3 - desc: latch output - - num: 17 - sym: Q__2 - desc: latch output - - num: 18 - sym: Q__1 - desc: latch output - - num: 19 - sym: Q__0 - desc: latch output - - num: 20 - sym: Vcc - desc: supply voltage + LE: + desc: 'latch enable (active high)' + 'Q__7': + desc: 'latch output' + 'Q__6': + desc: 'latch output' + 'Q__5': + desc: 'latch output' + 'Q__4': + desc: 'latch output' + 'Q__3': + desc: 'latch output' + 'Q__2': + desc: 'latch output' + 'Q__1': + desc: 'latch output' + 'Q__0': + desc: 'latch output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, D__n to Q__n - val: [14 (74HC), 17 (74HCT)] - unit: ns - - param: Propagation delay, LE to Q__n - val: 15 (74HC/HCT) - unit: ns -... + - + param: 'Propagation delay, D__n to Q__n' + val: + - '14 (74HC)' + - '17 (74HCT)' + unit: ns + - + param: 'Propagation delay, LE to Q__n' + val: '15 (74HC/HCT)' + unit: ns +packages: + DIP: + - '~OE' + - 'D__0' + - 'D__1' + - 'D__2' + - 'D__3' + - 'D__4' + - 'D__5' + - 'D__6' + - 'D__7' + - GND + - LE + - 'Q__7' + - 'Q__6' + - 'Q__5' + - 'Q__4' + - 'Q__3' + - 'Q__2' + - 'Q__1' + - 'Q__0' + - Vcc diff --git a/74574.yaml b/74574.yaml index 0b1131f..e27c13c 100644 --- a/74574.yaml +++ b/74574.yaml @@ -1,75 +1,79 @@ ---- -description: Octal D-type flip-flop; positive-edge trigger; 3-state; non-inverting -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc574.74hct574.pdf" +description: 'Octal D-type flip-flop; positive-edge trigger; 3-state; non-inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc574.74hct574.pdf' pins: - - num: 1 - sym: ~OE - desc: output enable (active low) - - num: 2 - sym: D__0 - desc: data input - - num: 3 - sym: D__1 - desc: data input - - num: 4 - sym: D__2 - desc: data input - - num: 5 - sym: D__3 - desc: data input - - num: 6 - sym: D__4 - desc: data input - - num: 7 - sym: D__5 - desc: data input - - num: 8 - sym: D__6 - desc: data input - - num: 9 - sym: D__7 - desc: data input - - num: 10 - sym: GND + '~OE': + desc: 'output enable (active low)' + 'D__0': + desc: 'data input' + 'D__1': + desc: 'data input' + 'D__2': + desc: 'data input' + 'D__3': + desc: 'data input' + 'D__4': + desc: 'data input' + 'D__5': + desc: 'data input' + 'D__6': + desc: 'data input' + 'D__7': + desc: 'data input' + GND: desc: ground - - num: 11 - sym: CP - desc: clock input (low-to-high, edge-triggered) - - num: 12 - sym: Q__7 - desc: flip-flop output - - num: 13 - sym: Q__6 - desc: flip-flop output - - num: 14 - sym: Q__5 - desc: flip-flop output - - num: 15 - sym: Q__4 - desc: flip-flop output - - num: 16 - sym: Q__3 - desc: flip-flop output - - num: 17 - sym: Q__2 - desc: flip-flop output - - num: 18 - sym: Q__1 - desc: flip-flop output - - num: 19 - sym: Q__0 - desc: flip-flop output - - num: 20 - sym: Vcc - desc: supply voltage + CP: + desc: 'clock input (low-to-high, edge-triggered)' + 'Q__7': + desc: 'flip-flop output' + 'Q__6': + desc: 'flip-flop output' + 'Q__5': + desc: 'flip-flop output' + 'Q__4': + desc: 'flip-flop output' + 'Q__3': + desc: 'flip-flop output' + 'Q__2': + desc: 'flip-flop output' + 'Q__1': + desc: 'flip-flop output' + 'Q__0': + desc: 'flip-flop output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CP to Q__n - val: [14 (74HC), 15 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [123 (74HC), 76 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, CP to Q__n' + val: + - '14 (74HC)' + - '15 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '123 (74HC)' + - '76 (74HCT)' + unit: MHz +packages: + DIP: + - '~OE' + - 'D__0' + - 'D__1' + - 'D__2' + - 'D__3' + - 'D__4' + - 'D__5' + - 'D__6' + - 'D__7' + - GND + - CP + - 'Q__7' + - 'Q__6' + - 'Q__5' + - 'Q__4' + - 'Q__3' + - 'Q__2' + - 'Q__1' + - 'Q__0' + - Vcc diff --git a/7458.yaml b/7458.yaml index e224f27..2eab054 100644 --- a/7458.yaml +++ b/7458.yaml @@ -1,57 +1,57 @@ ---- -description: Dual AND-OR gate -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc58.pdf" +description: 'Dual AND-OR gate' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc58.pdf' pins: - - num: 1 - sym: 1A - desc: data input - - num: 2 - sym: 2A - desc: data input - - num: 3 - sym: 2B - desc: data input - - num: 4 - sym: 2C - desc: data input - - num: 5 - sym: 2D - desc: data input - - num: 6 - sym: 2Y - desc: data output (2A · 2B) + (2C · 2D) - - num: 7 - sym: GND + 1A: + desc: 'data input' + 2A: + desc: 'data input' + 2B: + desc: 'data input' + 2C: + desc: 'data input' + 2D: + desc: 'data input' + 2Y: + desc: 'data output (2A · 2B) + (2C · 2D)' + GND: desc: ground - - num: 8 - sym: 1Y - desc: data output (1A · 1B · 1C) + (1D · 1E · 1F) - - num: 9 - sym: 1D - desc: data input - - num: 10 - sym: 1E - desc: data input - - num: 11 - sym: 1F - desc: data input - - num: 12 - sym: 1B - desc: data input - - num: 13 - sym: 1C - desc: data input - - num: 14 - sym: Vcc - desc: supply voltage + 1Y: + desc: 'data output (1A · 1B · 1C) + (1D · 1E · 1F)' + 1D: + desc: 'data input' + 1E: + desc: 'data input' + 1F: + desc: 'data input' + 1B: + desc: 'data input' + 1C: + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, 1n to 1Y - val: 11 (74HC) - unit: ns - - param: Propagation delay, 2n to 2Y - val: 9 (74HC) - unit: ns -... + - + param: 'Propagation delay, 1n to 1Y' + val: '11 (74HC)' + unit: ns + - + param: 'Propagation delay, 2n to 2Y' + val: '9 (74HC)' + unit: ns +packages: + DIP: + - 1A + - 2A + - 2B + - 2C + - 2D + - 2Y + - GND + - 1Y + - 1D + - 1E + - 1F + - 1B + - 1C + - Vcc diff --git a/74590.yaml b/74590.yaml index 244300c..210258f 100644 --- a/74590.yaml +++ b/74590.yaml @@ -1,66 +1,67 @@ ---- -description: 8-bit binary counter with output register; 3-state -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc590.pdf" +description: '8-bit binary counter with output register; 3-state' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc590.pdf' pins: - - num: 1 - sym: Q1 - desc: parallel data output - - num: 2 - sym: Q2 - desc: parallel data output - - num: 3 - sym: Q3 - desc: parallel data output - - num: 4 - sym: Q4 - desc: parallel data output - - num: 5 - sym: Q5 - desc: parallel data output - - num: 6 - sym: Q6 - desc: parallel data output - - num: 7 - sym: Q7 - desc: parallel data output - - num: 8 - sym: GND + Q1: + desc: 'parallel data output' + Q2: + desc: 'parallel data output' + Q3: + desc: 'parallel data output' + Q4: + desc: 'parallel data output' + Q5: + desc: 'parallel data output' + Q6: + desc: 'parallel data output' + Q7: + desc: 'parallel data output' + GND: desc: ground - - num: 9 - sym: ~RCO - desc: ripple carry output (active low) - - num: 10 - sym: ~MRC - desc: master reset (active low) - - num: 11 - sym: CPC - desc: counter clock input (active high) - - num: 12 - sym: ~CE - desc: count enable (active low) - - num: 13 - sym: CPR - desc: register clock input (active high) - - num: 14 - sym: ~OE - desc: output enable (active low) - - num: 15 - sym: Q0 - desc: parallel data output - - num: 16 - sym: Vcc - desc: supply voltage + '~RCO': + desc: 'ripple carry output (active low)' + '~MRC': + desc: 'master reset (active low)' + CPC: + desc: 'counter clock input (active high)' + '~CE': + desc: 'count enable (active low)' + CPR: + desc: 'register clock input (active high)' + '~OE': + desc: 'output enable (active low)' + Q0: + desc: 'parallel data output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, CPR to ~RCO - val: 19 (74HC) - unit: ns - - param: Propagation delay, CPR to Qn - val: 18 (74HC) - unit: ns - - param: Maximum frequency, CPC and CPR - val: 52 (74HC) - unit: MHz -... + - + param: 'Propagation delay, CPR to ~RCO' + val: '19 (74HC)' + unit: ns + - + param: 'Propagation delay, CPR to Qn' + val: '18 (74HC)' + unit: ns + - + param: 'Maximum frequency, CPC and CPR' + val: '52 (74HC)' + unit: MHz +packages: + DIP: + - Q1 + - Q2 + - Q3 + - Q4 + - Q5 + - Q6 + - Q7 + - GND + - '~RCO' + - '~MRC' + - CPC + - '~CE' + - CPR + - '~OE' + - Q0 + - Vcc diff --git a/74594.yaml b/74594.yaml index 0a7ee2a..822fe1d 100644 --- a/74594.yaml +++ b/74594.yaml @@ -1,66 +1,72 @@ ---- -description: 8-bit shift register with output register -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc594.74hct594.pdf" +description: '8-bit shift register with output register' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc594.74hct594.pdf' pins: - - num: 1 - sym: Q1 - desc: parallel data output - - num: 2 - sym: Q2 - desc: parallel data output - - num: 3 - sym: Q3 - desc: parallel data output - - num: 4 - sym: Q4 - desc: parallel data output - - num: 5 - sym: Q5 - desc: parallel data output - - num: 6 - sym: Q6 - desc: parallel data output - - num: 7 - sym: Q7 - desc: parallel data output - - num: 8 - sym: GND + Q1: + desc: 'parallel data output' + Q2: + desc: 'parallel data output' + Q3: + desc: 'parallel data output' + Q4: + desc: 'parallel data output' + Q5: + desc: 'parallel data output' + Q6: + desc: 'parallel data output' + Q7: + desc: 'parallel data output' + GND: desc: ground - - num: 9 - sym: Q7S - desc: serial data output - - num: 10 - sym: ~SHR - desc: shift register reset (active low) - - num: 11 - sym: SHCP - desc: shift register clock input - - num: 12 - sym: STCP - desc: storage register clock input - - num: 13 - sym: ~STR - desc: storage register reset (active low) - - num: 14 - sym: DS - desc: serial data input - - num: 15 - sym: Q0 - desc: parallel data output - - num: 16 - sym: Vcc - desc: supply voltage + Q7S: + desc: 'serial data output' + '~SHR': + desc: 'shift register reset (active low)' + SHCP: + desc: 'shift register clock input' + STCP: + desc: 'storage register clock input' + '~STR': + desc: 'storage register reset (active low)' + DS: + desc: 'serial data input' + Q0: + desc: 'parallel data output' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, SHCP to Q7S - val: [13 (74HC), 15 (74HCT)] - unit: ns - - param: Propagation delay, STCP to Qn - val: [13 (74HC), 15 (74HCT)] - unit: ns - - param: Maximum frequency, SHCP or STCP - val: [100 (74HC/74HCT)] - unit: MHz -... + - + param: 'Propagation delay, SHCP to Q7S' + val: + - '13 (74HC)' + - '15 (74HCT)' + unit: ns + - + param: 'Propagation delay, STCP to Qn' + val: + - '13 (74HC)' + - '15 (74HCT)' + unit: ns + - + param: 'Maximum frequency, SHCP or STCP' + val: + - '100 (74HC/74HCT)' + unit: MHz +packages: + DIP: + - Q1 + - Q2 + - Q3 + - Q4 + - Q5 + - Q6 + - Q7 + - GND + - Q7S + - '~SHR' + - SHCP + - STCP + - '~STR' + - DS + - Q0 + - Vcc diff --git a/74595.yaml b/74595.yaml index 7e106cc..397a28b 100644 --- a/74595.yaml +++ b/74595.yaml @@ -1,69 +1,79 @@ ---- -description: 8-bit serial-in, serial or parallel-out shift register with output latches; 3-state -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.nxp.com/acrobat_download/datasheets/74HC_HCT595_4.pdf" +description: '8-bit serial-in, serial or parallel-out shift register with output latches; 3-state' +family: '7400' +datasheet: 'http://www.nxp.com/acrobat_download/datasheets/74HC_HCT595_4.pdf' pins: - - num: 1 - sym: Q1 - desc: parallel data output - - num: 2 - sym: Q2 - desc: parallel data output - - num: 3 - sym: Q3 - desc: parallel data output - - num: 4 - sym: Q4 - desc: parallel data output - - num: 5 - sym: Q5 - desc: parallel data output - - num: 6 - sym: Q6 - desc: parallel data output - - num: 7 - sym: Q7 - desc: parallel data output - - num: 8 - sym: GND + Q1: + desc: 'parallel data output' + Q2: + desc: 'parallel data output' + Q3: + desc: 'parallel data output' + Q4: + desc: 'parallel data output' + Q5: + desc: 'parallel data output' + Q6: + desc: 'parallel data output' + Q7: + desc: 'parallel data output' + GND: desc: ground - - num: 9 - sym: "Q7'" - desc: serial data output - - num: 10 - sym: ~MR - desc: master reset (active low) - - num: 11 - sym: SCK - desc: shift register clock input - - num: 12 - sym: RCK - desc: storage register latch input - - num: 13 - sym: ~OE - desc: output enable (active low) - - num: 14 - sym: DS - desc: serial data input - - num: 15 - sym: Q0 - desc: parallel data output - - num: 16 - sym: Vcc - desc: supply voltage + 'Q7''': + desc: 'serial data output' + '~MR': + desc: 'master reset (active low)' + SCK: + desc: 'shift register clock input' + RCK: + desc: 'storage register latch input' + '~OE': + desc: 'output enable (active low)' + DS: + desc: 'serial data input' + Q0: + desc: 'parallel data output' + Vcc: + desc: 'supply voltage' specs: - - param: "Propagation delay, SCK to Q7'" - val: [19 (74HC), 25 (74HCT)] - unit: ns - - param: "Propagation delay, SCK to Qn" - val: [20 (74HC), 24 (74HCT)] - unit: ns - - param: "Propagation delay, ~MR to Q7'" - val: [100 (74HC), 52 (74HCT)] - unit: ns - - param: Maximum clock frequency, SCK and RCK - val: [100 (74HC), 57 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, SCK to Q7''' + val: + - '19 (74HC)' + - '25 (74HCT)' + unit: ns + - + param: 'Propagation delay, SCK to Qn' + val: + - '20 (74HC)' + - '24 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~MR to Q7''' + val: + - '100 (74HC)' + - '52 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency, SCK and RCK' + val: + - '100 (74HC)' + - '57 (74HCT)' + unit: MHz +packages: + DIP: + - Q1 + - Q2 + - Q3 + - Q4 + - Q5 + - Q6 + - Q7 + - GND + - 'Q7''' + - '~MR' + - SCK + - RCK + - '~OE' + - DS + - Q0 + - Vcc diff --git a/74597.yaml b/74597.yaml index b187057..cee9eea 100644 --- a/74597.yaml +++ b/74597.yaml @@ -1,69 +1,79 @@ ---- -description: 8-bit shift register with input flip-flops -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc597.74hct597.pdf" +description: '8-bit shift register with input flip-flops' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc597.74hct597.pdf' pins: - - num: 1 - sym: D__1 - desc: parallel data input - - num: 2 - sym: D__2 - desc: parallel data input - - num: 3 - sym: D__3 - desc: parallel data input - - num: 4 - sym: D__4 - desc: parallel data input - - num: 5 - sym: D__5 - desc: parallel data input - - num: 6 - sym: D__6 - desc: parallel data input - - num: 7 - sym: D__7 - desc: parallel data input - - num: 8 - sym: GND + 'D__1': + desc: 'parallel data input' + 'D__2': + desc: 'parallel data input' + 'D__3': + desc: 'parallel data input' + 'D__4': + desc: 'parallel data input' + 'D__5': + desc: 'parallel data input' + 'D__6': + desc: 'parallel data input' + 'D__7': + desc: 'parallel data input' + GND: desc: ground - - num: 9 - sym: Q - desc: serial data output - - num: 10 - sym: ~MR - desc: asynchronous master reset (active low) - - num: 11 - sym: SH__CP - desc: shift clock input (low-to-high, edge-triggered) - - num: 12 - sym: ST__CP - desc: storage clock input (low-to-high, edge-triggered) - - num: 13 - sym: ~PL - desc: parallel load input (active low) - - num: 14 - sym: D__S - desc: serial data input - - num: 15 - sym: D__0 - desc: parallel data input - - num: 16 - sym: Vcc - desc: supply voltage + Q: + desc: 'serial data output' + '~MR': + desc: 'asynchronous master reset (active low)' + 'SH__CP': + desc: 'shift clock input (low-to-high, edge-triggered)' + 'ST__CP': + desc: 'storage clock input (low-to-high, edge-triggered)' + '~PL': + desc: 'parallel load input (active low)' + 'D__S': + desc: 'serial data input' + 'D__0': + desc: 'parallel data input' + Vcc: + desc: 'supply voltage' specs: - - param: "Propagation delay, SH__CP to Q" - val: [17 (74HC), 20 (74HCT)] - unit: ns - - param: "Propagation delay, ST__CP to Q" - val: [25 (74HC), 29 (74HCT)] - unit: ns - - param: "Propagation delay, ~PL to Q" - val: [21 (74HC), 26 (74HCT)] - unit: ns - - param: Maximum clock frequency, SH__CP - val: [96 (74HC), 83 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, SH__CP to Q' + val: + - '17 (74HC)' + - '20 (74HCT)' + unit: ns + - + param: 'Propagation delay, ST__CP to Q' + val: + - '25 (74HC)' + - '29 (74HCT)' + unit: ns + - + param: 'Propagation delay, ~PL to Q' + val: + - '21 (74HC)' + - '26 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency, SH__CP' + val: + - '96 (74HC)' + - '83 (74HCT)' + unit: MHz +packages: + DIP: + - 'D__1' + - 'D__2' + - 'D__3' + - 'D__4' + - 'D__5' + - 'D__6' + - 'D__7' + - GND + - Q + - '~MR' + - 'SH__CP' + - 'ST__CP' + - '~PL' + - 'D__S' + - 'D__0' + - Vcc diff --git a/74640.yaml b/74640.yaml index 2b0dda0..c59d4d2 100644 --- a/74640.yaml +++ b/74640.yaml @@ -1,75 +1,77 @@ ---- -description: Octal bus transceiver; 3-state; inverting -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc640.74hct640.pdf" +description: 'Octal bus transceiver; 3-state; inverting' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc640.74hct640.pdf' pins: - - num: 1 - sym: DIR - desc: direction control - - num: 2 - sym: A__0 - desc: data input/output - - num: 3 - sym: A__1 - desc: data input/output - - num: 4 - sym: A__2 - desc: data input/output - - num: 5 - sym: A__3 - desc: data input/output - - num: 6 - sym: A__4 - desc: data input/output - - num: 7 - sym: A__5 - desc: data input/output - - num: 8 - sym: A__6 - desc: data input/output - - num: 9 - sym: A__7 - desc: data input/output - - num: 10 - sym: GND + DIR: + desc: 'direction control' + 'A__0': + desc: 'data input/output' + 'A__1': + desc: 'data input/output' + 'A__2': + desc: 'data input/output' + 'A__3': + desc: 'data input/output' + 'A__4': + desc: 'data input/output' + 'A__5': + desc: 'data input/output' + 'A__6': + desc: 'data input/output' + 'A__7': + desc: 'data input/output' + GND: desc: ground - - num: 11 - sym: B__7 - desc: data input/output - - num: 12 - sym: B__6 - desc: data input/output - - num: 13 - sym: B__5 - desc: data input/output - - num: 14 - sym: B__4 - desc: data input/output - - num: 15 - sym: B__3 - desc: data input/output - - num: 16 - sym: B__2 - desc: data input/output - - num: 17 - sym: B__1 - desc: data input/output - - num: 18 - sym: B__0 - desc: data input/output - - num: 19 - sym: ~OE - desc: output enable (active low) - - num: 20 - sym: Vcc - desc: supply voltage + 'B__7': + desc: 'data input/output' + 'B__6': + desc: 'data input/output' + 'B__5': + desc: 'data input/output' + 'B__4': + desc: 'data input/output' + 'B__3': + desc: 'data input/output' + 'B__2': + desc: 'data input/output' + 'B__1': + desc: 'data input/output' + 'B__0': + desc: 'data input/output' + '~OE': + desc: 'output enable (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, A__n to B__n - val: 11 (74HC/HCT) - unit: ns - - param: Propagation delay, B__n to A__n - val: [9 (74HC), 11 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, A__n to B__n' + val: '11 (74HC/HCT)' + unit: ns + - + param: 'Propagation delay, B__n to A__n' + val: + - '9 (74HC)' + - '11 (74HCT)' + unit: ns +packages: + DIP: + - DIR + - 'A__0' + - 'A__1' + - 'A__2' + - 'A__3' + - 'A__4' + - 'A__5' + - 'A__6' + - 'A__7' + - GND + - 'B__7' + - 'B__6' + - 'B__5' + - 'B__4' + - 'B__3' + - 'B__2' + - 'B__1' + - 'B__0' + - '~OE' + - Vcc diff --git a/74646.yaml b/74646.yaml index ceb1d30..7555aec 100644 --- a/74646.yaml +++ b/74646.yaml @@ -1,87 +1,91 @@ ---- -description: Octal bus transceiver/register; 3-state -package: DIP -pincount: 24 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc646.74hct646.pdf" +description: 'Octal bus transceiver/register; 3-state' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc646.74hct646.pdf' pins: - - num: 1 - sym: CP__AB - desc: A to B clock input (low-to-high, edge-triggered) - - num: 2 - sym: S__AB - desc: select A to B source input - - num: 3 - sym: DIR - desc: direction control input - - num: 4 - sym: A__0 - desc: A data input/output - - num: 5 - sym: A__1 - desc: A data input/output - - num: 6 - sym: A__2 - desc: A data input/output - - num: 7 - sym: A__3 - desc: A data input/output - - num: 8 - sym: A__4 - desc: A data input/output - - num: 9 - sym: A__5 - desc: A data input/output - - num: 10 - sym: A__6 - desc: A data input/output - - num: 11 - sym: A__7 - desc: A data input/output - - num: 12 - sym: GND + 'CP__AB': + desc: 'A to B clock input (low-to-high, edge-triggered)' + 'S__AB': + desc: 'select A to B source input' + DIR: + desc: 'direction control input' + 'A__0': + desc: 'A data input/output' + 'A__1': + desc: 'A data input/output' + 'A__2': + desc: 'A data input/output' + 'A__3': + desc: 'A data input/output' + 'A__4': + desc: 'A data input/output' + 'A__5': + desc: 'A data input/output' + 'A__6': + desc: 'A data input/output' + 'A__7': + desc: 'A data input/output' + GND: desc: ground - - num: 13 - sym: B__7 - desc: B data input/output - - num: 14 - sym: B__6 - desc: B data input/output - - num: 15 - sym: B__5 - desc: B data input/output - - num: 16 - sym: B__4 - desc: B data input/output - - num: 17 - sym: B__3 - desc: B data input/output - - num: 18 - sym: B__2 - desc: B data input/output - - num: 19 - sym: B__1 - desc: B data input/output - - num: 20 - sym: B__0 - desc: B data input/output - - num: 21 - sym: ~OE - desc: output enable (active low) - - num: 22 - sym: S__BA - desc: select B to A source input - - num: 23 - sym: CP__BA - desc: B to A clock input (low-to-high, edge-triggered) - - num: 24 - sym: Vcc - desc: supply voltage + 'B__7': + desc: 'B data input/output' + 'B__6': + desc: 'B data input/output' + 'B__5': + desc: 'B data input/output' + 'B__4': + desc: 'B data input/output' + 'B__3': + desc: 'B data input/output' + 'B__2': + desc: 'B data input/output' + 'B__1': + desc: 'B data input/output' + 'B__0': + desc: 'B data input/output' + '~OE': + desc: 'output enable (active low)' + 'S__BA': + desc: 'select B to A source input' + 'CP__BA': + desc: 'B to A clock input (low-to-high, edge-triggered)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, A__n, B__n to B__n, A__n - val: [11 (74HC), 13 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [69 (74HC), 85 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, A__n, B__n to B__n, A__n' + val: + - '11 (74HC)' + - '13 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '69 (74HC)' + - '85 (74HCT)' + unit: MHz +packages: + DIP: + - 'CP__AB' + - 'S__AB' + - DIR + - 'A__0' + - 'A__1' + - 'A__2' + - 'A__3' + - 'A__4' + - 'A__5' + - 'A__6' + - 'A__7' + - GND + - 'B__7' + - 'B__6' + - 'B__5' + - 'B__4' + - 'B__3' + - 'B__2' + - 'B__1' + - 'B__0' + - '~OE' + - 'S__BA' + - 'CP__BA' + - Vcc diff --git a/74652.yaml b/74652.yaml index 4a3bf4f..2b4d905 100644 --- a/74652.yaml +++ b/74652.yaml @@ -1,93 +1,99 @@ ---- -description: Octal bus transceiver/register; 3-state -package: DIP -pincount: 24 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc652.74hct652.pdf" +description: 'Octal bus transceiver/register; 3-state' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc652.74hct652.pdf' pins: - - num: 1 - sym: CP__AB - desc: A to B clock input (low-to-high, edge-triggered) - - num: 2 - sym: S__AB - desc: select A to B source input - - num: 3 - sym: OE__AB - desc: output enable A to B - - num: 4 - sym: A__0 - desc: A data input/output - - num: 5 - sym: A__1 - desc: A data input/output - - num: 6 - sym: A__2 - desc: A data input/output - - num: 7 - sym: A__3 - desc: A data input/output - - num: 8 - sym: A__4 - desc: A data input/output - - num: 9 - sym: A__5 - desc: A data input/output - - num: 10 - sym: A__6 - desc: A data input/output - - num: 11 - sym: A__7 - desc: A data input/output - - num: 12 - sym: GND + 'CP__AB': + desc: 'A to B clock input (low-to-high, edge-triggered)' + 'S__AB': + desc: 'select A to B source input' + 'OE__AB': + desc: 'output enable A to B' + 'A__0': + desc: 'A data input/output' + 'A__1': + desc: 'A data input/output' + 'A__2': + desc: 'A data input/output' + 'A__3': + desc: 'A data input/output' + 'A__4': + desc: 'A data input/output' + 'A__5': + desc: 'A data input/output' + 'A__6': + desc: 'A data input/output' + 'A__7': + desc: 'A data input/output' + GND: desc: ground - - num: 13 - sym: B__7 - desc: B data input/output - - num: 14 - sym: B__6 - desc: B data input/output - - num: 15 - sym: B__5 - desc: B data input/output - - num: 16 - sym: B__4 - desc: B data input/output - - num: 17 - sym: B__3 - desc: B data input/output - - num: 18 - sym: B__2 - desc: B data input/output - - num: 19 - sym: B__1 - desc: B data input/output - - num: 20 - sym: B__0 - desc: B data input/output - - num: 21 - sym: ~OE~__BA - desc: output enable B to A (active low) - - num: 22 - sym: S__BA - desc: select B to A source input - - num: 23 - sym: CP__BA - desc: B to A clock input (low-to-high, edge-triggered) - - num: 24 - sym: Vcc - desc: supply voltage + 'B__7': + desc: 'B data input/output' + 'B__6': + desc: 'B data input/output' + 'B__5': + desc: 'B data input/output' + 'B__4': + desc: 'B data input/output' + 'B__3': + desc: 'B data input/output' + 'B__2': + desc: 'B data input/output' + 'B__1': + desc: 'B data input/output' + 'B__0': + desc: 'B data input/output' + '~OE~__BA': + desc: 'output enable B to A (active low)' + 'S__BA': + desc: 'select B to A source input' + 'CP__BA': + desc: 'B to A clock input (low-to-high, edge-triggered)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, A__n/B__n to B__n/A__n - val: 13 (74HC/HCT) - unit: ns - - param: Propagation delay, CP__AB/CP__BA to B__n/A__n - val: [18 (74HC), 20 (74HCT)] - unit: ns - - param: Propagation delay, S__AB/S__BA to B__n/A__n - val: [20 (74HC), 23 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: 92 (74HC/HCT) - unit: MHz -... + - + param: 'Propagation delay, A__n/B__n to B__n/A__n' + val: '13 (74HC/HCT)' + unit: ns + - + param: 'Propagation delay, CP__AB/CP__BA to B__n/A__n' + val: + - '18 (74HC)' + - '20 (74HCT)' + unit: ns + - + param: 'Propagation delay, S__AB/S__BA to B__n/A__n' + val: + - '20 (74HC)' + - '23 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: '92 (74HC/HCT)' + unit: MHz +packages: + DIP: + - 'CP__AB' + - 'S__AB' + - 'OE__AB' + - 'A__0' + - 'A__1' + - 'A__2' + - 'A__3' + - 'A__4' + - 'A__5' + - 'A__6' + - 'A__7' + - GND + - 'B__7' + - 'B__6' + - 'B__5' + - 'B__4' + - 'B__3' + - 'B__2' + - 'B__1' + - 'B__0' + - '~OE~__BA' + - 'S__BA' + - 'CP__BA' + - Vcc diff --git a/74670.yaml b/74670.yaml index 811bb10..968681c 100644 --- a/74670.yaml +++ b/74670.yaml @@ -1,60 +1,59 @@ ---- -description: 4 by 4 register file; 3-state -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc670.74hct670.pdf" +description: '4 by 4 register file; 3-state' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc670.74hct670.pdf' pins: - - num: 1 - sym: D__1 - desc: data input - - num: 2 - sym: D__2 - desc: data input - - num: 3 - sym: D__3 - desc: data input - - num: 4 - sym: R__B - desc: read address input - - num: 5 - sym: R__A - desc: read address input - - num: 6 - sym: Q__3 - desc: data output - - num: 7 - sym: Q__2 - desc: data output - - num: 8 - sym: GND + 'D__1': + desc: 'data input' + 'D__2': + desc: 'data input' + 'D__3': + desc: 'data input' + 'R__B': + desc: 'read address input' + 'R__A': + desc: 'read address input' + 'Q__3': + desc: 'data output' + 'Q__2': + desc: 'data output' + GND: desc: ground - - num: 9 - sym: Q__1 - desc: data output - - num: 10 - sym: Q__0 - desc: data output - - num: 11 - sym: ~RE - desc: 3-state output read enable (active low) - - num: 12 - sym: ~WE - desc: write enable (active low) - - num: 13 - sym: W__B - desc: write address input - - num: 14 - sym: W__A - desc: write address input - - num: 15 - sym: D__0 - desc: data input - - num: 16 - sym: Vcc - desc: supply voltage + 'Q__1': + desc: 'data output' + 'Q__0': + desc: 'data output' + '~RE': + desc: '3-state output read enable (active low)' + '~WE': + desc: 'write enable (active low)' + 'W__B': + desc: 'write address input' + 'W__A': + desc: 'write address input' + 'D__0': + desc: 'data input' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, D__n to Q__n - val: 23 (74HC/HCT] - unit: ns -... + - + param: 'Propagation delay, D__n to Q__n' + val: '23 (74HC/HCT]' + unit: ns +packages: + DIP: + - 'D__1' + - 'D__2' + - 'D__3' + - 'R__B' + - 'R__A' + - 'Q__3' + - 'Q__2' + - GND + - 'Q__1' + - 'Q__0' + - '~RE' + - '~WE' + - 'W__B' + - 'W__A' + - 'D__0' + - Vcc diff --git a/74688.yaml b/74688.yaml index 2f442fc..e781441 100644 --- a/74688.yaml +++ b/74688.yaml @@ -1,75 +1,77 @@ ---- -description: 8-bit magnitude comparator -package: DIP -pincount: 20 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc688.74hct688.pdf" +description: '8-bit magnitude comparator' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc688.74hct688.pdf' pins: - - num: 1 - sym: ~E - desc: enable (active low) - - num: 2 - sym: P__0 - desc: word input - - num: 3 - sym: Q__0 - desc: word input - - num: 4 - sym: P__1 - desc: word input - - num: 5 - sym: Q__1 - desc: word input - - num: 6 - sym: P__2 - desc: word input - - num: 7 - sym: Q__2 - desc: word input - - num: 8 - sym: P__3 - desc: word input - - num: 9 - sym: Q__3 - desc: word input - - num: 10 - sym: GND + '~E': + desc: 'enable (active low)' + 'P__0': + desc: 'word input' + 'Q__0': + desc: 'word input' + 'P__1': + desc: 'word input' + 'Q__1': + desc: 'word input' + 'P__2': + desc: 'word input' + 'Q__2': + desc: 'word input' + 'P__3': + desc: 'word input' + 'Q__3': + desc: 'word input' + GND: desc: ground - - num: 11 - sym: P__4 - desc: word input - - num: 12 - sym: Q__4 - desc: word input - - num: 13 - sym: P__5 - desc: word input - - num: 14 - sym: Q__5 - desc: word input - - num: 15 - sym: P__6 - desc: word input - - num: 16 - sym: Q__6 - desc: word input - - num: 17 - sym: P__7 - desc: word input - - num: 18 - sym: Q__7 - desc: word input - - num: 19 - sym: ~P=Q~ - desc: equal-to output (low when P = Q) - - num: 20 - sym: Vcc - desc: supply voltage + 'P__4': + desc: 'word input' + 'Q__4': + desc: 'word input' + 'P__5': + desc: 'word input' + 'Q__5': + desc: 'word input' + 'P__6': + desc: 'word input' + 'Q__6': + desc: 'word input' + 'P__7': + desc: 'word input' + 'Q__7': + desc: 'word input' + '~P=Q~': + desc: 'equal-to output (low when P = Q)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, P__n, Q__n to ~P=Q~ - val: 17 (74HC/HCT) - unit: ns - - param: Propagation delay, ~E to ~P=Q~ - val: [8 (74HC), 12 (74HCT)] - unit: ns -... + - + param: 'Propagation delay, P__n, Q__n to ~P=Q~' + val: '17 (74HC/HCT)' + unit: ns + - + param: 'Propagation delay, ~E to ~P=Q~' + val: + - '8 (74HC)' + - '12 (74HCT)' + unit: ns +packages: + DIP: + - '~E' + - 'P__0' + - 'Q__0' + - 'P__1' + - 'Q__1' + - 'P__2' + - 'Q__2' + - 'P__3' + - 'Q__3' + - GND + - 'P__4' + - 'Q__4' + - 'P__5' + - 'Q__5' + - 'P__6' + - 'Q__6' + - 'P__7' + - 'Q__7' + - '~P=Q~' + - Vcc diff --git a/7473.yaml b/7473.yaml index 103d1fc..303e930 100644 --- a/7473.yaml +++ b/7473.yaml @@ -1,63 +1,65 @@ ---- -description: Dual J-K flip-flop with reset; negative-edge trigger -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc73.pdf" +description: 'Dual J-K flip-flop with reset; negative-edge trigger' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc73.pdf' pins: - - num: 1 - sym: 1~CP - desc: clock input (high-to-low edge-triggered) - - num: 2 - sym: 1~R - desc: asynchronous reset (active low) - - num: 3 - sym: 1K - desc: synchronous K input - - num: 4 - sym: Vcc - desc: supply voltage - - num: 5 - sym: 2~CP - desc: clock input (high-to-low edge-triggered) - - num: 6 - sym: 2~R - desc: asynchronous reset (active low) - - num: 7 - sym: 2J - desc: synchronous J input - - num: 8 - sym: 2~Q - desc: complement output - - num: 9 - sym: 2Q - desc: true output - - num: 10 - sym: 2K - desc: synchronous K input - - num: 11 - sym: GND + '1~CP': + desc: 'clock input (high-to-low edge-triggered)' + '1~R': + desc: 'asynchronous reset (active low)' + 1K: + desc: 'synchronous K input' + Vcc: + desc: 'supply voltage' + '2~CP': + desc: 'clock input (high-to-low edge-triggered)' + '2~R': + desc: 'asynchronous reset (active low)' + 2J: + desc: 'synchronous J input' + '2~Q': + desc: 'complement output' + 2Q: + desc: 'true output' + 2K: + desc: 'synchronous K input' + GND: desc: ground - - num: 12 - sym: 1Q - desc: true output - - num: 13 - sym: 1~Q - desc: complement output - - num: 14 - sym: 1J - desc: synchronous J input + 1Q: + desc: 'true output' + '1~Q': + desc: 'complement output' + 1J: + desc: 'synchronous J input' specs: - - param: Propagation delay, n~CP to nQ - val: 16 (74HC) - unit: ns - - param: Propagation delay, n~CP to n~Q - val: 16 (74HC) - unit: ns - - param: Propagation delay, n~R to nQ, n~Q - val: 15 (74HC) - unit: ns - - param: Maximum frequency - val: 77 (74HC) - unit: MHz -... + - + param: 'Propagation delay, n~CP to nQ' + val: '16 (74HC)' + unit: ns + - + param: 'Propagation delay, n~CP to n~Q' + val: '16 (74HC)' + unit: ns + - + param: 'Propagation delay, n~R to nQ, n~Q' + val: '15 (74HC)' + unit: ns + - + param: 'Maximum frequency' + val: '77 (74HC)' + unit: MHz +packages: + DIP: + - '1~CP' + - '1~R' + - 1K + - Vcc + - '2~CP' + - '2~R' + - 2J + - '2~Q' + - 2Q + - 2K + - GND + - 1Q + - '1~Q' + - 1J diff --git a/7474.yaml b/7474.yaml index cfe7674..17d4908 100644 --- a/7474.yaml +++ b/7474.yaml @@ -1,63 +1,73 @@ ---- -description: Dual D-type flip-flop with set and reset; positive-edge trigger -package: DIP -pincount: 14 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc74.74hct74.pdf" +description: 'Dual D-type flip-flop with set and reset; positive-edge trigger' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc74.74hct74.pdf' pins: - - num: 1 - sym: 1~R~D - desc: asynchronous reset-direct input (active low) - - num: 2 - sym: 1D - desc: data input - - num: 3 - sym: 1CP - desc: clock input (low-to-high edge-triggered) - - num: 4 - sym: 1~S~D - desc: asynchronous set-direct input (active low) - - num: 5 - sym: 1Q - desc: true output - - num: 6 - sym: 1~Q - desc: complement output - - num: 7 - sym: GND + '1~R~D': + desc: 'asynchronous reset-direct input (active low)' + 1D: + desc: 'data input' + 1CP: + desc: 'clock input (low-to-high edge-triggered)' + '1~S~D': + desc: 'asynchronous set-direct input (active low)' + 1Q: + desc: 'true output' + '1~Q': + desc: 'complement output' + GND: desc: ground - - num: 8 - sym: 2~Q - desc: complement output - - num: 9 - sym: 2Q - desc: true output - - num: 10 - sym: 2~S~D - desc: asynchronous set-direct input (active low) - - num: 11 - sym: 2CP - desc: clock input (low-to-high edge-triggered) - - num: 12 - sym: 2D - desc: data input - - num: 13 - sym: 2~R~D - desc: asynchronous reset-direct input (active low) - - num: 14 - sym: Vcc - desc: supply voltage + '2~Q': + desc: 'complement output' + 2Q: + desc: 'true output' + '2~S~D': + desc: 'asynchronous set-direct input (active low)' + 2CP: + desc: 'clock input (low-to-high edge-triggered)' + 2D: + desc: 'data input' + '2~R~D': + desc: 'asynchronous reset-direct input (active low)' + Vcc: + desc: 'supply voltage' specs: - - param: Propagation delay, nCP to nQ, n~Q - val: [14 (74HC), 15 (74HCT)] - unit: ns - - param: Propagation delay, n~S~D to nQ, n~Q - val: [15 (74HC), 18 (74HCT)] - unit: ns - - param: Propagation delay, n~R~D to nQ, n~Q - val: [16 (74HC), 18 (74HCT)] - unit: ns - - param: Maximum clock frequency - val: [76 (74HC), 59 (74HCT)] - unit: MHz -... + - + param: 'Propagation delay, nCP to nQ, n~Q' + val: + - '14 (74HC)' + - '15 (74HCT)' + unit: ns + - + param: 'Propagation delay, n~S~D to nQ, n~Q' + val: + - '15 (74HC)' + - '18 (74HCT)' + unit: ns + - + param: 'Propagation delay, n~R~D to nQ, n~Q' + val: + - '16 (74HC)' + - '18 (74HCT)' + unit: ns + - + param: 'Maximum clock frequency' + val: + - '76 (74HC)' + - '59 (74HCT)' + unit: MHz +packages: + DIP: + - '1~R~D' + - 1D + - 1CP + - '1~S~D' + - 1Q + - '1~Q' + - GND + - '2~Q' + - 2Q + - '2~S~D' + - 2CP + - 2D + - '2~R~D' + - Vcc diff --git a/7475.yaml b/7475.yaml index 2b26084..d3408b6 100644 --- a/7475.yaml +++ b/7475.yaml @@ -1,60 +1,59 @@ ---- -description: Quad bistable transparent latch -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.nxp.com/acrobat_download/datasheets/74HC75_3.pdf" +description: 'Quad bistable transparent latch' +family: '7400' +datasheet: 'http://www.nxp.com/acrobat_download/datasheets/74HC75_3.pdf' pins: - - num: 1 - sym: 1~Q - desc: complementary latch output 1 - - num: 2 - sym: 1D - desc: data input 1 - - num: 3 - sym: 2D - desc: data input 2 - - num: 4 - sym: LE34 - desc: latch enable input for latches 3 and 4 - - num: 5 - sym: Vcc - desc: supply voltage - - num: 6 - sym: 3D - desc: data input 3 - - num: 7 - sym: 4D - desc: data input 4 - - num: 8 - sym: 4~Q - desc: complementary latch output 4 - - num: 9 - sym: 4Q - desc: latch output 4 - - num: 10 - sym: 3Q - desc: latch output 3 - - num: 11 - sym: 3~Q - desc: complementary latch output 3 - - num: 12 - sym: GND + '1~Q': + desc: 'complementary latch output 1' + 1D: + desc: 'data input 1' + 2D: + desc: 'data input 2' + LE34: + desc: 'latch enable input for latches 3 and 4' + Vcc: + desc: 'supply voltage' + 3D: + desc: 'data input 3' + 4D: + desc: 'data input 4' + '4~Q': + desc: 'complementary latch output 4' + 4Q: + desc: 'latch output 4' + 3Q: + desc: 'latch output 3' + '3~Q': + desc: 'complementary latch output 3' + GND: desc: ground - - num: 13 - sym: LE12 - desc: latch enable input for latches 1 and 2 - - num: 14 - sym: 2~Q - desc: complementary latch output 2 - - num: 15 - sym: 2Q - desc: latch output 2 - - num: 16 - sym: 1Q - desc: latch output 1 + LE12: + desc: 'latch enable input for latches 1 and 2' + '2~Q': + desc: 'complementary latch output 2' + 2Q: + desc: 'latch output 2' + 1Q: + desc: 'latch output 1' specs: - - param: Propagation delay - val: 11 (74HC) - unit: ns -... + - + param: 'Propagation delay' + val: '11 (74HC)' + unit: ns +packages: + DIP: + - '1~Q' + - 1D + - 2D + - LE34 + - Vcc + - 3D + - 4D + - '4~Q' + - 4Q + - 3Q + - '3~Q' + - GND + - LE12 + - '2~Q' + - 2Q + - 1Q diff --git a/7485.yaml b/7485.yaml index a77608a..4929cf7 100644 --- a/7485.yaml +++ b/7485.yaml @@ -1,73 +1,82 @@ ---- -description: 4-bit magnitude comparator -package: DIP -pincount: 16 -family: "7400" -datasheet: "http://www.standardics.nxp.com/products/hc/datasheet/74hc85.74hct85.pdf" +description: '4-bit magnitude comparator' +family: '7400' +datasheet: 'http://www.standardics.nxp.com/products/hc/datasheet/74hc85.74hct85.pdf' pins: - - num: 1 - sym: B__3 - desc: word B input - - num: 2 - sym: I__A<B - desc: A < B expansion input - - num: 3 - sym: I__A=B - desc: A = B expansion input - - num: 4 - sym: I__A>B - desc: A > B expansion input - - num: 5 - sym: Q__A>B - desc: A > B output - - num: 6 - sym: Q__A=B - desc: A = B output - - num: 7 - sym: Q__A<B - desc: A < B output - - num: 8 - sym: GND + 'B__3': + desc: 'word B input' + 'I__AB': + desc: 'A > B expansion input' + 'Q__A>B': + desc: 'A > B output' + 'Q__A=B': + desc: 'A = B output' + 'Q__AB, Q__AB to Q__AB' + val: + - '15 (74HC)' + - '15 (74HCT)' + unit: ns + - + param: 'Propagation delay, I__A=B to Q__A=B' + val: + - '11 (74HC)' + - '15 (74HCT)' + unit: ns notes: - - The least significant (or only) comparator in a chain should have I__A<B and I__A>B tied low and I__A=B tied high. - - To compare more than 4 bits, connect the outputs to the expansion inputs of the next significant comparator. -... - + - 'The least significant (or only) comparator in a chain should have I__AB tied low and I__A=B tied high.' + - 'To compare more than 4 bits, connect the outputs to the expansion inputs of the next significant comparator.' +packages: + DIP: + - 'B__3' + - 'I__AB' + - 'Q__A>B' + - 'Q__A=B' + - 'Q__A -Bit 00=binary (16 bits), 1=BCD (4 decades) -Bits 1-3mode select -Bits 4-5read/write mode -Bits 6-7select counter/read-back mode -
" - - "Mode 0: interrupt on terminal count" - - "Mode 1: hardware retriggerable one-shot" - - "Mode 2: rate generator" - - "Mode 3: square wave" - - "Mode 4: software triggered strobe" - - "Mode 5: hardware triggered strobe (retriggerable)" - + - 'Register 00: counter 0 value' + - 'Register 01: counter 1 value' + - 'Register 10: counter 2 value' + - 'Register 11: control word' + - 'Control word:
Bit 00=binary (16 bits), 1=BCD (4 decades)
Bits 1-3mode select
Bits 4-5read/write mode
Bits 6-7select counter/read-back mode

' + - 'Mode 0: interrupt on terminal count' + - 'Mode 1: hardware retriggerable one-shot' + - 'Mode 2: rate generator' + - 'Mode 3: square wave' + - 'Mode 4: software triggered strobe' + - 'Mode 5: hardware triggered strobe (retriggerable)' +packages: + DIP: + - D7 + - D6 + - D5 + - D4 + - D3 + - D2 + - D1 + - D0 + - 'CLK 0' + - 'OUT 0' + - 'GATE 0' + - GND + - 'OUT 1' + - 'GATE 1' + - 'CLK 1' + - 'GATE 2' + - 'OUT 2' + - 'CLK 2' + - A0 + - A1 + - '~CS' + - '~RD' + - '~WR' + - Vcc diff --git a/8255A.yaml b/8255A.yaml index 85cfbbb..409f2c6 100644 --- a/8255A.yaml +++ b/8255A.yaml @@ -1,150 +1,135 @@ ---- -description: "Programmable peripheral interface" -aliases: [82C55A] -package: DIP -pincount: 40 -family: "Intel" -datasheet: "http://www.intersil.com/data/fn/fn2969.pdf" +description: 'Programmable peripheral interface' +aliases: + - 82C55A +family: Intel +datasheet: 'http://www.intersil.com/data/fn/fn2969.pdf' pins: - - num: 1 - sym: PA3 - desc: port A - - num: 2 - sym: PA2 - desc: port A - - num: 3 - sym: PA1 - desc: port A - - num: 4 - sym: PA0 - desc: port A - - num: 5 - sym: ~RD - desc: read enable (active low) - - num: 6 - sym: ~CS - desc: chip select (active low) - - num: 7 - sym: GND + PA3: + desc: 'port A' + PA2: + desc: 'port A' + PA1: + desc: 'port A' + PA0: + desc: 'port A' + '~RD': + desc: 'read enable (active low)' + '~CS': + desc: 'chip select (active low)' + GND: desc: ground - - num: 8 - sym: A1 - desc: address input - - num: 9 - sym: A0 - desc: address input - - num: 10 - sym: PC7 - desc: port C - - num: 11 - sym: PC6 - desc: port C - - num: 12 - sym: PC5 - desc: port C - - num: 13 - sym: PC4 - desc: port C - - num: 14 - sym: PC0 - desc: port C - - num: 15 - sym: PC1 - desc: port C - - num: 16 - sym: PC2 - desc: port C - - num: 17 - sym: PC3 - desc: port C - - num: 18 - sym: PB0 - desc: port B - - num: 19 - sym: PB1 - desc: port B - - num: 20 - sym: PB2 - desc: port B - - num: 21 - sym: PB3 - desc: port B - - num: 22 - sym: PB4 - desc: port B - - num: 23 - sym: PB5 - desc: port B - - num: 24 - sym: PB6 - desc: port B - - num: 25 - sym: PB7 - desc: port B - - num: 26 - sym: Vcc - desc: supply voltage - - num: 27 - sym: D7 - desc: data bus - - num: 28 - sym: D6 - desc: data bus - - num: 29 - sym: D5 - desc: data bus - - num: 30 - sym: D4 - desc: data bus - - num: 31 - sym: D3 - desc: data bus - - num: 32 - sym: D2 - desc: data bus - - num: 33 - sym: D1 - desc: data bus - - num: 34 - sym: D0 - desc: data bus - - num: 35 - sym: RESET - desc: reset (active high) - - num: 36 - sym: ~WR - desc: write enable (active low) - - num: 37 - sym: PA7 - desc: port A - - num: 38 - sym: PA6 - desc: port A - - num: 39 - sym: PA5 - desc: port A - - num: 40 - sym: PA4 - desc: port A + A1: + desc: 'address input' + A0: + desc: 'address input' + PC7: + desc: 'port C' + PC6: + desc: 'port C' + PC5: + desc: 'port C' + PC4: + desc: 'port C' + PC0: + desc: 'port C' + PC1: + desc: 'port C' + PC2: + desc: 'port C' + PC3: + desc: 'port C' + PB0: + desc: 'port B' + PB1: + desc: 'port B' + PB2: + desc: 'port B' + PB3: + desc: 'port B' + PB4: + desc: 'port B' + PB5: + desc: 'port B' + PB6: + desc: 'port B' + PB7: + desc: 'port B' + Vcc: + desc: 'supply voltage' + D7: + desc: 'data bus' + D6: + desc: 'data bus' + D5: + desc: 'data bus' + D4: + desc: 'data bus' + D3: + desc: 'data bus' + D2: + desc: 'data bus' + D1: + desc: 'data bus' + D0: + desc: 'data bus' + RESET: + desc: 'reset (active high)' + '~WR': + desc: 'write enable (active low)' + PA7: + desc: 'port A' + PA6: + desc: 'port A' + PA5: + desc: 'port A' + PA4: + desc: 'port A' notes: - - "Register 00: read/write port A" - - "Register 01: read/write port B" - - "Register 10: read/write port C" - - "Register 11: read/write control word" - - "Control word: - - - - - - - - -
Bit 0Port C lower bits; 1=input, 0=output
Bit 1Port B; 1=input, 0=output
Bit 2Group B mode selection
Bit 3Port C upper bits; 1=input, 0=output
Bit 4Port A; 1=input, 0=output
Bits 5-6Group A mode selection
Bit 71=mode set, 0=bit set/reset

" - - "When bit 7 of control word is set to 1, the rest of the bits have the following functions: - - - -
Bit 01=set bit, 0=clear bit
Bits 1-3specify bit to modify (0-7)
" -... - + - 'Register 00: read/write port A' + - 'Register 01: read/write port B' + - 'Register 10: read/write port C' + - 'Register 11: read/write control word' + - 'Control word:
Bit 0Port C lower bits; 1=input, 0=output
Bit 1Port B; 1=input, 0=output
Bit 2Group B mode selection
Bit 3Port C upper bits; 1=input, 0=output
Bit 4Port A; 1=input, 0=output
Bits 5-6Group A mode selection
Bit 71=mode set, 0=bit set/reset

' + - 'When bit 7 of control word is set to 1, the rest of the bits have the following functions:
Bit 01=set bit, 0=clear bit
Bits 1-3specify bit to modify (0-7)
' +packages: + DIP: + - PA3 + - PA2 + - PA1 + - PA0 + - '~RD' + - '~CS' + - GND + - A1 + - A0 + - PC7 + - PC6 + - PC5 + - PC4 + - PC0 + - PC1 + - PC2 + - PC3 + - PB0 + - PB1 + - PB2 + - PB3 + - PB4 + - PB5 + - PB6 + - PB7 + - Vcc + - D7 + - D6 + - D5 + - D4 + - D3 + - D2 + - D1 + - D0 + - RESET + - '~WR' + - PA7 + - PA6 + - PA5 + - PA4 diff --git a/A6278.yaml b/A6278.yaml index 24e962a..5b4c058 100644 --- a/A6278.yaml +++ b/A6278.yaml @@ -1,57 +1,54 @@ ---- -description: Serial-input constant-current latched LED driver (8 outputs) -package: DIP -pincount: 16 -family: "Allegro" -datasheet: "http://www.allegromicro.com/en/Products/Part_Numbers/6278/6278.pdf" +description: 'Serial-input constant-current latched LED driver (8 outputs)' +family: Allegro +datasheet: 'http://www.allegromicro.com/en/Products/Part_Numbers/6278/6278.pdf' pins: - - num: 1 - sym: GND + GND: desc: ground - - num: 2 - sym: DATA - desc: serial data in - - num: 3 - sym: CLOCK - desc: clock input (low-to-high triggered) - - num: 4 - sym: LATCH - desc: data strobe input (active high) - - num: 5 - sym: OUT0 - desc: current-sinking output - - num: 6 - sym: OUT1 - desc: current-sinking output - - num: 7 - sym: OUT2 - desc: current-sinking output - - num: 8 - sym: OUT3 - desc: current-sinking output - - num: 9 - sym: OUT4 - desc: current-sinking output - - num: 10 - sym: OUT5 - desc: current-sinking output - - num: 11 - sym: OUT6 - desc: current-sinking output - - num: 12 - sym: OUT7 - desc: current-sinking output - - num: 13 - sym: ~OE - desc: output enable (active low) - - num: 14 - sym: DATA OUT - desc: serial data out, for cascading - - num: 15 - sym: REXT - desc: external resistor to ground (sets output current) - - num: 16 - sym: Vcc - desc: supply voltage -... - + DATA: + desc: 'serial data in' + CLOCK: + desc: 'clock input (low-to-high triggered)' + LATCH: + desc: 'data strobe input (active high)' + OUT0: + desc: 'current-sinking output' + OUT1: + desc: 'current-sinking output' + OUT2: + desc: 'current-sinking output' + OUT3: + desc: 'current-sinking output' + OUT4: + desc: 'current-sinking output' + OUT5: + desc: 'current-sinking output' + OUT6: + desc: 'current-sinking output' + OUT7: + desc: 'current-sinking output' + '~OE': + desc: 'output enable (active low)' + 'DATA OUT': + desc: 'serial data out, for cascading' + REXT: + desc: 'external resistor to ground (sets output current)' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - GND + - DATA + - CLOCK + - LATCH + - OUT0 + - OUT1 + - OUT2 + - OUT3 + - OUT4 + - OUT5 + - OUT6 + - OUT7 + - '~OE' + - 'DATA OUT' + - REXT + - Vcc diff --git a/A6279.yaml b/A6279.yaml index 4508ae5..d409bb4 100644 --- a/A6279.yaml +++ b/A6279.yaml @@ -1,81 +1,78 @@ ---- -description: Serial-input constant-current latched LED driver (16 outputs) -package: DIP -pincount: 24 -family: "Allegro" -datasheet: "http://www.allegromicro.com/en/Products/Part_Numbers/6278/6278.pdf" +description: 'Serial-input constant-current latched LED driver (16 outputs)' +family: Allegro +datasheet: 'http://www.allegromicro.com/en/Products/Part_Numbers/6278/6278.pdf' pins: - - num: 1 - sym: GND + GND: desc: ground - - num: 2 - sym: DATA - desc: serial data in - - num: 3 - sym: CLOCK - desc: clock input (low-to-high triggered) - - num: 4 - sym: LATCH - desc: data strobe input (active high) - - num: 5 - sym: OUT0 - desc: current-sinking output - - num: 6 - sym: OUT1 - desc: current-sinking output - - num: 7 - sym: OUT2 - desc: current-sinking output - - num: 8 - sym: OUT3 - desc: current-sinking output - - num: 9 - sym: OUT4 - desc: current-sinking output - - num: 10 - sym: OUT5 - desc: current-sinking output - - num: 11 - sym: OUT6 - desc: current-sinking output - - num: 12 - sym: OUT7 - desc: current-sinking output - - num: 13 - sym: OUT8 - desc: current-sinking output - - num: 14 - sym: OUT9 - desc: current-sinking output - - num: 15 - sym: OUT10 - desc: current-sinking output - - num: 16 - sym: OUT11 - desc: current-sinking output - - num: 17 - sym: OUT12 - desc: current-sinking output - - num: 18 - sym: OUT13 - desc: current-sinking output - - num: 19 - sym: OUT14 - desc: current-sinking output - - num: 20 - sym: OUT15 - desc: current-sinking output - - num: 21 - sym: ~OE - desc: output enable (active low) - - num: 22 - sym: DATA OUT - desc: serial data out, for cascading - - num: 23 - sym: REXT - desc: external resistor to ground (sets output current) - - num: 24 - sym: Vcc - desc: supply voltage -... - + DATA: + desc: 'serial data in' + CLOCK: + desc: 'clock input (low-to-high triggered)' + LATCH: + desc: 'data strobe input (active high)' + OUT0: + desc: 'current-sinking output' + OUT1: + desc: 'current-sinking output' + OUT2: + desc: 'current-sinking output' + OUT3: + desc: 'current-sinking output' + OUT4: + desc: 'current-sinking output' + OUT5: + desc: 'current-sinking output' + OUT6: + desc: 'current-sinking output' + OUT7: + desc: 'current-sinking output' + OUT8: + desc: 'current-sinking output' + OUT9: + desc: 'current-sinking output' + OUT10: + desc: 'current-sinking output' + OUT11: + desc: 'current-sinking output' + OUT12: + desc: 'current-sinking output' + OUT13: + desc: 'current-sinking output' + OUT14: + desc: 'current-sinking output' + OUT15: + desc: 'current-sinking output' + '~OE': + desc: 'output enable (active low)' + 'DATA OUT': + desc: 'serial data out, for cascading' + REXT: + desc: 'external resistor to ground (sets output current)' + Vcc: + desc: 'supply voltage' +packages: + DIP: + - GND + - DATA + - CLOCK + - LATCH + - OUT0 + - OUT1 + - OUT2 + - OUT3 + - OUT4 + - OUT5 + - OUT6 + - OUT7 + - OUT8 + - OUT9 + - OUT10 + - OUT11 + - OUT12 + - OUT13 + - OUT14 + - OUT15 + - '~OE' + - 'DATA OUT' + - REXT + - Vcc diff --git a/AD7528.yaml b/AD7528.yaml index 12e8ace..b09741e 100644 --- a/AD7528.yaml +++ b/AD7528.yaml @@ -1,77 +1,81 @@ ---- -description: CMOS dual 8-bit buffered multiplying DAC -package: DIP -pincount: 20 -aliases: [TLC7528] -family: Analog Devices -datasheet: "http://www.analog.com/static/imported-files/data_sheets/AD7528.pdf" +description: 'CMOS dual 8-bit buffered multiplying DAC' +aliases: + - TLC7528 +family: 'Analog Devices' +datasheet: 'http://www.analog.com/static/imported-files/data_sheets/AD7528.pdf' pins: - - num: 1 - sym: AGND - desc: analog ground - - num: 2 - sym: OUT A - desc: analog current output - - num: 3 - sym: R__FB A - desc: feedback resistor connection - - num: 4 - sym: V__REF A - desc: input reference voltage - - num: 5 - sym: DGND - desc: digital ground - - num: 6 - sym: ~DACA/DACB - desc: DAC select - - num: 7 - sym: (MSB) DB7 - desc: parallel data input - - num: 8 - sym: DB6 - desc: parallel data input - - num: 9 - sym: DB5 - desc: parallel data input - - num: 10 - sym: DB4 - desc: parallel data input - - num: 11 - sym: DB3 - desc: parallel data input - - num: 12 - sym: DB2 - desc: parallel data input - - num: 13 - sym: DB1 - desc: parallel data input - - num: 14 - sym: DB0 (LSB) - desc: parallel data input - - num: 15 - sym: ~CS - desc: chip select (active low) - - num: 16 - sym: ~WR - desc: write to data register (active low) - - num: 17 - sym: V__DD - desc: supply voltage - - num: 18 - sym: V__REF B - desc: input reference voltage - - num: 19 - sym: R__FB B - desc: feedback resistor connection - - num: 20 - sym: OUT B - desc: analog current output + AGND: + desc: 'analog ground' + 'OUT A': + desc: 'analog current output' + 'R__FB A': + desc: 'feedback resistor connection' + 'V__REF A': + desc: 'input reference voltage' + DGND: + desc: 'digital ground' + '~DACA/DACB': + desc: 'DAC select' + '(MSB) DB7': + desc: 'parallel data input' + DB6: + desc: 'parallel data input' + DB5: + desc: 'parallel data input' + DB4: + desc: 'parallel data input' + DB3: + desc: 'parallel data input' + DB2: + desc: 'parallel data input' + DB1: + desc: 'parallel data input' + 'DB0 (LSB)': + desc: 'parallel data input' + '~CS': + desc: 'chip select (active low)' + '~WR': + desc: 'write to data register (active low)' + 'V__DD': + desc: 'supply voltage' + 'V__REF B': + desc: 'input reference voltage' + 'R__FB B': + desc: 'feedback resistor connection' + 'OUT B': + desc: 'analog current output' specs: - - param: Settling time, V__DD = 5V - val: ["400 (AD7528)", "100 (TLC7528)"] - unit: ns - - param: Update rate, V__DD = 5V - val: ["2.5 (AD7528)", "10 (TLC7528)"] - unit: MHz -... - + - + param: 'Settling time, V__DD = 5V' + val: + - '400 (AD7528)' + - '100 (TLC7528)' + unit: ns + - + param: 'Update rate, V__DD = 5V' + val: + - '2.5 (AD7528)' + - '10 (TLC7528)' + unit: MHz +packages: + DIP: + - AGND + - 'OUT A' + - 'R__FB A' + - 'V__REF A' + - DGND + - '~DACA/DACB' + - '(MSB) DB7' + - DB6 + - DB5 + - DB4 + - DB3 + - DB2 + - DB1 + - 'DB0 (LSB)' + - '~CS' + - '~WR' + - 'V__DD' + - 'V__REF B' + - 'R__FB B' + - 'OUT B' diff --git a/AD7805.yaml b/AD7805.yaml index 6b6ef7c..a91c6b5 100644 --- a/AD7805.yaml +++ b/AD7805.yaml @@ -1,107 +1,110 @@ ---- -description: +3.3V to +5V quad 10-bit DAC -package: DIP -pincount: 28 -family: Analog Devices -datasheet: "http://www.analog.com/static/imported-files/data_sheets/AD7804_7805_7808_7809.pdf" +description: '+3.3V to +5V quad 10-bit DAC' +family: 'Analog Devices' +datasheet: 'http://www.analog.com/static/imported-files/data_sheets/AD7804_7805_7808_7809.pdf' pins: - - num: 1 - sym: AGND - desc: analog ground - - num: 2 - sym: V__OUT B - desc: analog output voltage - - num: 3 - sym: V__OUT A - desc: analog output voltage - - num: 4 - sym: REFOUT - desc: reference output (typically 1.23V) - - num: 5 - sym: DB9 - desc: parallel data input - - num: 6 - sym: DB8 - desc: parallel data input - - num: 7 - sym: DB7 - desc: parallel data input - - num: 8 - sym: DB6 - desc: parallel data input - - num: 9 - sym: DB5 - desc: parallel data input - - num: 10 - sym: DB4 - desc: parallel data input - - num: 11 - sym: ~LDAC - desc: DAC register update (active low) - - num: 12 - sym: DB3 - desc: parallel data input - - num: 13 - sym: DB2 - desc: parallel data input - - num: 14 - sym: DGND - desc: digital ground - - num: 15 - sym: DV__DD - desc: digital power supply - - num: 16 - sym: ~WR - desc: write to data register (active low) - - num: 17 - sym: ~CS - desc: chip select (active low) - - num: 18 - sym: ~CLR - desc: asynchronous clear (active low) - - num: 19 - sym: DB1 - desc: parallel data input - - num: 20 - sym: DB0 - desc: parallel data input - - num: 21 - sym: A1 - desc: DAC address input - - num: 22 - sym: A0 - desc: DAC address input - - num: 23 - sym: MODE - desc: mode input - - num: 24 - sym: REFIN - desc: external reference input - - num: 25 - sym: COMP - desc: compensation pin - - num: 26 - sym: V__OUT D - desc: analog output voltge - - num: 27 - sym: V__OUT C - desc: analog output voltage - - num: 28 - sym: AV__DD - desc: analog power supply + AGND: + desc: 'analog ground' + 'V__OUT B': + desc: 'analog output voltage' + 'V__OUT A': + desc: 'analog output voltage' + REFOUT: + desc: 'reference output (typically 1.23V)' + DB9: + desc: 'parallel data input' + DB8: + desc: 'parallel data input' + DB7: + desc: 'parallel data input' + DB6: + desc: 'parallel data input' + DB5: + desc: 'parallel data input' + DB4: + desc: 'parallel data input' + '~LDAC': + desc: 'DAC register update (active low)' + DB3: + desc: 'parallel data input' + DB2: + desc: 'parallel data input' + DGND: + desc: 'digital ground' + 'DV__DD': + desc: 'digital power supply' + '~WR': + desc: 'write to data register (active low)' + '~CS': + desc: 'chip select (active low)' + '~CLR': + desc: 'asynchronous clear (active low)' + DB1: + desc: 'parallel data input' + DB0: + desc: 'parallel data input' + A1: + desc: 'DAC address input' + A0: + desc: 'DAC address input' + MODE: + desc: 'mode input' + REFIN: + desc: 'external reference input' + COMP: + desc: 'compensation pin' + 'V__OUT D': + desc: 'analog output voltge' + 'V__OUT C': + desc: 'analog output voltage' + 'AV__DD': + desc: 'analog power supply' specs: - - param: Slew rate - val: 2.5 - unit: V/µs - - param: Settling time - val: 1.5 - unit: "µs" - - param: Update rate - val: 667 - unit: kHz - - param: Output voltage range, twos complement coding - val: Vbias ± 15/16*Vbias - units: V - - param: Output voltage range, offset binary coding - val: Vbias/16 to 31/16*Vbias -... + - + param: 'Slew rate' + val: '2.5' + unit: 'V/µs' + - + param: 'Settling time' + val: '1.5' + unit: 'µs' + - + param: 'Update rate' + val: '667' + unit: kHz + - + param: 'Output voltage range, twos complement coding' + val: 'Vbias ± 15/16*Vbias' + units: V + - + param: 'Output voltage range, offset binary coding' + val: 'Vbias/16 to 31/16*Vbias' +packages: + DIP: + - AGND + - 'V__OUT B' + - 'V__OUT A' + - REFOUT + - DB9 + - DB8 + - DB7 + - DB6 + - DB5 + - DB4 + - '~LDAC' + - DB3 + - DB2 + - DGND + - 'DV__DD' + - '~WR' + - '~CS' + - '~CLR' + - DB1 + - DB0 + - A1 + - A0 + - MODE + - REFIN + - COMP + - 'V__OUT D' + - 'V__OUT C' + - 'AV__DD' diff --git a/ADC0808.yaml b/ADC0808.yaml index b9521bd..5aebe33 100644 --- a/ADC0808.yaml +++ b/ADC0808.yaml @@ -1,124 +1,138 @@ ---- -description: "8-bit A/D converter with 8-channel multiplexer" -aliases: [ADC0809] -package: DIP -pincount: 28 -family: "National Semiconductor" -datasheet: "http://www.national.com/ds/DC/ADC0808.pdf" +description: '8-bit A/D converter with 8-channel multiplexer' +aliases: + - ADC0809 +family: 'National Semiconductor' +datasheet: 'http://www.national.com/ds/DC/ADC0808.pdf' pins: - - num: 1 - sym: IN3 - desc: analog input 3 - - num: 2 - sym: IN4 - desc: analog input 4 - - num: 3 - sym: IN5 - desc: analog input 5 - - num: 4 - sym: IN6 - desc: analog input 6 - - num: 5 - sym: IN7 - desc: analog input 7 - - num: 6 - sym: START - desc: start conversion (active high) - - num: 7 - sym: EOC - desc: end of conversion (active high) - - num: 8 - sym: D3 - desc: data bus - - num: 9 - sym: OUTPUT ENABLE - desc: data output enable - - num: 10 - sym: CLOCK - desc: clock input - - num: 11 - sym: V__CC - desc: supply voltage - - num: 12 - sym: V__REF(+) - desc: positive voltage reference - - num: 13 - sym: GND + IN3: + desc: 'analog input 3' + IN4: + desc: 'analog input 4' + IN5: + desc: 'analog input 5' + IN6: + desc: 'analog input 6' + IN7: + desc: 'analog input 7' + START: + desc: 'start conversion (active high)' + EOC: + desc: 'end of conversion (active high)' + D3: + desc: 'data bus' + 'OUTPUT ENABLE': + desc: 'data output enable' + CLOCK: + desc: 'clock input' + 'V__CC': + desc: 'supply voltage' + 'V__REF(+)': + desc: 'positive voltage reference' + GND: desc: ground - - num: 14 - sym: D1 - desc: data bus - - num: 15 - sym: D2 - desc: data bus - - num: 16 - sym: V__REF(-) - desc: negative voltage reference - - num: 17 - sym: D0 - desc: data bus (LSB) - - num: 18 - sym: D4 - desc: data bus - - num: 19 - sym: D5 - desc: data bus - - num: 20 - sym: D6 - desc: data bus - - num: 21 - sym: D7 - desc: data bus (MSB) - - num: 22 - sym: ALE - desc: address latch enable (positive-edge trigger) - - num: 23 - sym: A2 - desc: channel select (MSB) - - num: 24 - sym: A1 - desc: channel select - - num: 25 - sym: A0 - desc: channel select (LSB) - - num: 26 - sym: IN0 - desc: analog channel 0 - - num: 27 - sym: IN1 - desc: analog channel 1 - - num: 28 - sym: IN2 - desc: analog channel 2 + D1: + desc: 'data bus' + D2: + desc: 'data bus' + 'V__REF(-)': + desc: 'negative voltage reference' + D0: + desc: 'data bus (LSB)' + D4: + desc: 'data bus' + D5: + desc: 'data bus' + D6: + desc: 'data bus' + D7: + desc: 'data bus (MSB)' + ALE: + desc: 'address latch enable (positive-edge trigger)' + A2: + desc: 'channel select (MSB)' + A1: + desc: 'channel select' + A0: + desc: 'channel select (LSB)' + IN0: + desc: 'analog channel 0' + IN1: + desc: 'analog channel 1' + IN2: + desc: 'analog channel 2' specs: - - param: "Supply voltage V__CC" - val: 5 - unit: V - - param: "Total unadjusted error" - val: ["±1/2 (ADC0808)", "±1 (ADC0809)"] - unit: LSB - - param: "Input resistance, V__REF(+) to V__REF(-)" - val: 2.5 - unit: "kΩ" - - param: "Analog input voltage range" - val: ["GND-0.10 (min)", "Vcc+0.10 (max)"] - unit: V - - param: "Minimum START pulse width" - val: 100 - unit: ns - - param: "Minimum ALE pulse width" - val: 100 - unit: ns - - param: "Analog mux delay time from ALE" - val: 1 - unit: "µs" - - param: "Conversion time (640 kHz clock frequency)" - val: 100 - unit: "µs" - - param: "Clock frequency" - val: ["10 (min)", "640 (typical)", "1280 (max)"] - unit: kHz + - + param: 'Supply voltage V__CC' + val: '5' + unit: V + - + param: 'Total unadjusted error' + val: + - '±1/2 (ADC0808)' + - '±1 (ADC0809)' + unit: LSB + - + param: 'Input resistance, V__REF(+) to V__REF(-)' + val: '2.5' + unit: 'kΩ' + - + param: 'Analog input voltage range' + val: + - 'GND-0.10 (min)' + - 'Vcc+0.10 (max)' + unit: V + - + param: 'Minimum START pulse width' + val: '100' + unit: ns + - + param: 'Minimum ALE pulse width' + val: '100' + unit: ns + - + param: 'Analog mux delay time from ALE' + val: '1' + unit: 'µs' + - + param: 'Conversion time (640 kHz clock frequency)' + val: '100' + unit: 'µs' + - + param: 'Clock frequency' + val: + - '10 (min)' + - '640 (typical)' + - '1280 (max)' + unit: kHz notes: - - The ADC0808 is a more accurate version of the ADC0809. -... - + - 'The ADC0808 is a more accurate version of the ADC0809.' +packages: + DIP: + - IN3 + - IN4 + - IN5 + - IN6 + - IN7 + - START + - EOC + - D3 + - 'OUTPUT ENABLE' + - CLOCK + - 'V__CC' + - 'V__REF(+)' + - GND + - D1 + - D2 + - 'V__REF(-)' + - D0 + - D4 + - D5 + - D6 + - D7 + - ALE + - A2 + - A1 + - A0 + - IN0 + - IN1 + - IN2 diff --git a/ATMEGA168.yaml b/ATMEGA168.yaml index 80b0e0d..30b4081 100644 --- a/ATMEGA168.yaml +++ b/ATMEGA168.yaml @@ -1,111 +1,125 @@ ---- -name: ATmega168 -description: 8-bit AVR® microcontroller -aliases: [ATmega48, ATmega88, ATmega328P] -package: DIP -pincount: 28 -family: Atmel -datasheet: "http://www.atmel.com/dyn/resources/prod_documents/doc2545.pdf" +name: ATmega168 +description: '8-bit AVR® microcontroller' +aliases: + - ATmega48 + - ATmega88 + - ATmega328P +family: Atmel +datasheet: 'http://www.atmel.com/dyn/resources/prod_documents/doc2545.pdf' pins: - - num: 1 - sym: (PCINT14/~RESET) PC6 - desc: reset (active low); port C - - num: 2 - sym: (PCINT16/RXD) PD0 - desc: port D - - num: 3 - sym: (PCINT17/TXD) PD1 - desc: port D - - num: 4 - sym: (PCINT18/INT0) PD2 - desc: external interrupt 0; port D - - num: 5 - sym: (PCINT19/OC2B/INT1) PD3 - desc: external interrupt 1; port D - - num: 6 - sym: (PCINT20/XCK/T0) PD4 - desc: port D - - num: 7 - sym: Vcc - desc: supply voltage - - num: 8 - sym: GND + '(PCINT14/~RESET) PC6': + desc: 'reset (active low); port C' + '(PCINT16/RXD) PD0': + desc: 'port D' + '(PCINT17/TXD) PD1': + desc: 'port D' + '(PCINT18/INT0) PD2': + desc: 'external interrupt 0; port D' + '(PCINT19/OC2B/INT1) PD3': + desc: 'external interrupt 1; port D' + '(PCINT20/XCK/T0) PD4': + desc: 'port D' + Vcc: + desc: 'supply voltage' + GND: desc: ground - - num: 9 - sym: (PCINT6/XTAL1/TOSC1) PB6 - desc: clock oscillator pin 1; port B - - num: 10 - sym: (PCINT17/XTAL2/TOSC2) PB7 - desc: clock oscillator pin 2; port B - - num: 11 - sym: (PCINT21/OC0B/T1) PD5 - desc: port D - - num: 12 - sym: (PCINT22/OC0A/AIN0) PD6 - desc: port D - - num: 13 - sym: (PCINT23/AIN1) PD7 - desc: port D - - num: 14 - sym: (PCINT0/CLKO/ICP1) PB0 - desc: clock output; port B - - num: 15 - sym: PB1 (OC1A/PCINT1) - desc: port B - - num: 16 - sym: PB2 (~SS/OC1B/PCINT2) - desc: SPI slave select; port B - - num: 17 - sym: PB3 (MOSI/OC2A/PCINT3) - desc: SPI master output/slave input; port B - - num: 18 - sym: PB4 (MISO/PCINT4) - desc: SPI master input/slave output; port B - - num: 19 - sym: PB5 (SCK/PCINT5) - desc: SPI master clock; port B - - num: 20 - sym: AVcc - desc: A/D converter supply voltage - - num: 21 - sym: AREF - desc: analog reference for A/D converter - - num: 22 - sym: GND - desc: ground - - num: 23 - sym: PC0 (ADC0/PCINT8) - desc: port C - - num: 24 - sym: PC1 (ADC1/PCINT9) - desc: port C - - num: 25 - sym: PC2 (ADC2/PCINT10) - desc: port C - - num: 26 - sym: PC3 (ADC3/PCINT11) - desc: port C - - num: 27 - sym: PC4 (ADC4/SDA/PCINT12) - desc: I2C Data pin; port C - - num: 28 - sym: PC5 (ADC5/SCL/PCINT13) - desc: I2C Clock pin; port C + '(PCINT6/XTAL1/TOSC1) PB6': + desc: 'clock oscillator pin 1; port B' + '(PCINT17/XTAL2/TOSC2) PB7': + desc: 'clock oscillator pin 2; port B' + '(PCINT21/OC0B/T1) PD5': + desc: 'port D' + '(PCINT22/OC0A/AIN0) PD6': + desc: 'port D' + '(PCINT23/AIN1) PD7': + desc: 'port D' + '(PCINT0/CLKO/ICP1) PB0': + desc: 'clock output; port B' + 'PB1 (OC1A/PCINT1)': + desc: 'port B' + 'PB2 (~SS/OC1B/PCINT2)': + desc: 'SPI slave select; port B' + 'PB3 (MOSI/OC2A/PCINT3)': + desc: 'SPI master output/slave input; port B' + 'PB4 (MISO/PCINT4)': + desc: 'SPI master input/slave output; port B' + 'PB5 (SCK/PCINT5)': + desc: 'SPI master clock; port B' + AVcc: + desc: 'A/D converter supply voltage' + AREF: + desc: 'analog reference for A/D converter' + 'PC0 (ADC0/PCINT8)': + desc: 'port C' + 'PC1 (ADC1/PCINT9)': + desc: 'port C' + 'PC2 (ADC2/PCINT10)': + desc: 'port C' + 'PC3 (ADC3/PCINT11)': + desc: 'port C' + 'PC4 (ADC4/SDA/PCINT12)': + desc: 'I2C Data pin; port C' + 'PC5 (ADC5/SCL/PCINT13)': + desc: 'I2C Clock pin; port C' specs: - - param: Flash memory - val: [4K (ATmega48), 8K (ATmega88), 16K (ATmega168), 32K (ATmega328P)] - unit: bytes - - param: Internal SRAM - val: [512 (ATmega48), 1K (ATmega88), 1K (ATmega168), 2K (ATmega328P)] - unit: bytes - - param: EEPROM - val: [256 (ATmega48), 512 (ATmega88), 512 (ATmega168), 1K (ATmega328P)] - unit: bytes - - param: Programmable I/O lines - val: 23 - - param: Maximum clock frequency - val: 20 - unit: MHz -... - - + - + param: 'Flash memory' + val: + - '4K (ATmega48)' + - '8K (ATmega88)' + - '16K (ATmega168)' + - '32K (ATmega328P)' + unit: bytes + - + param: 'Internal SRAM' + val: + - '512 (ATmega48)' + - '1K (ATmega88)' + - '1K (ATmega168)' + - '2K (ATmega328P)' + unit: bytes + - + param: EEPROM + val: + - '256 (ATmega48)' + - '512 (ATmega88)' + - '512 (ATmega168)' + - '1K (ATmega328P)' + unit: bytes + - + param: 'Programmable I/O lines' + val: '23' + - + param: 'Maximum clock frequency' + val: '20' + unit: MHz +packages: + DIP: + - '(PCINT14/~RESET) PC6' + - '(PCINT16/RXD) PD0' + - '(PCINT17/TXD) PD1' + - '(PCINT18/INT0) PD2' + - '(PCINT19/OC2B/INT1) PD3' + - '(PCINT20/XCK/T0) PD4' + - Vcc + - GND + - '(PCINT6/XTAL1/TOSC1) PB6' + - '(PCINT17/XTAL2/TOSC2) PB7' + - '(PCINT21/OC0B/T1) PD5' + - '(PCINT22/OC0A/AIN0) PD6' + - '(PCINT23/AIN1) PD7' + - '(PCINT0/CLKO/ICP1) PB0' + - 'PB1 (OC1A/PCINT1)' + - 'PB2 (~SS/OC1B/PCINT2)' + - 'PB3 (MOSI/OC2A/PCINT3)' + - 'PB4 (MISO/PCINT4)' + - 'PB5 (SCK/PCINT5)' + - AVcc + - AREF + - GND + - 'PC0 (ADC0/PCINT8)' + - 'PC1 (ADC1/PCINT9)' + - 'PC2 (ADC2/PCINT10)' + - 'PC3 (ADC3/PCINT11)' + - 'PC4 (ADC4/SDA/PCINT12)' + - 'PC5 (ADC5/SCL/PCINT13)' diff --git a/ATMEGA32.yaml b/ATMEGA32.yaml index 9c72374..f305f15 100644 --- a/ATMEGA32.yaml +++ b/ATMEGA32.yaml @@ -1,144 +1,149 @@ ---- -name: ATmega32 -description: "8-bit AVR® microcontroller" -aliases: [ATmega16] -package: DIP -pincount: 40 -family: Atmel -datasheet: "http://www.atmel.com/dyn/resources/prod_documents/doc8155.pdf" +name: ATmega32 +description: '8-bit AVR® microcontroller' +aliases: + - ATmega16 +family: Atmel +datasheet: 'http://www.atmel.com/dyn/resources/prod_documents/doc8155.pdf' pins: - - num: 1 - sym: (XCK0/T0) PB0 - desc: port B - - num: 2 - sym: (T1) PB1 - desc: port B - - num: 3 - sym: (INT2/AIN0) PB2 - desc: external interrupt 2; port B - - num: 4 - sym: (OC0/AIN1) PB3 - desc: port B - - num: 5 - sym: (~SS~) PB4 - desc: SPI slave select; port B - - num: 6 - sym: (MOSI) PB5 - desc: SPI master output/slave input; port B - - num: 7 - sym: (MISO) PB6 - desc: SPI master input/slave output; port B - - num: 8 - sym: (SCK) PB7 - desc: SPI master clock; port B - - num: 9 - sym: ~RESET - desc: reset (active low) - - num: 10 - sym: Vcc - desc: supply voltage - - num: 11 - sym: GND + '(XCK0/T0) PB0': + desc: 'port B' + '(T1) PB1': + desc: 'port B' + '(INT2/AIN0) PB2': + desc: 'external interrupt 2; port B' + '(OC0/AIN1) PB3': + desc: 'port B' + '(~SS~) PB4': + desc: 'SPI slave select; port B' + '(MOSI) PB5': + desc: 'SPI master output/slave input; port B' + '(MISO) PB6': + desc: 'SPI master input/slave output; port B' + '(SCK) PB7': + desc: 'SPI master clock; port B' + '~RESET': + desc: 'reset (active low)' + Vcc: + desc: 'supply voltage' + GND: desc: ground - - num: 12 - sym: XTAL2 - desc: clock oscillator pin 2 - - num: 13 - sym: XTAL1 - desc: clock oscillator pin 1 - - num: 14 - sym: (RXD) PD0 - desc: UART receive; port D - - num: 15 - sym: (TXD) PD1 - desc: UART transmit; port D - - num: 16 - sym: (INT0) PD2 - desc: external interrupt 0; port D - - num: 17 - sym: (INT1) PD3 - desc: external interrupt 1; port D - - num: 18 - sym: (OC1B) PD4 - desc: port D - - num: 19 - sym: (OC1A) PD5 - desc: port D - - num: 20 - sym: (ICP1) PD6 - desc: port D - - num: 21 - sym: PD7 (OC2) - desc: port D - - num: 22 - sym: PC0 (SCL) - desc: 2-wire clock line; port C - - num: 23 - sym: PC1 (SDA) - desc: 2-wire data line; port C - - num: 24 - sym: PC2 (TCK) - desc: JTAG test clock; port C - - num: 25 - sym: PC3 (TMS) - desc: JTAG test mode select; port C - - num: 26 - sym: PC4 (TDO) - desc: JTAG test data output; port C - - num: 27 - sym: PC5 (TDI) - desc: JTAG test data input; port C - - num: 28 - sym: PC6 (TOSC1) - desc: timer oscillator pin 1; port C - - num: 29 - sym: PC7 (TOSC2) - desc: timer oscillator pin 2; port C - - num: 30 - sym: AVcc - desc: A/D converter supply voltage - - num: 31 - sym: GND - desc: ground - - num: 32 - sym: AREF - desc: analog reference for A/D converter - - num: 33 - sym: PA7 (ADC7) - desc: port A - - num: 34 - sym: PA6 (ADC6) - desc: port A - - num: 35 - sym: PA5 (ADC5) - desc: port A - - num: 36 - sym: PA4 (ADC4) - desc: port A - - num: 37 - sym: PA3 (ADC3) - desc: port A - - num: 38 - sym: PA2 (ADC2) - desc: port A - - num: 39 - sym: PA1 (ADC1) - desc: port A - - num: 40 - sym: PA0 (ADC0) - desc: port A + XTAL2: + desc: 'clock oscillator pin 2' + XTAL1: + desc: 'clock oscillator pin 1' + '(RXD) PD0': + desc: 'UART receive; port D' + '(TXD) PD1': + desc: 'UART transmit; port D' + '(INT0) PD2': + desc: 'external interrupt 0; port D' + '(INT1) PD3': + desc: 'external interrupt 1; port D' + '(OC1B) PD4': + desc: 'port D' + '(OC1A) PD5': + desc: 'port D' + '(ICP1) PD6': + desc: 'port D' + 'PD7 (OC2)': + desc: 'port D' + 'PC0 (SCL)': + desc: '2-wire clock line; port C' + 'PC1 (SDA)': + desc: '2-wire data line; port C' + 'PC2 (TCK)': + desc: 'JTAG test clock; port C' + 'PC3 (TMS)': + desc: 'JTAG test mode select; port C' + 'PC4 (TDO)': + desc: 'JTAG test data output; port C' + 'PC5 (TDI)': + desc: 'JTAG test data input; port C' + 'PC6 (TOSC1)': + desc: 'timer oscillator pin 1; port C' + 'PC7 (TOSC2)': + desc: 'timer oscillator pin 2; port C' + AVcc: + desc: 'A/D converter supply voltage' + AREF: + desc: 'analog reference for A/D converter' + 'PA7 (ADC7)': + desc: 'port A' + 'PA6 (ADC6)': + desc: 'port A' + 'PA5 (ADC5)': + desc: 'port A' + 'PA4 (ADC4)': + desc: 'port A' + 'PA3 (ADC3)': + desc: 'port A' + 'PA2 (ADC2)': + desc: 'port A' + 'PA1 (ADC1)': + desc: 'port A' + 'PA0 (ADC0)': + desc: 'port A' specs: - - param: Flash memory - val: [16K (ATmega16), 32K (ATmega32)] - unit: bytes - - param: Internal SRAM - val: [1K (ATmega16), 2K (ATmega32)] - unit: bytes - - param: EEPROM - val: [512 (ATmega16), 1K (ATmega32)] - unit: bytes - - param: Programmable I/O lines - val: 32 -... - - + - + param: 'Flash memory' + val: + - '16K (ATmega16)' + - '32K (ATmega32)' + unit: bytes + - + param: 'Internal SRAM' + val: + - '1K (ATmega16)' + - '2K (ATmega32)' + unit: bytes + - + param: EEPROM + val: + - '512 (ATmega16)' + - '1K (ATmega32)' + unit: bytes + - + param: 'Programmable I/O lines' + val: '32' +packages: + DIP: + - '(XCK0/T0) PB0' + - '(T1) PB1' + - '(INT2/AIN0) PB2' + - '(OC0/AIN1) PB3' + - '(~SS~) PB4' + - '(MOSI) PB5' + - '(MISO) PB6' + - '(SCK) PB7' + - '~RESET' + - Vcc + - GND + - XTAL2 + - XTAL1 + - '(RXD) PD0' + - '(TXD) PD1' + - '(INT0) PD2' + - '(INT1) PD3' + - '(OC1B) PD4' + - '(OC1A) PD5' + - '(ICP1) PD6' + - 'PD7 (OC2)' + - 'PC0 (SCL)' + - 'PC1 (SDA)' + - 'PC2 (TCK)' + - 'PC3 (TMS)' + - 'PC4 (TDO)' + - 'PC5 (TDI)' + - 'PC6 (TOSC1)' + - 'PC7 (TOSC2)' + - AVcc + - GND + - AREF + - 'PA7 (ADC7)' + - 'PA6 (ADC6)' + - 'PA5 (ADC5)' + - 'PA4 (ADC4)' + - 'PA3 (ADC3)' + - 'PA2 (ADC2)' + - 'PA1 (ADC1)' + - 'PA0 (ADC0)' diff --git a/ATMEGA644P.yaml b/ATMEGA644P.yaml index 5f5c0fb..4566803 100644 --- a/ATMEGA644P.yaml +++ b/ATMEGA644P.yaml @@ -1,146 +1,159 @@ ---- -name: ATmega644P -description: "8-bit AVR® microcontroller" -aliases: [ATmega164P, ATmega324P, ATmega1284P] -package: DIP -pincount: 40 -family: Atmel -datasheet: "http://www.atmel.com/dyn/resources/prod_documents/doc8011.pdf" +name: ATmega644P +description: '8-bit AVR® microcontroller' +aliases: + - ATmega164P + - ATmega324P + - ATmega1284P +family: Atmel +datasheet: 'http://www.atmel.com/dyn/resources/prod_documents/doc8011.pdf' pins: - - num: 1 - sym: (PCINT8/XCK0/T0) PB0 - desc: port B - - num: 2 - sym: (PCINT9/CLKO/T1) PB1 - desc: clock output; port B - - num: 3 - sym: (PCINT10/INT2/AIN0) PB2 - desc: external interrupt 2; port B - - num: 4 - sym: (PCINT11/OC0A/AIN1) PB3 - desc: port B - - num: 5 - sym: (PCINT12/OC0B/~SS~) PB4 - desc: SPI slave select; port B - - num: 6 - sym: (PCINT13/ICP3*/MOSI) PB5 - desc: SPI master output/slave input; port B - - num: 7 - sym: (PCINT14/OC3A*/MISO) PB6 - desc: SPI master input/slave output; port B - - num: 8 - sym: (PCINT15/OC3B*/SCK) PB7 - desc: SPI master clock; port B - - num: 9 - sym: ~RESET - desc: reset (active low) - - num: 10 - sym: Vcc - desc: supply voltage - - num: 11 - sym: GND + '(PCINT8/XCK0/T0) PB0': + desc: 'port B' + '(PCINT9/CLKO/T1) PB1': + desc: 'clock output; port B' + '(PCINT10/INT2/AIN0) PB2': + desc: 'external interrupt 2; port B' + '(PCINT11/OC0A/AIN1) PB3': + desc: 'port B' + '(PCINT12/OC0B/~SS~) PB4': + desc: 'SPI slave select; port B' + '(PCINT13/ICP3*/MOSI) PB5': + desc: 'SPI master output/slave input; port B' + '(PCINT14/OC3A*/MISO) PB6': + desc: 'SPI master input/slave output; port B' + '(PCINT15/OC3B*/SCK) PB7': + desc: 'SPI master clock; port B' + '~RESET': + desc: 'reset (active low)' + Vcc: + desc: 'supply voltage' + GND: desc: ground - - num: 12 - sym: XTAL2 - desc: clock oscillator pin 2 - - num: 13 - sym: XTAL1 - desc: clock oscillator pin 1 - - num: 14 - sym: (PCINT24/RXD0) PD0 - desc: port D - - num: 15 - sym: (PCINT25/TXD0) PD1 - desc: port D - - num: 16 - sym: (PCINT26/RXD1/INT0) PD2 - desc: external interrupt 0; port D - - num: 17 - sym: (PCINT27/TXD1/INT1) PD3 - desc: external interrupt 1; port D - - num: 18 - sym: (PCINT28/XCK1/OC1B) PD4 - desc: port D - - num: 19 - sym: (PCINT29/OC1A) PD5 - desc: port D - - num: 20 - sym: (PCINT30/OC2B/ICP) PD6 - desc: port D - - num: 21 - sym: PD7 (OC2A/PCINT31) - desc: port D - - num: 22 - sym: PC0 (SCL/PCINT16) - desc: 2-wire clock line; port C - - num: 23 - sym: PC1 (SDA/PCINT17) - desc: 2-wire data line; port C - - num: 24 - sym: PC2 (TCK/PCINT18) - desc: JTAG test clock; port C - - num: 25 - sym: PC3 (TMS/PCINT19) - desc: JTAG test mode select; port C - - num: 26 - sym: PC4 (TDO/PCINT20) - desc: JTAG test data output; port C - - num: 27 - sym: PC5 (TDI/PCINT21) - desc: JTAG test data input; port C - - num: 28 - sym: PC6 (TOSC1/PCINT22) - desc: timer oscillator pin 1; port C - - num: 29 - sym: PC7 (TOSC2/PCINT23) - desc: timer oscillator pin 2; port C - - num: 30 - sym: AVcc - desc: A/D converter supply voltage - - num: 31 - sym: GND - desc: ground - - num: 32 - sym: AREF - desc: analog reference for A/D converter - - num: 33 - sym: PA7 (ADC7/PCINT7) - desc: port A - - num: 34 - sym: PA6 (ADC6/PCINT6) - desc: port A - - num: 35 - sym: PA5 (ADC5/PCINT5) - desc: port A - - num: 36 - sym: PA4 (ADC4/PCINT4) - desc: port A - - num: 37 - sym: PA3 (ADC3/PCINT3) - desc: port A - - num: 38 - sym: PA2 (ADC2/PCINT2) - desc: port A - - num: 39 - sym: PA1 (ADC1/PCINT1) - desc: port A - - num: 40 - sym: PA0 (ADC0/PCINT0) - desc: port A + XTAL2: + desc: 'clock oscillator pin 2' + XTAL1: + desc: 'clock oscillator pin 1' + '(PCINT24/RXD0) PD0': + desc: 'port D' + '(PCINT25/TXD0) PD1': + desc: 'port D' + '(PCINT26/RXD1/INT0) PD2': + desc: 'external interrupt 0; port D' + '(PCINT27/TXD1/INT1) PD3': + desc: 'external interrupt 1; port D' + '(PCINT28/XCK1/OC1B) PD4': + desc: 'port D' + '(PCINT29/OC1A) PD5': + desc: 'port D' + '(PCINT30/OC2B/ICP) PD6': + desc: 'port D' + 'PD7 (OC2A/PCINT31)': + desc: 'port D' + 'PC0 (SCL/PCINT16)': + desc: '2-wire clock line; port C' + 'PC1 (SDA/PCINT17)': + desc: '2-wire data line; port C' + 'PC2 (TCK/PCINT18)': + desc: 'JTAG test clock; port C' + 'PC3 (TMS/PCINT19)': + desc: 'JTAG test mode select; port C' + 'PC4 (TDO/PCINT20)': + desc: 'JTAG test data output; port C' + 'PC5 (TDI/PCINT21)': + desc: 'JTAG test data input; port C' + 'PC6 (TOSC1/PCINT22)': + desc: 'timer oscillator pin 1; port C' + 'PC7 (TOSC2/PCINT23)': + desc: 'timer oscillator pin 2; port C' + AVcc: + desc: 'A/D converter supply voltage' + AREF: + desc: 'analog reference for A/D converter' + 'PA7 (ADC7/PCINT7)': + desc: 'port A' + 'PA6 (ADC6/PCINT6)': + desc: 'port A' + 'PA5 (ADC5/PCINT5)': + desc: 'port A' + 'PA4 (ADC4/PCINT4)': + desc: 'port A' + 'PA3 (ADC3/PCINT3)': + desc: 'port A' + 'PA2 (ADC2/PCINT2)': + desc: 'port A' + 'PA1 (ADC1/PCINT1)': + desc: 'port A' + 'PA0 (ADC0/PCINT0)': + desc: 'port A' specs: - - param: Flash memory - val: [16K (ATmega164P), 32K (ATmega324P), 64K (ATmega644P), 128K (ATmega1284P)] - unit: bytes - - param: Internal SRAM - val: [1K (ATmega164P), 2K (ATmega324P), 4K (ATmega644P), 16K (ATmega1284P)] - unit: bytes - - param: EEPROM - val: [512 (ATmega164P), 1K (ATmega324P), 2K (ATmega644P), 4K (ATmega1284P)] - unit: bytes - - param: Programmable I/O lines - val: 32 + - + param: 'Flash memory' + val: + - '16K (ATmega164P)' + - '32K (ATmega324P)' + - '64K (ATmega644P)' + - '128K (ATmega1284P)' + unit: bytes + - + param: 'Internal SRAM' + val: + - '1K (ATmega164P)' + - '2K (ATmega324P)' + - '4K (ATmega644P)' + - '16K (ATmega1284P)' + unit: bytes + - + param: EEPROM + val: + - '512 (ATmega164P)' + - '1K (ATmega324P)' + - '2K (ATmega644P)' + - '4K (ATmega1284P)' + unit: bytes + - + param: 'Programmable I/O lines' + val: '32' notes: - - * ICP3, OC3A, OC3B present on ATmega1284P only -... - - + - 'ICP3, OC3A, OC3B present on ATmega1284P only' +packages: + DIP: + - '(PCINT8/XCK0/T0) PB0' + - '(PCINT9/CLKO/T1) PB1' + - '(PCINT10/INT2/AIN0) PB2' + - '(PCINT11/OC0A/AIN1) PB3' + - '(PCINT12/OC0B/~SS~) PB4' + - '(PCINT13/ICP3*/MOSI) PB5' + - '(PCINT14/OC3A*/MISO) PB6' + - '(PCINT15/OC3B*/SCK) PB7' + - '~RESET' + - Vcc + - GND + - XTAL2 + - XTAL1 + - '(PCINT24/RXD0) PD0' + - '(PCINT25/TXD0) PD1' + - '(PCINT26/RXD1/INT0) PD2' + - '(PCINT27/TXD1/INT1) PD3' + - '(PCINT28/XCK1/OC1B) PD4' + - '(PCINT29/OC1A) PD5' + - '(PCINT30/OC2B/ICP) PD6' + - 'PD7 (OC2A/PCINT31)' + - 'PC0 (SCL/PCINT16)' + - 'PC1 (SDA/PCINT17)' + - 'PC2 (TCK/PCINT18)' + - 'PC3 (TMS/PCINT19)' + - 'PC4 (TDO/PCINT20)' + - 'PC5 (TDI/PCINT21)' + - 'PC6 (TOSC1/PCINT22)' + - 'PC7 (TOSC2/PCINT23)' + - AVcc + - GND + - AREF + - 'PA7 (ADC7/PCINT7)' + - 'PA6 (ADC6/PCINT6)' + - 'PA5 (ADC5/PCINT5)' + - 'PA4 (ADC4/PCINT4)' + - 'PA3 (ADC3/PCINT3)' + - 'PA2 (ADC2/PCINT2)' + - 'PA1 (ADC1/PCINT1)' + - 'PA0 (ADC0/PCINT0)' diff --git a/ATMEGA8.yaml b/ATMEGA8.yaml index 09ca3c2..c8fe482 100644 --- a/ATMEGA8.yaml +++ b/ATMEGA8.yaml @@ -1,109 +1,109 @@ ---- -name: ATmega8 -description: 8-bit AVR® microcontroller -package: DIP -pincount: 28 -family: Atmel -datasheet: "http://www.atmel.com/dyn/resources/prod_documents/doc2486.pdf" +name: ATmega8 +description: '8-bit AVR® microcontroller' +family: Atmel +datasheet: 'http://www.atmel.com/dyn/resources/prod_documents/doc2486.pdf' pins: - - num: 1 - sym: (~RESET) PC6 - desc: reset (active low); port C - - num: 2 - sym: (RXD) PD0 - desc: UART receive; port D - - num: 3 - sym: (TXD) PD1 - desc: UART transmit; port D - - num: 4 - sym: (INT0) PD2 - desc: external interrupt 0; port D - - num: 5 - sym: (INT1) PD3 - desc: external interrupt 1; port D - - num: 6 - sym: (XCK/T0) PD4 - desc: port D - - num: 7 - sym: Vcc - desc: supply voltage - - num: 8 - sym: GND + '(~RESET) PC6': + desc: 'reset (active low); port C' + '(RXD) PD0': + desc: 'UART receive; port D' + '(TXD) PD1': + desc: 'UART transmit; port D' + '(INT0) PD2': + desc: 'external interrupt 0; port D' + '(INT1) PD3': + desc: 'external interrupt 1; port D' + '(XCK/T0) PD4': + desc: 'port D' + Vcc: + desc: 'supply voltage' + GND: desc: ground - - num: 9 - sym: (XTAL1/TOSC1) PB6 - desc: clock oscillator pin 1; port B - - num: 10 - sym: (XTAL2/TOSC2) PB7 - desc: clock oscillator pin 2; port B - - num: 11 - sym: (T1) PD5 - desc: port D - - num: 12 - sym: (AIN0) PD6 - desc: port D - - num: 13 - sym: (AIN1) PD7 - desc: port D - - num: 14 - sym: (ICP1) PB0 - desc: port B - - num: 15 - sym: PB1 (OC1A) - desc: port B - - num: 16 - sym: PB2 (SS/OC1B) - desc: SPI slave select; port B - - num: 17 - sym: PB3 (MOSI/OC2) - desc: SPI master output/slave input; port B - - num: 18 - sym: PB4 (MISO) - desc: SPI master input/slave output; port B - - num: 19 - sym: PB5 (SCK) - desc: SPI master clock; port B - - num: 20 - sym: AVcc - desc: A/D converter supply voltage - - num: 21 - sym: AREF - desc: analog reference for A/D converter - - num: 22 - sym: GND - desc: ground - - num: 23 - sym: PC0 (ADC0) - desc: port C - - num: 24 - sym: PC1 (ADC1) - desc: port C - - num: 25 - sym: PC2 (ADC2) - desc: port C - - num: 26 - sym: PC3 (ADC3) - desc: port C - - num: 27 - sym: PC4 (ADC4/SCL) - desc: 2-wire clock; port C - - num: 28 - sym: PC5 (ADC5/SDA) - desc: 2-wire data; port C + '(XTAL1/TOSC1) PB6': + desc: 'clock oscillator pin 1; port B' + '(XTAL2/TOSC2) PB7': + desc: 'clock oscillator pin 2; port B' + '(T1) PD5': + desc: 'port D' + '(AIN0) PD6': + desc: 'port D' + '(AIN1) PD7': + desc: 'port D' + '(ICP1) PB0': + desc: 'port B' + 'PB1 (OC1A)': + desc: 'port B' + 'PB2 (SS/OC1B)': + desc: 'SPI slave select; port B' + 'PB3 (MOSI/OC2)': + desc: 'SPI master output/slave input; port B' + 'PB4 (MISO)': + desc: 'SPI master input/slave output; port B' + 'PB5 (SCK)': + desc: 'SPI master clock; port B' + AVcc: + desc: 'A/D converter supply voltage' + AREF: + desc: 'analog reference for A/D converter' + 'PC0 (ADC0)': + desc: 'port C' + 'PC1 (ADC1)': + desc: 'port C' + 'PC2 (ADC2)': + desc: 'port C' + 'PC3 (ADC3)': + desc: 'port C' + 'PC4 (ADC4/SCL)': + desc: '2-wire clock; port C' + 'PC5 (ADC5/SDA)': + desc: '2-wire data; port C' specs: - - param: Flash memory - val: 8K - unit: bytes - - param: Internal SRAM - val: 1K - unit: bytes - - param: EEPROM - val: 512 - unit: bytes - - param: Programmable I/O lines - val: 23 - - param: Maximum clock frequency - val: 16 - unit: MHz -... - + - + param: 'Flash memory' + val: 8K + unit: bytes + - + param: 'Internal SRAM' + val: 1K + unit: bytes + - + param: EEPROM + val: '512' + unit: bytes + - + param: 'Programmable I/O lines' + val: '23' + - + param: 'Maximum clock frequency' + val: '16' + unit: MHz +packages: + DIP: + - '(~RESET) PC6' + - '(RXD) PD0' + - '(TXD) PD1' + - '(INT0) PD2' + - '(INT1) PD3' + - '(XCK/T0) PD4' + - Vcc + - GND + - '(XTAL1/TOSC1) PB6' + - '(XTAL2/TOSC2) PB7' + - '(T1) PD5' + - '(AIN0) PD6' + - '(AIN1) PD7' + - '(ICP1) PB0' + - 'PB1 (OC1A)' + - 'PB2 (SS/OC1B)' + - 'PB3 (MOSI/OC2)' + - 'PB4 (MISO)' + - 'PB5 (SCK)' + - AVcc + - AREF + - GND + - 'PC0 (ADC0)' + - 'PC1 (ADC1)' + - 'PC2 (ADC2)' + - 'PC3 (ADC3)' + - 'PC4 (ADC4/SCL)' + - 'PC5 (ADC5/SDA)' diff --git a/ATTINY12.yaml b/ATTINY12.yaml index 3029bb3..a7633fe 100644 --- a/ATTINY12.yaml +++ b/ATTINY12.yaml @@ -1,58 +1,72 @@ ---- -name: ATTiny12 -description: "8-Bit AVR® microcontroller with 1 kb In-system programmable flash memory" -aliases: [ATTiny12V-1, ATTiny12L-4, ATTiny12-8] -package: DIP -pincount: 8 -family: "atmel" -datasheet: "http://www.atmel.com/dyn/resources/prod_documents/doc1006.pdf" +name: ATTiny12 +description: '8-Bit AVR® microcontroller with 1 kb In-system programmable flash memory' +aliases: + - ATTiny12V-1 + - ATTiny12L-4 + - ATTiny12-8 +family: atmel +datasheet: 'http://www.atmel.com/dyn/resources/prod_documents/doc1006.pdf' pins: - - num: 1 - sym: PB5 / ~RESET~ - desc: PB5 / chip reset (active low) - - num: 2 - sym: PB3 / XTAL1 - desc: PB3 / Inverting oscillator amplifier input - - num: 3 - sym: PB4 / XTAL2 - desc: PB4 / Inverting oscillator amplifier output - - num: 4 - sym: GND + 'PB5 / ~RESET~': + desc: 'PB5 / chip reset (active low)' + 'PB3 / XTAL1': + desc: 'PB3 / Inverting oscillator amplifier input' + 'PB4 / XTAL2': + desc: 'PB4 / Inverting oscillator amplifier output' + GND: desc: Ground - - num: 5 - sym: PB0 / AIN0 / MOSI - desc: PB0 / Analog comparator positive input / Serial programming input - - num: 6 - sym: PB1 / INT0 / AIN1 / MISO - desc: PB1 / External interrupt 0 / Analog comparator negative input / Serial programming input - - num: 7 - sym: PB2 / T0 / SCK - desc: PB2 / Timer/Counter 0 external counter input / Serial clock - - num: 8 - sym: V__CC - desc: Supply voltage + 'PB0 / AIN0 / MOSI': + desc: 'PB0 / Analog comparator positive input / Serial programming input' + 'PB1 / INT0 / AIN1 / MISO': + desc: 'PB1 / External interrupt 0 / Analog comparator negative input / Serial programming input' + 'PB2 / T0 / SCK': + desc: 'PB2 / Timer/Counter 0 external counter input / Serial clock' + 'V__CC': + desc: 'Supply voltage' specs: - - param: "Flash program memory" - val: 1 - unit: "kb" - - param: "EEPROM memory" - val: 64 - unit: "bytes" - - param: "Operating voltage" - val: [1.8-5.5 (ATTiny12V-1), 2.7-5.5 (ATTiny12L-4), 4.0-5.5 (ATTiny12-8)] - unit: "V" - - param: "Speed grade" - val: [0-1.2 (ATTiny12V-1), 0-4 (ATTiny12L-4), 0-8 (ATTiny12-8)] - unit: "MHz" - - param: "Active power consumption (at 4 MHz, 3V)" - val: 2.2 - unit: "mA" - - param: "Idle mode power consumption (at 4 MHz, 3V)" - val: 0.5 - unit: "mA" - - param: "Power-down mode power consumption (at 4 MHz, 3V)" - val: < 1 - unit: "µA" + - + param: 'Flash program memory' + val: '1' + unit: kb + - + param: 'EEPROM memory' + val: '64' + unit: bytes + - + param: 'Operating voltage' + val: + - '1.8-5.5 (ATTiny12V-1)' + - '2.7-5.5 (ATTiny12L-4)' + - '4.0-5.5 (ATTiny12-8)' + unit: V + - + param: 'Speed grade' + val: + - '0-1.2 (ATTiny12V-1)' + - '0-4 (ATTiny12L-4)' + - '0-8 (ATTiny12-8)' + unit: MHz + - + param: 'Active power consumption (at 4 MHz, 3V)' + val: '2.2' + unit: mA + - + param: 'Idle mode power consumption (at 4 MHz, 3V)' + val: '0.5' + unit: mA + - + param: 'Power-down mode power consumption (at 4 MHz, 3V)' + val: '< 1' + unit: 'µA' notes: - - "Also availablle in SOIC package (same pinout)" - + - 'Also availablle in SOIC package (same pinout)' +packages: + DIP: + - 'PB5 / ~RESET~' + - 'PB3 / XTAL1' + - 'PB4 / XTAL2' + - GND + - 'PB0 / AIN0 / MOSI' + - 'PB1 / INT0 / AIN1 / MISO' + - 'PB2 / T0 / SCK' + - 'V__CC' diff --git a/ATTINY13.yaml b/ATTINY13.yaml index 5c122a7..e1a0218 100644 --- a/ATTINY13.yaml +++ b/ATTINY13.yaml @@ -1,49 +1,51 @@ ---- -name: ATtiny13 -description: "8-bit AVR® microcontroller" -package: DIP -pincount: 8 -family: "Atmel" -datasheet: "http://www.atmel.com/dyn/resources/prod_documents/doc2535.pdf" +name: ATtiny13 +description: '8-bit AVR® microcontroller' +family: Atmel +datasheet: 'http://www.atmel.com/dyn/resources/prod_documents/doc2535.pdf' pins: - - num: 1 - sym: (PCINT5/~RESET~/ADC0/dW) PB5 - desc: reset (active low); port B - - num: 2 - sym: (PCINT3/CLKI/ADC3) PB3 - desc: external clock input; port B - - num: 3 - sym: (PCINT4/ADC2) PB4 - desc: port B - - num: 4 - sym: GND + '(PCINT5/~RESET~/ADC0/dW) PB5': + desc: 'reset (active low); port B' + '(PCINT3/CLKI/ADC3) PB3': + desc: 'external clock input; port B' + '(PCINT4/ADC2) PB4': + desc: 'port B' + GND: desc: ground - - num: 5 - sym: PB0 (MOSI/AIN0/OC0A/PCINT0) - desc: SPI master output/slave input; port B - - num: 6 - sym: PB1 (MISO/AIN1/OC0B/INT0/PCINT1) - desc: SPI master input/slave output; port B - - num: 7 - sym: PB2 (SCK/ADC1/T0/PCINT2) - desc: SPI master clock; port B - - num: 8 - sym: Vcc - desc: supply voltage + 'PB0 (MOSI/AIN0/OC0A/PCINT0)': + desc: 'SPI master output/slave input; port B' + 'PB1 (MISO/AIN1/OC0B/INT0/PCINT1)': + desc: 'SPI master input/slave output; port B' + 'PB2 (SCK/ADC1/T0/PCINT2)': + desc: 'SPI master clock; port B' + Vcc: + desc: 'supply voltage' specs: - - param: Flash memory - val: 1K - unit: bytes - - param: Internal SRAM - val: 64 - unit: bytes - - param: EEPROM - val: 64 - unit: bytes - - param: Programmable I/O lines - val: 6 - - param: Maximum clock frequency - val: 10 - unit: MHz -... - + - + param: 'Flash memory' + val: 1K + unit: bytes + - + param: 'Internal SRAM' + val: '64' + unit: bytes + - + param: EEPROM + val: '64' + unit: bytes + - + param: 'Programmable I/O lines' + val: '6' + - + param: 'Maximum clock frequency' + val: '10' + unit: MHz +packages: + DIP: + - '(PCINT5/~RESET~/ADC0/dW) PB5' + - '(PCINT3/CLKI/ADC3) PB3' + - '(PCINT4/ADC2) PB4' + - GND + - 'PB0 (MOSI/AIN0/OC0A/PCINT0)' + - 'PB1 (MISO/AIN1/OC0B/INT0/PCINT1)' + - 'PB2 (SCK/ADC1/T0/PCINT2)' + - Vcc diff --git a/ATTINY2313.yaml b/ATTINY2313.yaml index 4d6c7f7..594b635 100644 --- a/ATTINY2313.yaml +++ b/ATTINY2313.yaml @@ -1,87 +1,95 @@ ---- -name: ATtiny2313 -description: "8-bit AVR® microcontroller" -aliases: [ATtiny4313] -package: DIP -pincount: 20 -family: Atmel -datasheet: "http://www.atmel.com/dyn/resources/prod_documents/DOC8246.PDF" +name: ATtiny2313 +description: '8-bit AVR® microcontroller' +aliases: + - ATtiny4313 +family: Atmel +datasheet: 'http://www.atmel.com/dyn/resources/prod_documents/DOC8246.PDF' pins: - - num: 1 - sym: (~RESET~/dW) PA2 - desc: reset (active low) - - num: 2 - sym: (RXD) PD0 - desc: UART receive; port D - - num: 3 - sym: (TXD) PD1 - desc: UART transmit; port D - - num: 4 - sym: (XTAL2) PA1 - desc: clock oscillator pin 2; port A - - num: 5 - sym: (XTAL1) PA0 - desc: clock oscillator pin 1; port A - - num: 6 - sym: (CKOUT/XCK/INT0) PD2 - desc: external interrupt 0; clock output; port D - - num: 7 - sym: (INT1) PD3 - desc: external interrupt 1; port D - - num: 8 - sym: (T0) PD4 - desc: port D - - num: 9 - sym: (OC0B/T1) PD5 - desc: port D - - num: 10 - sym: GND + '(~RESET~/dW) PA2': + desc: 'reset (active low)' + '(RXD) PD0': + desc: 'UART receive; port D' + '(TXD) PD1': + desc: 'UART transmit; port D' + '(XTAL2) PA1': + desc: 'clock oscillator pin 2; port A' + '(XTAL1) PA0': + desc: 'clock oscillator pin 1; port A' + '(CKOUT/XCK/INT0) PD2': + desc: 'external interrupt 0; clock output; port D' + '(INT1) PD3': + desc: 'external interrupt 1; port D' + '(T0) PD4': + desc: 'port D' + '(OC0B/T1) PD5': + desc: 'port D' + GND: desc: ground - - num: 11 - sym: PD6 (ICP) - desc: port D - - num: 12 - sym: PB0 (AIN0/PCINT0) - desc: port B - - num: 13 - sym: PB1 (AIN1/PCINT1) - desc: port B - - num: 14 - sym: PB2 (OC0A/PCINT2) - desc: port B - - num: 15 - sym: PB3 (OC1A/PCINT3) - desc: port B - - num: 16 - sym: PB4 (OC1B/PCINT4) - desc: port B - - num: 17 - sym: PB5 (MOSI/DI/SDA/PCINT5) - desc: 3-wire data input; 2-wire data; port B - - num: 18 - sym: PB6 (MISO/DO/PCINT6) - desc: 3-wire data output; port B - - num: 19 - sym: PB7 (UCSK/SCL/PCINT7) - desc: 3-wire clock; 2-wire clock; port B - - num: 20 - sym: Vcc - desc: supply voltage + 'PD6 (ICP)': + desc: 'port D' + 'PB0 (AIN0/PCINT0)': + desc: 'port B' + 'PB1 (AIN1/PCINT1)': + desc: 'port B' + 'PB2 (OC0A/PCINT2)': + desc: 'port B' + 'PB3 (OC1A/PCINT3)': + desc: 'port B' + 'PB4 (OC1B/PCINT4)': + desc: 'port B' + 'PB5 (MOSI/DI/SDA/PCINT5)': + desc: '3-wire data input; 2-wire data; port B' + 'PB6 (MISO/DO/PCINT6)': + desc: '3-wire data output; port B' + 'PB7 (UCSK/SCL/PCINT7)': + desc: '3-wire clock; 2-wire clock; port B' + Vcc: + desc: 'supply voltage' specs: - - param: Flash memory - val: [2K (ATtiny2313), 4K (ATtiny4313)] - unit: bytes - - param: Internal SRAM - val: [128 (ATtiny2313), 256 (ATtiny4313)] - unit: bytes - - param: EEPROM - val: [128 (ATtiny2313), 256 (ATtiny4313)] - unit: bytes - - param: Programmable I/O lines - val: 18 - - param: Maximum clock frequency - val: 20 - unit: MHz -... - - + - + param: 'Flash memory' + val: + - '2K (ATtiny2313)' + - '4K (ATtiny4313)' + unit: bytes + - + param: 'Internal SRAM' + val: + - '128 (ATtiny2313)' + - '256 (ATtiny4313)' + unit: bytes + - + param: EEPROM + val: + - '128 (ATtiny2313)' + - '256 (ATtiny4313)' + unit: bytes + - + param: 'Programmable I/O lines' + val: '18' + - + param: 'Maximum clock frequency' + val: '20' + unit: MHz +packages: + DIP: + - '(~RESET~/dW) PA2' + - '(RXD) PD0' + - '(TXD) PD1' + - '(XTAL2) PA1' + - '(XTAL1) PA0' + - '(CKOUT/XCK/INT0) PD2' + - '(INT1) PD3' + - '(T0) PD4' + - '(OC0B/T1) PD5' + - GND + - 'PD6 (ICP)' + - 'PB0 (AIN0/PCINT0)' + - 'PB1 (AIN1/PCINT1)' + - 'PB2 (OC0A/PCINT2)' + - 'PB3 (OC1A/PCINT3)' + - 'PB4 (OC1B/PCINT4)' + - 'PB5 (MOSI/DI/SDA/PCINT5)' + - 'PB6 (MISO/DO/PCINT6)' + - 'PB7 (UCSK/SCL/PCINT7)' + - Vcc diff --git a/ATTINY85.yaml b/ATTINY85.yaml index c74d4e8..dfa670e 100644 --- a/ATTINY85.yaml +++ b/ATTINY85.yaml @@ -1,51 +1,75 @@ ---- -name: ATtiny85 -description: "8-bit AVR® microcontroller" -aliases: [ATtiny25, ATtiny45] -package: DIP -pincount: 8 -family: "Atmel" -datasheet: "http://www.atmel.com/dyn/resources/prod_documents/doc2586.pdf" +name: ATtiny85 +description: '8-bit AVR® microcontroller' +aliases: + - ATtiny25 + - ATtiny45 +family: Atmel +datasheet: 'http://www.atmel.com/dyn/resources/prod_documents/doc2586.pdf' pins: - - num: 1 - sym: (PCINT5/~RESET~/ADC0/dW) PB5 - desc: reset (active low); port B - - num: 2 - sym: (PCINT3/XTAL1/CLKI/~OC1B~/ADC3) PB3 - desc: crystal connection; external clock input; port B - - num: 3 - sym: (PCINT4/XTAL2/CLKO/OC1B/ADC2) PB4 - desc: crystal connection; clock output; port B - - num: 4 - sym: GND + '(PCINT5/~RESET~/ADC0/dW) PB5': + desc: 'reset (active low); port B' + '(PCINT3/XTAL1/CLKI/~OC1B~/ADC3) PB3': + desc: 'crystal connection; external clock input; port B' + '(PCINT4/XTAL2/CLKO/OC1B/ADC2) PB4': + desc: 'crystal connection; clock output; port B' + GND: desc: ground - - num: 5 - sym: PB0 (MOSI/DI/SDA/AIN0/OC0A/~OC1A~/AREF/PCINT0) - desc: SPI master output/slave input; 2-wire data; ADC reference; port B - - num: 6 - sym: PB1 (MISO/DO/AIN1/OC0B/OC1A/PCINT1) - desc: SPI master input/slave output; port B - - num: 7 - sym: PB2 (SCK/USCK/SCL/ADC1/T0/INT0/PCINT2) - desc: SPI master clock; 2-wire clock; external interrupt 0; port B - - num: 8 - sym: Vcc - desc: supply voltage + 'PB0 (MOSI/DI/SDA/AIN0/OC0A/~OC1A~/AREF/PCINT0)': + desc: 'SPI master output/slave input; 2-wire data; ADC reference; port B' + 'PB1 (MISO/DO/AIN1/OC0B/OC1A/PCINT1)': + desc: 'SPI master input/slave output; port B' + 'PB2 (SCK/USCK/SCL/ADC1/T0/INT0/PCINT2)': + desc: 'SPI master clock; 2-wire clock; external interrupt 0; port B' + Vcc: + desc: 'supply voltage' specs: - - param: Flash memory - val: [2K (ATtiny25), 4K (ATtiny45), 8K (ATtiny85)] - unit: bytes - - param: Internal SRAM - val: [128 (ATtiny25), 256 (ATtiny45), 512 (ATtiny85)] - unit: bytes - - param: EEPROM - val: [128 (ATtiny25), 256 (ATtiny45), 512 (ATtiny85)] - unit: bytes - - param: Programmable I/O lines - val: 6 - - param: Maximum clock frequency - val: 20 - unit: MHz -... - - + - + param: 'Flash memory' + val: + - '2K (ATtiny25)' + - '4K (ATtiny45)' + - '8K (ATtiny85)' + unit: bytes + - + param: 'Internal SRAM' + val: + - '128 (ATtiny25)' + - '256 (ATtiny45)' + - '512 (ATtiny85)' + unit: bytes + - + param: EEPROM + val: + - '128 (ATtiny25)' + - '256 (ATtiny45)' + - '512 (ATtiny85)' + unit: bytes + - + param: 'Programmable I/O lines' + val: '6' + - + param: 'Maximum clock frequency' + val: '20' + unit: MHz +packages: + PDIP: &DIP + - '(PCINT5/~RESET~/ADC0/dW) PB5' + - '(PCINT3/XTAL1/CLKI/~OC1B~/ADC3) PB3' + - '(PCINT4/XTAL2/CLKO/OC1B/ADC2) PB4' + - GND + - 'PB0 (MOSI/DI/SDA/AIN0/OC0A/~OC1A~/AREF/PCINT0)' + - 'PB1 (MISO/DO/AIN1/OC0B/OC1A/PCINT1)' + - 'PB2 (SCK/USCK/SCL/ADC1/T0/INT0/PCINT2)' + - Vcc + SOIC: *DIP + TSSOP: *DIP + QFN: + 1: PB5 + 2: PB3 + 5: PB4 + 8: GND + 11: PB0 + 12: PB1 + 14: PB2 + 15: Vcc + BOTTOM_PLATE: GND diff --git a/AY-3-8910.yaml b/AY-3-8910.yaml index 13138c1..47d4cfe 100644 --- a/AY-3-8910.yaml +++ b/AY-3-8910.yaml @@ -1,169 +1,148 @@ ---- -description: "Programmable sound generator" -aliases: ["YM2149"] -package: DIP -pincount: 40 -family: "General Instrument" -datasheet: "http://www.ym2149.com/ay8910.pdf" +description: 'Programmable sound generator' +aliases: + - YM2149 +family: 'General Instrument' +datasheet: 'http://www.ym2149.com/ay8910.pdf' pins: - - num: 1 - sym: GND + GND: desc: ground - - num: 2 - sym: NC - desc: no connection - - num: 3 - sym: ANALOG B - desc: analog output, channel B - - num: 4 - sym: ANALOG A - desc: analog output, channel A - - num: 5 - sym: NC - desc: no connection - - num: 6 - sym: IOB7 - desc: I/O port B - - num: 7 - sym: IOB6 - desc: I/O port B - - num: 8 - sym: IOB5 - desc: I/O port B - - num: 9 - sym: IOB4 - desc: I/O port B - - num: 10 - sym: IOB3 - desc: I/O port B - - num: 11 - sym: IOB2 - desc: I/O port B - - num: 12 - sym: IOB1 - desc: I/O port B - - num: 13 - sym: IOB0 - desc: I/O port B - - num: 14 - sym: IOA7 - desc: I/O port A - - num: 15 - sym: IOA6 - desc: I/O port A - - num: 16 - sym: IOA5 - desc: I/O port A - - num: 17 - sym: IOA4 - desc: I/O port A - - num: 18 - sym: IOA3 - desc: I/O port A - - num: 19 - sym: IOA2 - desc: I/O port A - - num: 20 - sym: IOA1 - desc: I/O port A - - num: 21 - sym: IOA0 - desc: I/O port A - - num: 22 - sym: CLOCK - desc: clock input - - num: 23 - sym: ~RESET - desc: master reset (active low) - - num: 24 - sym: ~A9 - desc: chip select - - num: 25 - sym: A8 - desc: chip select - - num: 26 - sym: TEST 2/~SEL - desc: test pin (do not connect) - - num: 27 - sym: BDIR - desc: bus direction - - num: 28 - sym: BC2 - desc: bus control - - num: 29 - sym: BC1 - desc: bus control - - num: 30 - sym: DA7 - desc: data/address bus - - num: 31 - sym: DA6 - desc: data/address bus - - num: 32 - sym: DA5 - desc: data/address bus - - num: 33 - sym: DA4 - desc: data/address bus - - num: 34 - sym: DA3 - desc: data/address bus - - num: 35 - sym: DA2 - desc: data/address bus - - num: 36 - sym: DA1 - desc: data/address bus - - num: 37 - sym: DA0 - desc: data/address bus - - num: 38 - sym: ANALOG C - desc: analog output, channel C - - num: 39 - sym: TEST 1 - desc: test pin (do not connect) - - num: 40 - sym: Vcc - desc: supply voltage + 'ANALOG B': + desc: 'analog output, channel B' + 'ANALOG A': + desc: 'analog output, channel A' + IOB7: + desc: 'I/O port B' + IOB6: + desc: 'I/O port B' + IOB5: + desc: 'I/O port B' + IOB4: + desc: 'I/O port B' + IOB3: + desc: 'I/O port B' + IOB2: + desc: 'I/O port B' + IOB1: + desc: 'I/O port B' + IOB0: + desc: 'I/O port B' + IOA7: + desc: 'I/O port A' + IOA6: + desc: 'I/O port A' + IOA5: + desc: 'I/O port A' + IOA4: + desc: 'I/O port A' + IOA3: + desc: 'I/O port A' + IOA2: + desc: 'I/O port A' + IOA1: + desc: 'I/O port A' + IOA0: + desc: 'I/O port A' + CLOCK: + desc: 'clock input' + '~RESET': + desc: 'master reset (active low)' + '~A9': + desc: 'chip select' + A8: + desc: 'chip select' + 'TEST 2/~SEL': + desc: 'test pin (do not connect)' + BDIR: + desc: 'bus direction' + BC2: + desc: 'bus control' + BC1: + desc: 'bus control' + DA7: + desc: 'data/address bus' + DA6: + desc: 'data/address bus' + DA5: + desc: 'data/address bus' + DA4: + desc: 'data/address bus' + DA3: + desc: 'data/address bus' + DA2: + desc: 'data/address bus' + DA1: + desc: 'data/address bus' + DA0: + desc: 'data/address bus' + 'ANALOG C': + desc: 'analog output, channel C' + 'TEST 1': + desc: 'test pin (do not connect)' + Vcc: + desc: 'supply voltage' specs: - - param: "Minimum clock frequency" - val: 1 - unit: MHz - - param: "Maximum clock frequency" - val: ["2.5 (AY-3-8910)", "4 (YM2149)"] - unit: MHz + - + param: 'Minimum clock frequency' + val: '1' + unit: MHz + - + param: 'Maximum clock frequency' + val: + - '2.5 (AY-3-8910)' + - '4 (YM2149)' + unit: MHz notes: - - Chip is only active when ~A9 is low, A8 is high, and address bits DA7-DA4 are low. - - Address bits DA3-DA0 select one of the 16 control registers. - - For YM2149, connecting pin 26 to ground divides CLOCK by 2. - - "BDIR=0, BC2=0, BC1=0: inactive, DA7-DA0 high impedance" - - "BDIR=0, BC2=0, BC1=1: latch address, DA7-DA0 are inputs" - - "BDIR=0, BC2=1, BC1=0: inactive, DA7-DA0 high impedance" - - "BDIR=0, BC2=1, BC1=1: read, DA7-DA0 are outputs" - - "BDIR=1, BC2=0, BC1=0: latch address, DA7-DA0 are inputs" - - "BDIR=1, BC2=0, BC1=1: inactive, DA7-DA0 high impedance" - - "BDIR=1, BC2=1, BC1=0: write, DA7-DA0 are inputs" - - "BDIR=1, BC2=1, BC1=1: latch address, DA7-DA0 are inputs" - - "Control registers: - - - - - - - - - - - - - - - - - -
$00tone generator A frequency, low 8 bits
$01tone generator A frequency, high 4 bits
$02tone generator B frequency, low 8 bits
$03tone generator B frequency, high 4 bits
$04tone generator C frequency, low 8 bits
$05tone generator C frequency, high 4 bits
$06noise generator frequency, low 5 bits
$07I/O port and mixer control
$08channel A amplitude/envelope enable
$09channel B amplitude/envelope enable
$0Achannel C amplitude/envelope enable
$0Benvelope frequency, low 8 bits
$0Cenvelope frequency, high 8 bits
$0Denvelope shape
$0EI/O port A data
$0FI/O port B data
" -... - - + - 'Chip is only active when ~A9 is low, A8 is high, and address bits DA7-DA4 are low.' + - 'Address bits DA3-DA0 select one of the 16 control registers.' + - 'For YM2149, connecting pin 26 to ground divides CLOCK by 2.' + - 'BDIR=0, BC2=0, BC1=0: inactive, DA7-DA0 high impedance' + - 'BDIR=0, BC2=0, BC1=1: latch address, DA7-DA0 are inputs' + - 'BDIR=0, BC2=1, BC1=0: inactive, DA7-DA0 high impedance' + - 'BDIR=0, BC2=1, BC1=1: read, DA7-DA0 are outputs' + - 'BDIR=1, BC2=0, BC1=0: latch address, DA7-DA0 are inputs' + - 'BDIR=1, BC2=0, BC1=1: inactive, DA7-DA0 high impedance' + - 'BDIR=1, BC2=1, BC1=0: write, DA7-DA0 are inputs' + - 'BDIR=1, BC2=1, BC1=1: latch address, DA7-DA0 are inputs' + - 'Control registers:
$00tone generator A frequency, low 8 bits
$01tone generator A frequency, high 4 bits
$02tone generator B frequency, low 8 bits
$03tone generator B frequency, high 4 bits
$04tone generator C frequency, low 8 bits
$05tone generator C frequency, high 4 bits
$06noise generator frequency, low 5 bits
$07I/O port and mixer control
$08channel A amplitude/envelope enable
$09channel B amplitude/envelope enable
$0Achannel C amplitude/envelope enable
$0Benvelope frequency, low 8 bits
$0Cenvelope frequency, high 8 bits
$0Denvelope shape
$0EI/O port A data
$0FI/O port B data
' +packages: + DIP: + - GND + - NC + - 'ANALOG B' + - 'ANALOG A' + - NC + - IOB7 + - IOB6 + - IOB5 + - IOB4 + - IOB3 + - IOB2 + - IOB1 + - IOB0 + - IOA7 + - IOA6 + - IOA5 + - IOA4 + - IOA3 + - IOA2 + - IOA1 + - IOA0 + - CLOCK + - '~RESET' + - '~A9' + - A8 + - 'TEST 2/~SEL' + - BDIR + - BC2 + - BC1 + - DA7 + - DA6 + - DA5 + - DA4 + - DA3 + - DA2 + - DA1 + - DA0 + - 'ANALOG C' + - 'TEST 1' + - Vcc diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md index 703f432..6d9606b 100644 --- a/CONTRIBUTING.md +++ b/CONTRIBUTING.md @@ -21,11 +21,9 @@ Required. A one-line description of the part, such as: `"8-bit shift register wi #### `package` -Required. This field was intended to indicate how the pin diagram of this part should be drawn. The only value used in the original database was `DIP`. - -#### `pincount` - -Required. The total number of pins. +Required. +This field was intended to indicate how the pin diagram of this part should be drawn. +The only value used in the original database was `DIP`. #### `family` @@ -41,7 +39,9 @@ Optional. If similar parts share this pinout, you can specify an array of their #### `pins` -Required. An array of pin definitions. The number of elements must match the indicated `pincount`. See the section "Pin definitions." +Required. +An dictionary of pin definitions. +See the section "Pin definitions." #### `specs` @@ -51,17 +51,29 @@ Optional. An array of spec definitions. See the section "Spec definitions". Optional. An array of additional explanatory notes. -## Pin definitions -Each pin definition is a dictionary with three fields: +## Package definitions -#### `num` +Required. +Array of packages. +Packages contain a pin-mapping (array or dictionary). +For more detail see [packages.md](packages.md). + + +## Pin definitions -Required. The pin number. I suppose this is redundant, but it could theoretically be used to specify a non-numeric pin number. (lol) +Each pin definition is a dictionary with a key and currently one field: -#### `sym` +#### key -Required. The pin symbol. Typically all-uppercase. In the case of a single-supply part, the supply pin should be `Vcc` and the ground pin should be `GND`. Unused pins should be written as `NC` for "no connection." May contain spaces, and subscript/overbar characters. See "Subscripts and overbars." +Required. +The pin symbol. +Typically all-uppercase. +In the case of a single-supply part, the supply pin should be `Vcc` and the ground pin should be `GND`. +Unused pins should be written as `NC` for "no connection" or "do not connect". +Not present pins should be written as `NOT_PRESENT` for missing leads. +May contain spaces, and subscript/overbar characters. +See "Subscripts and overbars." #### `desc` diff --git a/DS1307.yaml b/DS1307.yaml index 47fc1f4..875fee4 100644 --- a/DS1307.yaml +++ b/DS1307.yaml @@ -1,36 +1,34 @@ ---- -description: 64 x 8, serial, I2C real-time clock -package: DIP -pincount: 8 -family: Maxim -datasheet: "http://datasheets.maxim-ic.com/en/ds/DS1307.pdf" +description: '64 x 8, serial, I2C real-time clock' +family: Maxim +datasheet: 'http://datasheets.maxim-ic.com/en/ds/DS1307.pdf' pins: - - num: 1 - sym: X1 - desc: 32.768kHz crystal connection - - num: 2 - sym: X2 - desc: 32.768kHz crystal connection - - num: 3 - sym: V__BAT - desc: backup supply voltage (e.g. 3V lithium coin cell) - - num: 4 - sym: GND + X1: + desc: '32.768kHz crystal connection' + X2: + desc: '32.768kHz crystal connection' + 'V__BAT': + desc: 'backup supply voltage (e.g. 3V lithium coin cell)' + GND: desc: ground - - num: 5 - sym: SDA - desc: serial data input/output - - num: 6 - sym: SCL - desc: serial clock input - - num: 7 - sym: SQW/OUT - desc: square wave output - - num: 8 - sym: Vcc - desc: primary supply voltage + SDA: + desc: 'serial data input/output' + SCL: + desc: 'serial clock input' + SQW/OUT: + desc: 'square wave output' + Vcc: + desc: 'primary supply voltage' notes: - - A lithium battery with 48 mAh or greater will back up the DS1307 for more than 10 years. - - Square wave output can be 1Hz, 4.096kHz, 8.192kHz, or 32.768kHz. - - Reads/writes are inhibited when Vcc falls below 1.25 x V__BAT. -... + - 'A lithium battery with 48 mAh or greater will back up the DS1307 for more than 10 years.' + - 'Square wave output can be 1Hz, 4.096kHz, 8.192kHz, or 32.768kHz.' + - 'Reads/writes are inhibited when Vcc falls below 1.25 x V__BAT.' +packages: + DIP: + - X1 + - X2 + - 'V__BAT' + - GND + - SDA + - SCL + - SQW/OUT + - Vcc diff --git a/DS1620.yaml b/DS1620.yaml index 9895766..7f8b3c5 100644 --- a/DS1620.yaml +++ b/DS1620.yaml @@ -1,46 +1,46 @@ ---- -description: "Digital Thermometer and Thermostat" -aliases: [] -package: DIP -pincount: 8 -family: "Maxim" -datasheet: "http://datasheets.maxim-ic.com/en/ds/DS1620.pdf" +description: 'Digital Thermometer and Thermostat' +aliases: { } +family: Maxim +datasheet: 'http://datasheets.maxim-ic.com/en/ds/DS1620.pdf' pins: - - num: 1 - sym: DQ - desc: 3-Wire input/output - - num: 2 - sym: CLK/~CONV~ - desc: 3-Wire clock input & stand-alone convert input - - num: 3 - sym: ~RST~ + DQ: + desc: '3-Wire input/output' + 'CLK/~CONV~': + desc: '3-Wire clock input & stand-alone convert input' + '~RST~': desc: reset - - num: 4 - sym: GND - desc: power ground - - num: 5 - sym: T__COM - desc: Hi/Lo combined trigger - - num: 6 - sym: T__LOW - desc: low Temp trigger - - num: 7 - sym: T__HIGH - desc: high Temp trigger - - num: 8 - sym: V__DD - desc: +3V to +5V + GND: + desc: 'power ground' + 'T__COM': + desc: 'Hi/Lo combined trigger' + 'T__LOW': + desc: 'low Temp trigger' + 'T__HIGH': + desc: 'high Temp trigger' + 'V__DD': + desc: '+3V to +5V' specs: - - param: "Data resolution" - val: 9 - unit: Bits - - param: "Measurement range" - val: -55 to +125 - unit: Deg C - - param: "Supply Voltage" - val: 3 - 5 - unit: Volts + - + param: 'Data resolution' + val: '9' + unit: Bits + - + param: 'Measurement range' + val: '-55 to +125' + unit: 'Deg C' + - + param: 'Supply Voltage' + val: '3 - 5' + unit: Volts notes: - - Temperature excursions beyond user defined Max / Min limits will trigger T__HIGH or T__LOW outputs for application driven temperature correction. -... - + - 'Temperature excursions beyond user defined Max / Min limits will trigger T__HIGH or T__LOW outputs for application driven temperature correction.' +packages: + DIP: + - DQ + - 'CLK/~CONV~' + - '~RST~' + - GND + - 'T__COM' + - 'T__LOW' + - 'T__HIGH' + - 'V__DD' diff --git a/DS32KHZ.yaml b/DS32KHZ.yaml index 702d256..4bf1317 100644 --- a/DS32KHZ.yaml +++ b/DS32KHZ.yaml @@ -1,58 +1,92 @@ ---- -name: DS32kHz -description: 32.768kHz temperature-compensated crystal oscillator -package: DIP -pincount: 14 -family: Maxim -datasheet: "http://datasheets.maxim-ic.com/en/ds/DS32kHz.pdf" +name: DS32kHz +description: '32.768kHz temperature-compensated crystal oscillator' +family: Maxim +datasheet: 'http://datasheets.maxim-ic.com/en/ds/DS32kHz.pdf' pins: - - num: 1 - sym: NC - desc: no connection - - num: 2 - sym: "" - desc: no pin - - num: 3 - sym: "" - desc: no pin - - num: 4 - sym: GND + GND: desc: ground - - num: 5 - sym: V__BAT - desc: "+3V nominal backup supply voltage" - - num: 6 - sym: NC - desc: no connection - - num: 7 - sym: NC - desc: no connection - - num: 8 - sym: NC - desc: no connection - - num: 9 - sym: NC - desc: no connection - - num: 10 - sym: NC - desc: no connection - - num: 11 - sym: NC - desc: no connection - - num: 12 - sym: 32kHz - desc: 32.768kHz push-pull output - - num: 13 - sym: Vcc - desc: primary supply voltage - - num: 14 - sym: NC - desc: no connection + 'V__BAT': + desc: '+3V nominal backup supply voltage' + 32kHz: + desc: '32.768kHz push-pull output' + Vcc: + desc: 'primary supply voltage' specs: - - param: "Frequency stability, 0°C to +40°C" - val: "±2.0" - unit: ppm - - param: "Frequency stability, -40°C to +85°C" - val: "±7.5" - unit: ppm -... + - + param: 'Frequency stability, 0°C to +40°C' + val: '±2.0' + unit: ppm + - + param: 'Frequency stability, -40°C to +85°C' + val: '±7.5' + unit: ppm +packages: + SO: + - 32kHz + - Vcc + - NC + - NC + - NC + - NC + - NC + - NC + - NC + - NC + - NC + - NC + - GND + - 'V__BAT' + - NC + - NC + EDIP: + - NC + - 'NOT_PRESENT' + - 'NOT_PRESENT' + - GND + - 'V__BAT' + - NC + - NC + - NC + - NC + - NC + - NC + - 32kHz + - Vcc + - NC + BGA: + A1: GND + A2: GND + A3: GND + A4: V__BAT + A5: V__BAT + A6: GND + A7: NC + A8: NC + A9: GND + B1: GND + B2: GND + B3: GND + B4: V__BAT + B5: V__BAT + B6: GND + B7: NC + B8: NC + B9: GND + C1: GND + C2: Vcc + C3: Vcc + C4: 32khz + C5: 32khz + C6: GND + C7: NC + C8: NC + C9: GND + D1: GND + D2: Vcc + D3: Vcc + D4: 32khz + D5: 32khz + D6: GND + D7: NC + D8: NC + D9: GND \ No newline at end of file diff --git a/HSN-1000.yaml b/HSN-1000.yaml index 2e3b650..7884a17 100644 --- a/HSN-1000.yaml +++ b/HSN-1000.yaml @@ -1,73 +1,70 @@ ---- -description: "Nuclear event detector" -aliases: [] -package: DIP -pincount: 14 -family: "Maxwell" -datasheet: "http://www.maxwell.com/products/microelectronics/docs/HSN1000_REV3.PDF" +description: 'Nuclear event detector' +aliases: { } +family: Maxwell +datasheet: 'http://www.maxwell.com/products/microelectronics/docs/HSN1000_REV3.PDF' pins: - - num: 1 - sym: V__L - desc: load voltage - - num: 2 - sym: ~NED - desc: nuclear event detection (active low) - - num: 3 - sym: NC - desc: no connection - - num: 4 - sym: CAP1 - desc: external capacitor - - num: 5 - sym: CAP2 - desc: external capacitor - - num: 6 - sym: BIT - desc: built-in test - - num: 7 - sym: GND - desc: package ground and case - - num: 8 - sym: V__B - desc: pin diode bias - - num: 9 - sym: THR_ADJ - desc: threshold adjust - - num: 10 - sym: NC - desc: no connection - - num: 11 - sym: NC - desc: no connection - - num: 12 - sym: NC - desc: no connection - - num: 13 - sym: NC - desc: no connection - - num: 14 - sym: V__H - desc: hardened supply voltage + 'V__L': + desc: 'load voltage' + '~NED': + desc: 'nuclear event detection (active low)' + CAP1: + desc: 'external capacitor' + CAP2: + desc: 'external capacitor' + BIT: + desc: 'built-in test' + GND: + desc: 'package ground and case' + 'V__B': + desc: 'pin diode bias' + 'THR_ADJ': + desc: 'threshold adjust' + 'V__H': + desc: 'hardened supply voltage' specs: - - param: "Hardened supply voltage" - val: ["4.5 (min)", "5.5 (max)"] - unit: V - - param: "Radiation propagation delay time" - val: 20 - unit: ns - - param: "Dose rate (operate-through)" - val: "1 × 1012" - unit: "rad(Si)/s" - - param: "Total dose" - val: "1 × 106" - unit: "rad(Si)" - - param: "Neutron fluence" - val: "5 × 1013" - unit: "n/cm2" - - param: "Approximate detection range" - val: ["2 × 105 (min)", "2 × 107 (max)"] - unit: "rad(Si)/s" + - + param: 'Hardened supply voltage' + val: + - '4.5 (min)' + - '5.5 (max)' + unit: V + - + param: 'Radiation propagation delay time' + val: '20' + unit: ns + - + param: 'Dose rate (operate-through)' + val: '1 × 1012' + unit: rad(Si)/s + - + param: 'Total dose' + val: '1 × 106' + unit: rad(Si) + - + param: 'Neutron fluence' + val: '5 × 1013' + unit: n/cm2 + - + param: 'Approximate detection range' + val: + - '2 × 105 (min)' + - '2 × 107 (max)' + unit: rad(Si)/s notes: - - Less than a 30% variation in detection threshold can be expected over the entire operating temperature range. -... - + - 'Less than a 30% variation in detection threshold can be expected over the entire operating temperature range.' +packages: + DIP: + - 'V__L' + - '~NED' + - NC + - CAP1 + - CAP2 + - BIT + - GND + - 'V__B' + - 'THR_ADJ' + - NC + - NC + - NC + - NC + - 'V__H' diff --git a/ICL7660.yaml b/ICL7660.yaml index e6b30c1..4a354cb 100644 --- a/ICL7660.yaml +++ b/ICL7660.yaml @@ -1,35 +1,31 @@ ---- -description: Switched-capacitor voltage converter +description: 'Switched-capacitor voltage converter' aliases: - MAX1044 -package: DIP -pincount: 8 -datasheet: http://www.intersil.com/data/fn/fn3072.pdf +datasheet: 'http://www.intersil.com/data/fn/fn3072.pdf' pins: - - num: 1 - sym: NC - desc: no connection - - num: 2 - sym: CAP+ - desc: connection to + terminal of charge-pump capacitor - - num: 3 - sym: GND + CAP+: + desc: 'connection to + terminal of charge-pump capacitor' + GND: desc: ground - - num: 4 - sym: CAP- - desc: connection to - terminal of charge-pump capacitor - - num: 5 - sym: V__OUT - desc: negative voltage output - - num: 6 - sym: LV - desc: low voltage; connect to ground for V+ < 3.5V - - num: 7 - sym: OSC - desc: oscillator control input - - num: 8 - sym: V+ - desc: positive supply voltage (1.5V to 10V) + CAP-: + desc: 'connection to - terminal of charge-pump capacitor' + 'V__OUT': + desc: 'negative voltage output' + LV: + desc: 'low voltage; connect to ground for V+ < 3.5V' + OSC: + desc: 'oscillator control input' + V+: + desc: 'positive supply voltage (1.5V to 10V)' notes: - - "Basic negative voltage converter: 10µF capacitor across pins 2 and 4; 10µF capacitor across pin 5 (negative lead) and ground (positive lead)." -... + - 'Basic negative voltage converter: 10µF capacitor across pins 2 and 4; 10µF capacitor across pin 5 (negative lead) and ground (positive lead).' +packages: + DIP: + - NC + - CAP+ + - GND + - CAP- + - 'V__OUT' + - LV + - OSC + - V+ diff --git a/ICM7228B.yaml b/ICM7228B.yaml index 00d3fdf..4aee461 100644 --- a/ICM7228B.yaml +++ b/ICM7228B.yaml @@ -1,119 +1,127 @@ ---- -description: 8-digit LED display decoder/driver, common cathode -package: DIP -pincount: 28 -family: "Intersil" -datasheet: "http://www.intersil.com/data/fn/fn3160.pdf" +description: '8-digit LED display decoder/driver, common cathode' +family: Intersil +datasheet: 'http://www.intersil.com/data/fn/fn3160.pdf' pins: - - num: 1 - sym: DIGIT 4 - desc: digit 4 cathode - - num: 2 - sym: DIGIT 6 - desc: digit 6 cathode - - num: 3 - sym: DIGIT 3 - desc: digit 3 cathode - - num: 4 - sym: DIGIT 1 - desc: digit 1 cathode - - num: 5 - sym: ID6 - desc: data bit 6 (HEXA/~CODE-B~) - - num: 6 - sym: ID5 - desc: data bit 5 (~DECODE~) - - num: 7 - sym: ID7 - desc: data bit 7 (DATA COMING) - - num: 8 - sym: ~WRITE - desc: write (active low, low-to-high edge triggered) - - num: 9 - sym: MODE - desc: mode select (control or data word) - - num: 10 - sym: ID4 - desc: data bit 4 (~SHUTDOWN~) - - num: 11 - sym: ID1 - desc: data bit 1 - - num: 12 - sym: ID0 - desc: data bit 0 - - num: 13 - sym: ID2 - desc: data bit 2 - - num: 14 - sym: ID3 - desc: data bit 3 - - num: 15 - sym: DP - desc: decimal point anode - - num: 16 - sym: SEG a - desc: segment a anode - - num: 17 - sym: SEG b - desc: segment b anode - - num: 18 - sym: SEG d - desc: segment d anode - - num: 19 - sym: Vcc - desc: supply voltage - - num: 20 - sym: SEG c - desc: segment c anode - - num: 21 - sym: SEG e - desc: segment e anode - - num: 22 - sym: SEG f - desc: segment f anode - - num: 23 - sym: SEG g - desc: segment g anode - - num: 24 - sym: DIGIT 8 - desc: digit 8 cathode - - num: 25 - sym: DIGIT 2 - desc: digit 2 cathode - - num: 26 - sym: DIGIT 5 - desc: digit 5 cathode - - num: 27 - sym: DIGIT 7 - desc: digit 7 cathode - - num: 28 - sym: GND + 'DIGIT 4': + desc: 'digit 4 cathode' + 'DIGIT 6': + desc: 'digit 6 cathode' + 'DIGIT 3': + desc: 'digit 3 cathode' + 'DIGIT 1': + desc: 'digit 1 cathode' + ID6: + desc: 'data bit 6 (HEXA/~CODE-B~)' + ID5: + desc: 'data bit 5 (~DECODE~)' + ID7: + desc: 'data bit 7 (DATA COMING)' + '~WRITE': + desc: 'write (active low, low-to-high edge triggered)' + MODE: + desc: 'mode select (control or data word)' + ID4: + desc: 'data bit 4 (~SHUTDOWN~)' + ID1: + desc: 'data bit 1' + ID0: + desc: 'data bit 0' + ID2: + desc: 'data bit 2' + ID3: + desc: 'data bit 3' + DP: + desc: 'decimal point anode' + 'SEG a': + desc: 'segment a anode' + 'SEG b': + desc: 'segment b anode' + 'SEG d': + desc: 'segment d anode' + Vcc: + desc: 'supply voltage' + 'SEG c': + desc: 'segment c anode' + 'SEG e': + desc: 'segment e anode' + 'SEG f': + desc: 'segment f anode' + 'SEG g': + desc: 'segment g anode' + 'DIGIT 8': + desc: 'digit 8 cathode' + 'DIGIT 2': + desc: 'digit 2 cathode' + 'DIGIT 5': + desc: 'digit 5 cathode' + 'DIGIT 7': + desc: 'digit 7 cathode' + GND: desc: ground specs: - - param: Display scan rate - val: 390 - unit: Hz - - param: Inter-digit blanking time - val: 10 - unit: "µs" - - param: Write pulse width - val: [100 (low), 540 (high)] - unit: ns - - param: Mode setup time - val: 150 - unit: ns - - param: Data setup time - val: 160 - unit: ns - - param: Minimum digit drive capability - val: 50 - unit: mA - - param: Segment driver output impedance - val: 100 - unit: "Ω" - - param: Peak current drive per segment - val: 10 - unit: mA + - + param: 'Display scan rate' + val: '390' + unit: Hz + - + param: 'Inter-digit blanking time' + val: '10' + unit: 'µs' + - + param: 'Write pulse width' + val: + - '100 (low)' + - '540 (high)' + unit: ns + - + param: 'Mode setup time' + val: '150' + unit: ns + - + param: 'Data setup time' + val: '160' + unit: ns + - + param: 'Minimum digit drive capability' + val: '50' + unit: mA + - + param: 'Segment driver output impedance' + val: '100' + unit: 'Ω' + - + param: 'Peak current drive per segment' + val: '10' + unit: mA notes: - - When MODE is low, data is loaded into display RAM. When MODE is high, data is loaded into control register. -... + - 'When MODE is low, data is loaded into display RAM. When MODE is high, data is loaded into control register.' +packages: + DIP: + - 'DIGIT 4' + - 'DIGIT 6' + - 'DIGIT 3' + - 'DIGIT 1' + - ID6 + - ID5 + - ID7 + - '~WRITE' + - MODE + - ID4 + - ID1 + - ID0 + - ID2 + - ID3 + - DP + - 'SEG a' + - 'SEG b' + - 'SEG d' + - Vcc + - 'SEG c' + - 'SEG e' + - 'SEG f' + - 'SEG g' + - 'DIGIT 8' + - 'DIGIT 2' + - 'DIGIT 5' + - 'DIGIT 7' + - GND diff --git a/LF347.yaml b/LF347.yaml index d537de7..b6d4ed5 100644 --- a/LF347.yaml +++ b/LF347.yaml @@ -1,72 +1,77 @@ ---- -description: Wide bandwidth quad JFET-input operational amplifier -aliases: [LF147] -package: DIP -pincount: 14 -family: linear -datasheet: "http://www.national.com/ds/LF/LF147.pdf" +description: 'Wide bandwidth quad JFET-input operational amplifier' +aliases: + - LF147 +family: linear +datasheet: 'http://www.national.com/ds/LF/LF147.pdf' pins: - - num: 1 - sym: 1OUT - desc: output 1 - - num: 2 - sym: 1IN- - desc: inverting input 1 - - num: 3 - sym: 1IN+ - desc: non-inverting input 1 - - num: 4 - sym: Vcc - desc: positive supply voltage - - num: 5 - sym: 2IN+ - desc: non-inverting input 2 - - num: 6 - sym: 2IN- - desc: inverting input 2 - - num: 7 - sym: 2OUT - desc: output 2 - - num: 8 - sym: 3OUT - desc: output 3 - - num: 9 - sym: 3IN- - desc: inverting input 3 - - num: 10 - sym: 3IN+ - desc: non-inverting input 3 - - num: 11 - sym: Vss - desc: negative supply voltage - - num: 12 - sym: 4IN+ - desc: non-inverting input 4 - - num: 13 - sym: 4IN- - desc: inverting input 4 - - num: 14 - sym: 4OUT - desc: output 4 + 1OUT: + desc: 'output 1' + 1IN-: + desc: 'inverting input 1' + 1IN+: + desc: 'non-inverting input 1' + Vcc: + desc: 'positive supply voltage' + 2IN+: + desc: 'non-inverting input 2' + 2IN-: + desc: 'inverting input 2' + 2OUT: + desc: 'output 2' + 3OUT: + desc: 'output 3' + 3IN-: + desc: 'inverting input 3' + 3IN+: + desc: 'non-inverting input 3' + Vss: + desc: 'negative supply voltage' + 4IN+: + desc: 'non-inverting input 4' + 4IN-: + desc: 'inverting input 4' + 4OUT: + desc: 'output 4' specs: - - param: Supply voltage - val: [8 (min), 36 (max)] - unit: V - - param: Maximum offset voltage - val: 5 - unit: mV - - param: Gain bandwidth - val: 4 - unit: MHz - - param: Slew rate - val: 13 - unit: "V/µs" - - param: Voltage noise - val: 20 - unit: "nV/√Hz" - - param: "Supply current (per channel)" - val: 1.8 - unit: mA -... - - + - + param: 'Supply voltage' + val: + - '8 (min)' + - '36 (max)' + unit: V + - + param: 'Maximum offset voltage' + val: '5' + unit: mV + - + param: 'Gain bandwidth' + val: '4' + unit: MHz + - + param: 'Slew rate' + val: '13' + unit: 'V/µs' + - + param: 'Voltage noise' + val: '20' + unit: 'nV/√Hz' + - + param: 'Supply current (per channel)' + val: '1.8' + unit: mA +packages: + DIP: + - 1OUT + - 1IN- + - 1IN+ + - Vcc + - 2IN+ + - 2IN- + - 2OUT + - 3OUT + - 3IN- + - 3IN+ + - Vss + - 4IN+ + - 4IN- + - 4OUT diff --git a/LF353.yaml b/LF353.yaml index 2040deb..da32e93 100644 --- a/LF353.yaml +++ b/LF353.yaml @@ -1,57 +1,61 @@ ---- -description: "Wide bandwidth dual JFET-input operational amplifier" -package: DIP -pincount: 8 -family: linear -datasheet: "http://www.national.com/ds/LF/LF353.pdf" +description: 'Wide bandwidth dual JFET-input operational amplifier' +family: linear +datasheet: 'http://www.national.com/ds/LF/LF353.pdf' pins: - - num: 1 - sym: 1OUT - desc: output 1 - - num: 2 - sym: 1IN- - desc: inverting input 1 - - num: 3 - sym: 1IN+ - desc: non-inverting input 1 - - num: 4 - sym: Vss - desc: negative supply voltage - - num: 5 - sym: 2IN+ - desc: non-inverting input 2 - - num: 6 - sym: 2IN- - desc: inverting input 2 - - num: 7 - sym: 2OUT - desc: output 2 - - num: 8 - sym: Vcc - desc: positive supply voltage + 1OUT: + desc: 'output 1' + 1IN-: + desc: 'inverting input 1' + 1IN+: + desc: 'non-inverting input 1' + Vss: + desc: 'negative supply voltage' + 2IN+: + desc: 'non-inverting input 2' + 2IN-: + desc: 'inverting input 2' + 2OUT: + desc: 'output 2' + Vcc: + desc: 'positive supply voltage' specs: - - param: Supply voltage - val: [10 (min), 36 (max)] - unit: V - - param: Offset voltage - val: 10 - unit: mV - - param: Gain bandwidth - val: 4 - unit: MHz - - param: Slew rate - val: 13 - unit: "V/µs" - - param: "Settling time to 0.01%" - val: 2 - unit: "µs" - - param: Voltage noise - val: 25 - unit: "nV/√Hz" - - param: "Supply current (per channel)" - val: 1.8 - unit: mA - -... - - + - + param: 'Supply voltage' + val: + - '10 (min)' + - '36 (max)' + unit: V + - + param: 'Offset voltage' + val: '10' + unit: mV + - + param: 'Gain bandwidth' + val: '4' + unit: MHz + - + param: 'Slew rate' + val: '13' + unit: 'V/µs' + - + param: 'Settling time to 0.01%' + val: '2' + unit: 'µs' + - + param: 'Voltage noise' + val: '25' + unit: 'nV/√Hz' + - + param: 'Supply current (per channel)' + val: '1.8' + unit: mA +packages: + DIP: + - 1OUT + - 1IN- + - 1IN+ + - Vss + - 2IN+ + - 2IN- + - 2OUT + - Vcc diff --git a/LF411.yaml b/LF411.yaml index aa0f175..2d52279 100644 --- a/LF411.yaml +++ b/LF411.yaml @@ -1,53 +1,51 @@ ---- -description: Low-offset, low-drift JFET-input operational amplifier -package: DIP -pincount: 8 -family: "linear" -datasheet: "http://www.national.com/ds/LF/LF411.pdf" +description: 'Low-offset, low-drift JFET-input operational amplifier' +family: linear +datasheet: 'http://www.national.com/ds/LF/LF411.pdf' pins: - - num: 1 - sym: BAL + BAL: desc: balance - - num: 2 - sym: IN- - desc: inverting input - - num: 3 - sym: IN+ - desc: non-inverting input - - num: 4 - sym: Vss - desc: negative supply voltage - - num: 5 - sym: BAL - desc: balance - - num: 6 - sym: OUT + IN-: + desc: 'inverting input' + IN+: + desc: 'non-inverting input' + Vss: + desc: 'negative supply voltage' + OUT: desc: output - - num: 7 - sym: Vcc - desc: positive supply voltage - - num: 8 - sym: NC - desc: no connection + Vcc: + desc: 'positive supply voltage' specs: - - param: Maximum supply voltage - val: "±18" - unit: V - - param: Offset voltage - val: 0.5 - unit: mV - - param: Gain bandwidth - val: 4 - unit: MHz - - param: Slew rate - val: 15 - unit: "V/µs" - - param: Voltage noise - val: 25 - unit: "nV/√Hz" - - param: Supply current - val: 1.8 - unit: mA -... - - + - + param: 'Maximum supply voltage' + val: '±18' + unit: V + - + param: 'Offset voltage' + val: '0.5' + unit: mV + - + param: 'Gain bandwidth' + val: '4' + unit: MHz + - + param: 'Slew rate' + val: '15' + unit: 'V/µs' + - + param: 'Voltage noise' + val: '25' + unit: 'nV/√Hz' + - + param: 'Supply current' + val: '1.8' + unit: mA +packages: + DIP: + - BAL + - IN- + - IN+ + - Vss + - BAL + - OUT + - Vcc + - NC diff --git a/LF412.yaml b/LF412.yaml index ef4bfac..5db7523 100644 --- a/LF412.yaml +++ b/LF412.yaml @@ -1,55 +1,55 @@ ---- -description: "Low-offset, low-drift dual JFET-input operational amplifier" -package: DIP -pincount: 8 -family: linear -datasheet: "http://www.national.com/ds/LF/LF412.pdf" +description: 'Low-offset, low-drift dual JFET-input operational amplifier' +family: linear +datasheet: 'http://www.national.com/ds/LF/LF412.pdf' pins: - - num: 1 - sym: 1OUT - desc: output 1 - - num: 2 - sym: 1IN- - desc: inverting input 1 - - num: 3 - sym: 1IN+ - desc: non-inverting input 1 - - num: 4 - sym: Vss - desc: negative supply voltage - - num: 5 - sym: 2IN+ - desc: non-inverting input 2 - - num: 6 - sym: 2IN- - desc: inverting input 2 - - num: 7 - sym: 2OUT - desc: output 2 - - num: 8 - sym: Vcc - desc: positive supply voltage + 1OUT: + desc: 'output 1' + 1IN-: + desc: 'inverting input 1' + 1IN+: + desc: 'non-inverting input 1' + Vss: + desc: 'negative supply voltage' + 2IN+: + desc: 'non-inverting input 2' + 2IN-: + desc: 'inverting input 2' + 2OUT: + desc: 'output 2' + Vcc: + desc: 'positive supply voltage' specs: - - param: Maximum supply voltage - val: "±18" - unit: V - - param: Offset voltage - val: 1 - unit: mV - - param: Gain bandwidth - val: 4 - unit: MHz - - param: Slew rate - val: 15 - unit: "V/µs" - - param: Voltage noise - val: 25 - unit: "nV/√Hz" - - param: "Supply current (per channel)" - val: 1.8 - unit: mA - -... - - - + - + param: 'Maximum supply voltage' + val: '±18' + unit: V + - + param: 'Offset voltage' + val: '1' + unit: mV + - + param: 'Gain bandwidth' + val: '4' + unit: MHz + - + param: 'Slew rate' + val: '15' + unit: 'V/µs' + - + param: 'Voltage noise' + val: '25' + unit: 'nV/√Hz' + - + param: 'Supply current (per channel)' + val: '1.8' + unit: mA +packages: + DIP: + - 1OUT + - 1IN- + - 1IN+ + - Vss + - 2IN+ + - 2IN- + - 2OUT + - Vcc diff --git a/LF444.yaml b/LF444.yaml index 6ee77a7..306c51e 100644 --- a/LF444.yaml +++ b/LF444.yaml @@ -1,72 +1,73 @@ ---- -description: "Quad low-power JFET-input operational amplifier" -package: DIP -pincount: 14 -family: "linear" -datasheet: "http://www.national.com/ds/LF/LF444.pdf" +description: 'Quad low-power JFET-input operational amplifier' +family: linear +datasheet: 'http://www.national.com/ds/LF/LF444.pdf' pins: - - num: 1 - sym: 1OUT - desc: output 1 - - num: 2 - sym: 1IN- - desc: inverting input 1 - - num: 3 - sym: 1IN+ - desc: non-inverting input 1 - - num: 4 - sym: Vcc - desc: positive supply voltage - - num: 5 - sym: 2IN+ - desc: non-inverting input 2 - - num: 6 - sym: 2IN- - desc: inverting input 2 - - num: 7 - sym: 2OUT - desc: output 2 - - num: 8 - sym: 3OUT - desc: output 3 - - num: 9 - sym: 3IN- - desc: inverting input 3 - - num: 10 - sym: 3IN+ - desc: non-inverting input 3 - - num: 11 - sym: Vss - desc: negative supply voltage - - num: 12 - sym: 4IN+ - desc: non-inverting input 4 - - num: 13 - sym: 4IN- - desc: inverting input 4 - - num: 14 - sym: 4OUT - desc: output 4 + 1OUT: + desc: 'output 1' + 1IN-: + desc: 'inverting input 1' + 1IN+: + desc: 'non-inverting input 1' + Vcc: + desc: 'positive supply voltage' + 2IN+: + desc: 'non-inverting input 2' + 2IN-: + desc: 'inverting input 2' + 2OUT: + desc: 'output 2' + 3OUT: + desc: 'output 3' + 3IN-: + desc: 'inverting input 3' + 3IN+: + desc: 'non-inverting input 3' + Vss: + desc: 'negative supply voltage' + 4IN+: + desc: 'non-inverting input 4' + 4IN-: + desc: 'inverting input 4' + 4OUT: + desc: 'output 4' specs: - - param: Maximum supply voltage - val: "±18" - unit: V - - param: Offset voltage - val: 2 - unit: mV - - param: Gain bandwidth - val: 1 - unit: MHz - - param: Slew rate - val: 1 - unit: "V/µs" - - param: Voltage noise - val: 35 - unit: "nV/√Hz" - - param: Supply current (per channel) - val: 0.15 - unit: mA -... - - - + - + param: 'Maximum supply voltage' + val: '±18' + unit: V + - + param: 'Offset voltage' + val: '2' + unit: mV + - + param: 'Gain bandwidth' + val: '1' + unit: MHz + - + param: 'Slew rate' + val: '1' + unit: 'V/µs' + - + param: 'Voltage noise' + val: '35' + unit: 'nV/√Hz' + - + param: 'Supply current (per channel)' + val: '0.15' + unit: mA +packages: + DIP: + - 1OUT + - 1IN- + - 1IN+ + - Vcc + - 2IN+ + - 2IN- + - 2OUT + - 3OUT + - 3IN- + - 3IN+ + - Vss + - 4IN+ + - 4IN- + - 4OUT diff --git a/LM301A.yaml b/LM301A.yaml index 51a7717..df37559 100644 --- a/LM301A.yaml +++ b/LM301A.yaml @@ -1,56 +1,66 @@ ---- -description: Operational amplifier -aliases: [LM101A, LM201A] -package: DIP -pincount: 8 -family: "linear" -datasheet: "http://www.national.com/ds/LM/LM101A.pdf" +description: 'Operational amplifier' +aliases: + - LM101A + - LM201A +family: linear +datasheet: 'http://www.national.com/ds/LM/LM101A.pdf' pins: - - num: 1 - sym: BAL/COMP + BAL/COMP: desc: balance/compensation - - num: 2 - sym: IN- - desc: inverting input - - num: 3 - sym: IN+ - desc: non-inverting input - - num: 4 - sym: Vss - desc: negative supply voltage - - num: 5 - sym: BAL + IN-: + desc: 'inverting input' + IN+: + desc: 'non-inverting input' + Vss: + desc: 'negative supply voltage' + BAL: desc: balance - - num: 6 - sym: OUT + OUT: desc: output - - num: 7 - sym: Vcc - desc: positive supply voltage - - num: 8 - sym: COMP + Vcc: + desc: 'positive supply voltage' + COMP: desc: compensation specs: - - param: Maximum supply voltage - val: ["±22 (LM101A/201A)", "±18 (LM301A)"] - unit: V - - param: Minimum supply voltage - val: 10 - unit: V - - param: Input offset voltage - val: [0.7 (LM101A/201A), 2 (LM301A)] - unit: mV - - param: Gain bandwidth - val: 1 - unit: MHz - - param: Slew rate - val: 0.5 - unit: "V/µs" - - param: Voltage noise - val: 15 - unit: "nV/√Hz" - - param: Supply current - val: 1.8 - unit: mA -... - + - + param: 'Maximum supply voltage' + val: + - '±22 (LM101A/201A)' + - '±18 (LM301A)' + unit: V + - + param: 'Minimum supply voltage' + val: '10' + unit: V + - + param: 'Input offset voltage' + val: + - '0.7 (LM101A/201A)' + - '2 (LM301A)' + unit: mV + - + param: 'Gain bandwidth' + val: '1' + unit: MHz + - + param: 'Slew rate' + val: '0.5' + unit: 'V/µs' + - + param: 'Voltage noise' + val: '15' + unit: 'nV/√Hz' + - + param: 'Supply current' + val: '1.8' + unit: mA +packages: + DIP: + - BAL/COMP + - IN- + - IN+ + - Vss + - BAL + - OUT + - Vcc + - COMP diff --git a/LM311.yaml b/LM311.yaml index dd1c525..7948160 100644 --- a/LM311.yaml +++ b/LM311.yaml @@ -1,47 +1,51 @@ ---- -description: "Voltage comparator" -aliases: [LM111] -package: DIP -pincount: 8 -family: "linear" -datasheet: "http://www.national.com/ds/LM/LM111.pdf" +description: 'Voltage comparator' +aliases: + - LM111 +family: linear +datasheet: 'http://www.national.com/ds/LM/LM111.pdf' pins: - - num: 1 - sym: GND + GND: desc: ground - - num: 2 - sym: IN+ - desc: non-inverting input - - num: 3 - sym: IN- - desc: inverting input - - num: 4 - sym: Vss - desc: negative supply voltage - - num: 5 - sym: BAL + IN+: + desc: 'non-inverting input' + IN-: + desc: 'inverting input' + Vss: + desc: 'negative supply voltage' + BAL: desc: balance - - num: 6 - sym: BAL/STROBE + BAL/STROBE: desc: balance/strobe - - num: 7 - sym: OUT + OUT: desc: output - - num: 8 - sym: Vcc - desc: positive supply voltage + Vcc: + desc: 'positive supply voltage' specs: - - param: Maximum supply voltage - val: 36 - unit: V - - param: Offset voltage - val: [3 (LM111), 7.5 (LM311)] - unit: mV - - param: Response time - val: 200 - unit: ns - - param: Supply current - val: 5.1 - unit: mA -... - + - + param: 'Maximum supply voltage' + val: '36' + unit: V + - + param: 'Offset voltage' + val: + - '3 (LM111)' + - '7.5 (LM311)' + unit: mV + - + param: 'Response time' + val: '200' + unit: ns + - + param: 'Supply current' + val: '5.1' + unit: mA +packages: + DIP: + - GND + - IN+ + - IN- + - Vss + - BAL + - BAL/STROBE + - OUT + - Vcc diff --git a/LM319.yaml b/LM319.yaml index 67f084a..06f4efd 100644 --- a/LM319.yaml +++ b/LM319.yaml @@ -1,68 +1,61 @@ ---- -description: High speed dual comparator -package: DIP -pincount: 14 -family: linear -datasheet: "http://www.national.com/ds/LM/LM319.pdf" +description: 'High speed dual comparator' +family: linear +datasheet: 'http://www.national.com/ds/LM/LM319.pdf' pins: - - num: 1 - sym: NC - desc: no connection - - num: 2 - sym: NC - desc: no connection - - num: 3 - sym: GND 1 - desc: ground 1 - - num: 4 - sym: +INPUT 1 - desc: non-inverting input 1 - - num: 5 - sym: -INPUT 1 - desc: inverting input 1 - - num: 6 - sym: V- - desc: negative supply voltage - - num: 7 - sym: OUTPUT 2 - desc: output 2 - - num: 8 - sym: GND 2 - desc: ground 2 - - num: 9 - sym: +INPUT 2 - desc: non-inverting input 2 - - num: 10 - sym: -INPUT 2 - desc: inverting input 2 - - num: 11 - sym: V+ - desc: positive supply voltage - - num: 12 - sym: OUTPUT 1 - desc: output 1 - - num: 13 - sym: NC - desc: not connected - - num: 14 - sym: NC - desc: not connected + 'GND 1': + desc: 'ground 1' + '+INPUT 1': + desc: 'non-inverting input 1' + '-INPUT 1': + desc: 'inverting input 1' + V-: + desc: 'negative supply voltage' + 'OUTPUT 2': + desc: 'output 2' + 'GND 2': + desc: 'ground 2' + '+INPUT 2': + desc: 'non-inverting input 2' + '-INPUT 2': + desc: 'inverting input 2' + V+: + desc: 'positive supply voltage' + 'OUTPUT 1': + desc: 'output 1' specs: - - param: Maximum supply voltage - val: 36 - unit: V - - param: Maximum input voltage - val: "±15" - unit: V - - param: Input offset voltage - val: 2 - unit: mV - - param: Voltage gain - val: 40 - unit: "V/mV" - - param: Response time - val: 80 - unit: ns -... - - + - + param: 'Maximum supply voltage' + val: '36' + unit: V + - + param: 'Maximum input voltage' + val: '±15' + unit: V + - + param: 'Input offset voltage' + val: '2' + unit: mV + - + param: 'Voltage gain' + val: '40' + unit: V/mV + - + param: 'Response time' + val: '80' + unit: ns +packages: + DIP: + - NC + - NC + - 'GND 1' + - '+INPUT 1' + - '-INPUT 1' + - V- + - 'OUTPUT 2' + - 'GND 2' + - '+INPUT 2' + - '-INPUT 2' + - V+ + - 'OUTPUT 1' + - NC + - NC diff --git a/LM324.yaml b/LM324.yaml index 4ff251e..0e47180 100644 --- a/LM324.yaml +++ b/LM324.yaml @@ -1,74 +1,80 @@ ---- -description: "Low power quad operational amplifier" -aliases: [LM124, LM224] -package: DIP -pincount: 14 -family: "linear" -datasheet: "http://www.national.com/ds/LM/LM124.pdf" +description: 'Low power quad operational amplifier' +aliases: + - LM124 + - LM224 +family: linear +datasheet: 'http://www.national.com/ds/LM/LM124.pdf' pins: - - num: 1 - sym: 1OUT - desc: output 1 - - num: 2 - sym: 1IN- - desc: inverting input 1 - - num: 3 - sym: 1IN+ - desc: non-inverting input 1 - - num: 4 - sym: Vcc - desc: positive supply voltage - - num: 5 - sym: 2IN+ - desc: non-inverting input 2 - - num: 6 - sym: 2IN- - desc: inverting input 2 - - num: 7 - sym: 2OUT - desc: output 2 - - num: 8 - sym: 3OUT - desc: output 3 - - num: 9 - sym: 3IN- - desc: inverting input 3 - - num: 10 - sym: 3IN+ - desc: non-inverting input 3 - - num: 11 - sym: GND - desc: ground/negative supply voltage - - num: 12 - sym: 4IN+ - desc: non-inverting input 4 - - num: 13 - sym: 4IN- - desc: inverting input 4 - - num: 14 - sym: 4OUT - desc: output 4 + 1OUT: + desc: 'output 1' + 1IN-: + desc: 'inverting input 1' + 1IN+: + desc: 'non-inverting input 1' + Vcc: + desc: 'positive supply voltage' + 2IN+: + desc: 'non-inverting input 2' + 2IN-: + desc: 'inverting input 2' + 2OUT: + desc: 'output 2' + 3OUT: + desc: 'output 3' + 3IN-: + desc: 'inverting input 3' + 3IN+: + desc: 'non-inverting input 3' + GND: + desc: 'ground/negative supply voltage' + 4IN+: + desc: 'non-inverting input 4' + 4IN-: + desc: 'inverting input 4' + 4OUT: + desc: 'output 4' specs: - - param: Maximum supply voltage - val: 32 - unit: V - - param: Minimum supply voltage - val: 3 - unit: V - - param: Offset voltage - val: 2 - unit: mV - - param: Gain bandwidth - val: 1 - unit: MHz - - param: Slew rate - val: 0.5 - unit: "V/µs" - - param: Voltage noise - val: 40 - unit: "nV/√Hz" - - param: Supply current (per channel) - val: 0.18 - unit: mA -... - + - + param: 'Maximum supply voltage' + val: '32' + unit: V + - + param: 'Minimum supply voltage' + val: '3' + unit: V + - + param: 'Offset voltage' + val: '2' + unit: mV + - + param: 'Gain bandwidth' + val: '1' + unit: MHz + - + param: 'Slew rate' + val: '0.5' + unit: 'V/µs' + - + param: 'Voltage noise' + val: '40' + unit: 'nV/√Hz' + - + param: 'Supply current (per channel)' + val: '0.18' + unit: mA +packages: + DIP: + - 1OUT + - 1IN- + - 1IN+ + - Vcc + - 2IN+ + - 2IN- + - 2OUT + - 3OUT + - 3IN- + - 3IN+ + - GND + - 4IN+ + - 4IN- + - 4OUT diff --git a/LM339.yaml b/LM339.yaml index 5f8b6e4..f212d8f 100644 --- a/LM339.yaml +++ b/LM339.yaml @@ -1,70 +1,73 @@ ---- -description: Low-power, low-offset quad comparator -package: DIP -pincount: 14 -family: linear -datasheet: http://www.national.com/ds/LM/LM139.pdf +description: 'Low-power, low-offset quad comparator' +family: linear +datasheet: 'http://www.national.com/ds/LM/LM139.pdf' pins: - - num: 1 - sym: OUTPUT 2 - desc: output 2 - - num: 2 - sym: OUTPUT 1 - desc: output 1 - - num: 3 - sym: V+ - desc: positive supply voltage - - num: 4 - sym: -INPUT 1 - desc: inverting input 1 - - num: 5 - sym: +INPUT 1 - desc: non-inverting input 1 - - num: 6 - sym: -INPUT 2 - desc: inverting input 2 - - num: 7 - sym: +INPUT 2 - desc: non-inverting input 2 - - num: 8 - sym: -INPUT 3 - desc: inverting input 3 - - num: 9 - sym: +INPUT 3 - desc: non-inverting input 3 - - num: 10 - sym: -INPUT 4 - desc: inverting input 4 - - num: 11 - sym: +INPUT 4 - desc: non-inverting input 4 - - num: 12 - sym: GND + 'OUTPUT 2': + desc: 'output 2' + 'OUTPUT 1': + desc: 'output 1' + V+: + desc: 'positive supply voltage' + '-INPUT 1': + desc: 'inverting input 1' + '+INPUT 1': + desc: 'non-inverting input 1' + '-INPUT 2': + desc: 'inverting input 2' + '+INPUT 2': + desc: 'non-inverting input 2' + '-INPUT 3': + desc: 'inverting input 3' + '+INPUT 3': + desc: 'non-inverting input 3' + '-INPUT 4': + desc: 'inverting input 4' + '+INPUT 4': + desc: 'non-inverting input 4' + GND: desc: ground - - num: 13 - sym: OUTPUT 4 - desc: output 4 - - num: 14 - sym: OUTPUT 3 - desc: output 3 + 'OUTPUT 4': + desc: 'output 4' + 'OUTPUT 3': + desc: 'output 3' specs: - - param: Maximum supply voltage - val: "36 or ±18" - unit: V - - param: Maximum input voltage - val: 36 - unit: V - - param: Offset voltage - val: "±3" - unit: V - - param: Voltage gain - val: 200 - unit: V/mV - - param: Large signal response time - val: 300 - unit: ns - - param: Response time - val: 1.3 - unit: "µs" -... - + - + param: 'Maximum supply voltage' + val: '36 or ±18' + unit: V + - + param: 'Maximum input voltage' + val: '36' + unit: V + - + param: 'Offset voltage' + val: '±3' + unit: V + - + param: 'Voltage gain' + val: '200' + unit: V/mV + - + param: 'Large signal response time' + val: '300' + unit: ns + - + param: 'Response time' + val: '1.3' + unit: 'µs' +packages: + DIP: + - 'OUTPUT 2' + - 'OUTPUT 1' + - V+ + - '-INPUT 1' + - '+INPUT 1' + - '-INPUT 2' + - '+INPUT 2' + - '-INPUT 3' + - '+INPUT 3' + - '-INPUT 4' + - '+INPUT 4' + - GND + - 'OUTPUT 4' + - 'OUTPUT 3' diff --git a/LM348.yaml b/LM348.yaml index 92a6a7e..2093e41 100644 --- a/LM348.yaml +++ b/LM348.yaml @@ -1,72 +1,78 @@ ---- -description: "Quad 741 operational amplifier" -aliases: [LM148, LM248] -package: DIP -pincount: 14 -family: "linear" -datasheet: "http://www.national.com/ds/LM/LM148.pdf" +description: 'Quad 741 operational amplifier' +aliases: + - LM148 + - LM248 +family: linear +datasheet: 'http://www.national.com/ds/LM/LM148.pdf' pins: - - num: 1 - sym: 1OUT - desc: output 1 - - num: 2 - sym: 1IN- - desc: inverting input 1 - - num: 3 - sym: 1IN+ - desc: non-inverting input 1 - - num: 4 - sym: Vcc - desc: positive supply voltage - - num: 5 - sym: 2IN+ - desc: non-inverting input 2 - - num: 6 - sym: 2IN- - desc: inverting input 2 - - num: 7 - sym: 2OUT - desc: output 2 - - num: 8 - sym: 3OUT - desc: output 3 - - num: 9 - sym: 3IN- - desc: inverting input 3 - - num: 10 - sym: 3IN+ - desc: non-inverting input 3 - - num: 11 - sym: Vss - desc: negative supply voltage - - num: 12 - sym: 4IN+ - desc: non-inverting input 4 - - num: 13 - sym: 4IN- - desc: inverting input 4 - - num: 14 - sym: 4OUT - desc: output 4 + 1OUT: + desc: 'output 1' + 1IN-: + desc: 'inverting input 1' + 1IN+: + desc: 'non-inverting input 1' + Vcc: + desc: 'positive supply voltage' + 2IN+: + desc: 'non-inverting input 2' + 2IN-: + desc: 'inverting input 2' + 2OUT: + desc: 'output 2' + 3OUT: + desc: 'output 3' + 3IN-: + desc: 'inverting input 3' + 3IN+: + desc: 'non-inverting input 3' + Vss: + desc: 'negative supply voltage' + 4IN+: + desc: 'non-inverting input 4' + 4IN-: + desc: 'inverting input 4' + 4OUT: + desc: 'output 4' specs: - - param: Maximum supply voltage - val: ["±22 (LM148)", "±18 (LM248/348)"] - unit: V - - param: Offset voltage - val: 1 - unit: mV - - param: Gain bandwidth - val: 1 - unit: MHz - - param: Slew rate - val: 0.5 - unit: "V/µs" - - param: Voltage noise - val: 60 - unit: "nV/√Hz" - - param: Supply current (per channel) - val: 0.6 - unit: mA -... - - + - + param: 'Maximum supply voltage' + val: + - '±22 (LM148)' + - '±18 (LM248/348)' + unit: V + - + param: 'Offset voltage' + val: '1' + unit: mV + - + param: 'Gain bandwidth' + val: '1' + unit: MHz + - + param: 'Slew rate' + val: '0.5' + unit: 'V/µs' + - + param: 'Voltage noise' + val: '60' + unit: 'nV/√Hz' + - + param: 'Supply current (per channel)' + val: '0.6' + unit: mA +packages: + DIP: + - 1OUT + - 1IN- + - 1IN+ + - Vcc + - 2IN+ + - 2IN- + - 2OUT + - 3OUT + - 3IN- + - 3IN+ + - Vss + - 4IN+ + - 4IN- + - 4OUT diff --git a/LM358.yaml b/LM358.yaml index c3f9f1b..e56d811 100644 --- a/LM358.yaml +++ b/LM358.yaml @@ -1,50 +1,57 @@ ---- -description: "Low power dual operational amplifier" -aliases: [LM158, LM258, LM2904] -package: DIP -pincount: 8 -family: "linear" -datasheet: "http://www.national.com/ds/LM/LM158.pdf" +description: 'Low power dual operational amplifier' +aliases: + - LM158 + - LM258 + - LM2904 +family: linear +datasheet: 'http://www.national.com/ds/LM/LM158.pdf' pins: - - num: 1 - sym: 1OUT - desc: output 1 - - num: 2 - sym: 1IN- - desc: inverting input 1 - - num: 3 - sym: 1IN+ - desc: non-inverting input 1 - - num: 4 - sym: GND + 1OUT: + desc: 'output 1' + 1IN-: + desc: 'inverting input 1' + 1IN+: + desc: 'non-inverting input 1' + GND: desc: ground - - num: 5 - sym: 2IN+ - desc: non-inverting input 2 - - num: 6 - sym: 2IN- - desc: inverting input 1 - - num: 7 - sym: 2OUT - desc: output 2 - - num: 8 - sym: Vcc - desc: supply voltage + 2IN+: + desc: 'non-inverting input 2' + 2IN-: + desc: 'inverting input 1' + 2OUT: + desc: 'output 2' + Vcc: + desc: 'supply voltage' specs: - - param: Maximum supply voltage - val: [32 (LM158/258/358), 26 (LM2904)] - unit: V - - param: Input offset voltage - val: 2 - unit: mV - - param: Unity-gain bandwidth - val: 1 - unit: MHz - - param: dc voltage gain - val: 100 - unit: dB - - param: Supply current - val: 0.5 - unit: mA -... - + - + param: 'Maximum supply voltage' + val: + - '32 (LM158/258/358)' + - '26 (LM2904)' + unit: V + - + param: 'Input offset voltage' + val: '2' + unit: mV + - + param: 'Unity-gain bandwidth' + val: '1' + unit: MHz + - + param: 'dc voltage gain' + val: '100' + unit: dB + - + param: 'Supply current' + val: '0.5' + unit: mA +packages: + DIP: + - 1OUT + - 1IN- + - 1IN+ + - GND + - 2IN+ + - 2IN- + - 2OUT + - Vcc diff --git a/LM380.yaml b/LM380.yaml index a80059f..97e1aa2 100644 --- a/LM380.yaml +++ b/LM380.yaml @@ -1,76 +1,65 @@ ---- -description: "2.5W audio power amplifier" -package: DIP -pincount: 14 -family: "linear" -datasheet: "http://www.national.com/ds/LM/LM380.pdf" +description: '2.5W audio power amplifier' +family: linear +datasheet: 'http://www.national.com/ds/LM/LM380.pdf' pins: - - num: 1 - sym: BYPASS + BYPASS: desc: bypass - - num: 2 - sym: IN+ - desc: non-inverting input - - num: 3 - sym: GND - desc: ground (heat sink) - - num: 4 - sym: GND - desc: ground (heat sink) - - num: 5 - sym: GND - desc: ground (heat sink) - - num: 6 - sym: IN- - desc: inverting input - - num: 7 - sym: GND - desc: ground - - num: 8 - sym: OUT + IN+: + desc: 'non-inverting input' + GND: + desc: 'ground (heat sink)' + IN-: + desc: 'inverting input' + OUT: desc: output - - num: 9 - sym: NC - desc: no connection - - num: 10 - sym: GND - desc: ground (heat sink) - - num: 11 - sym: GND - desc: ground (heat sink) - - num: 12 - sym: GND - desc: ground (heat sink) - - num: 13 - sym: NC - desc: no connection - - num: 14 - sym: Vcc - desc: supply voltage + Vcc: + desc: 'supply voltage' specs: - - param: Maximum supply voltage - val: 22 - unit: V - - param: Maximum peak current - val: 1.3 - unit: A - - param: Maximum input voltage - val: "±0.5" - unit: V - - param: Output power - val: 2.5 - unit: W - - param: Quiescent power drain - val: 0.13 - unit: W - - param: Bandwidth - val: 100 - unit: kHz - - param: Gain - val: 50 - unit: V/V - - param: Input impedance - val: 150 - unit: "kΩ" -... - + - + param: 'Maximum supply voltage' + val: '22' + unit: V + - + param: 'Maximum peak current' + val: '1.3' + unit: A + - + param: 'Maximum input voltage' + val: '±0.5' + unit: V + - + param: 'Output power' + val: '2.5' + unit: W + - + param: 'Quiescent power drain' + val: '0.13' + unit: W + - + param: Bandwidth + val: '100' + unit: kHz + - + param: Gain + val: '50' + unit: V/V + - + param: 'Input impedance' + val: '150' + unit: 'kΩ' +packages: + DIP: + - BYPASS + - IN+ + - GND + - GND + - GND + - IN- + - GND + - OUT + - NC + - GND + - GND + - GND + - NC + - Vcc diff --git a/LM384.yaml b/LM384.yaml index 376e133..2c39c7d 100644 --- a/LM384.yaml +++ b/LM384.yaml @@ -1,77 +1,65 @@ ---- -description: "5W audio power amplifier" -package: DIP -pincount: 14 -family: "linear" -datasheet: "http://www.national.com/ds/LM/LM384.pdf" +description: '5W audio power amplifier' +family: linear +datasheet: 'http://www.national.com/ds/LM/LM384.pdf' pins: - - num: 1 - sym: BYPASS + BYPASS: desc: bypass - - num: 2 - sym: IN+ - desc: non-inverting input - - num: 3 - sym: GND - desc: ground (heat sink) - - num: 4 - sym: GND - desc: ground (heat sink) - - num: 5 - sym: GND - desc: ground (heat sink) - - num: 6 - sym: IN- - desc: inverting input - - num: 7 - sym: GND - desc: ground - - num: 8 - sym: OUT + IN+: + desc: 'non-inverting input' + GND: + desc: 'ground (heat sink)' + IN-: + desc: 'inverting input' + OUT: desc: output - - num: 9 - sym: NC - desc: no connection - - num: 10 - sym: GND - desc: ground (heat sink) - - num: 11 - sym: GND - desc: ground (heat sink) - - num: 12 - sym: GND - desc: ground (heat sink) - - num: 13 - sym: NC - desc: no connection - - num: 14 - sym: Vcc - desc: supply voltage + Vcc: + desc: 'supply voltage' specs: - - param: Maximum supply voltage - val: 26 - unit: V - - param: Minimum supply voltage - val: 12 - unit: V - - param: Maximum peak current - val: 1.3 - unit: A - - param: Maximum input voltage - val: "±0.5" - unit: V - - param: Output power - val: 5 - unit: W - - param: Bandwidth - val: 450 - unit: kHz - - param: Gain - val: 50 - unit: V/V - - param: Input impedance - val: 150 - unit: "kΩ" -... - - + - + param: 'Maximum supply voltage' + val: '26' + unit: V + - + param: 'Minimum supply voltage' + val: '12' + unit: V + - + param: 'Maximum peak current' + val: '1.3' + unit: A + - + param: 'Maximum input voltage' + val: '±0.5' + unit: V + - + param: 'Output power' + val: '5' + unit: W + - + param: Bandwidth + val: '450' + unit: kHz + - + param: Gain + val: '50' + unit: V/V + - + param: 'Input impedance' + val: '150' + unit: 'kΩ' +packages: + DIP: + - BYPASS + - IN+ + - GND + - GND + - GND + - IN- + - GND + - OUT + - NC + - GND + - GND + - GND + - NC + - Vcc diff --git a/LM386.yaml b/LM386.yaml index 2a01e59..03b6b89 100644 --- a/LM386.yaml +++ b/LM386.yaml @@ -1,53 +1,58 @@ ---- -description: "Low voltage audio power amplifier" -package: DIP -pincount: 8 -family: "linear" -datasheet: "http://www.national.com/ds/LM/LM386.pdf" +description: 'Low voltage audio power amplifier' +family: linear +datasheet: 'http://www.national.com/ds/LM/LM386.pdf' pins: - - num: 1 - sym: GAIN - desc: gain adjustment - - num: 2 - sym: IN- - desc: inverting input - - num: 3 - sym: IN+ - desc: non-inverting input - - num: 4 - sym: GND + GAIN: + desc: 'gain adjustment' + IN-: + desc: 'inverting input' + IN+: + desc: 'non-inverting input' + GND: desc: ground - - num: 5 - sym: OUT + OUT: desc: output - - num: 6 - sym: Vcc - desc: supply voltage - - num: 7 - sym: BYPASS + Vcc: + desc: 'supply voltage' + BYPASS: desc: bypass - - num: 8 - sym: GAIN - desc: gain adjustment specs: - - param: Supply voltage - val: [4 (min), 12 (max)] - unit: V - - param: Quiescent current - val: 4 - unit: mA - - param: Output power - val: 325 - unit: mW - - param: Voltage gain - val: [20 (min), 200 (max)] - - param: Bandwidth - val: 300 - unit: kHz - - param: Total harmonic distortion - val: 0.2 - unit: "%" + - + param: 'Supply voltage' + val: + - '4 (min)' + - '12 (max)' + unit: V + - + param: 'Quiescent current' + val: '4' + unit: mA + - + param: 'Output power' + val: '325' + unit: mW + - + param: 'Voltage gain' + val: + - '20 (min)' + - '200 (max)' + - + param: Bandwidth + val: '300' + unit: kHz + - + param: 'Total harmonic distortion' + val: '0.2' + unit: '%' notes: - - The gain can be varied between 20 and 200 with a resistor in series with a capacitor across pins 1 and 8. -... - + - 'The gain can be varied between 20 and 200 with a resistor in series with a capacitor across pins 1 and 8.' +packages: + DIP: + - GAIN + - IN- + - IN+ + - GND + - OUT + - Vcc + - BYPASS + - GAIN diff --git a/LM393.yaml b/LM393.yaml index a87b3a5..b2d4d8f 100644 --- a/LM393.yaml +++ b/LM393.yaml @@ -1,47 +1,50 @@ ---- -description: Low-power, low-offset dual comparator -aliases: [LM193, LM293] -package: DIP -pincount: 8 -family: "linear" -datasheet: "http://www.national.com/ds/LM/LM193.pdf" +description: 'Low-power, low-offset dual comparator' +aliases: + - LM193 + - LM293 +family: linear +datasheet: 'http://www.national.com/ds/LM/LM193.pdf' pins: - - num: 1 - sym: 1OUT - desc: output 1 - - num: 2 - sym: 1IN- - desc: inverting input 1 - - num: 3 - sym: 1IN+ - desc: non-inverting input 1 - - num: 4 - sym: GND + 1OUT: + desc: 'output 1' + 1IN-: + desc: 'inverting input 1' + 1IN+: + desc: 'non-inverting input 1' + GND: desc: ground - - num: 5 - sym: 2IN+ - desc: non-inverting input 2 - - num: 6 - sym: 2IN- - desc: inverting input 2 - - num: 7 - sym: 2OUT - desc: output 2 - - num: 8 - sym: Vcc - desc: supply voltage + 2IN+: + desc: 'non-inverting input 2' + 2IN-: + desc: 'inverting input 2' + 2OUT: + desc: 'output 2' + Vcc: + desc: 'supply voltage' specs: - - param: Maximum supply voltage - val: 36 - unit: V - - param: Offset voltage - val: 1 - unit: mV - - param: Response time - val: 1.3 - unit: "µs" - - param: Supply current - val: 0.4 - unit: mA -... - + - + param: 'Maximum supply voltage' + val: '36' + unit: V + - + param: 'Offset voltage' + val: '1' + unit: mV + - + param: 'Response time' + val: '1.3' + unit: 'µs' + - + param: 'Supply current' + val: '0.4' + unit: mA +packages: + DIP: + - 1OUT + - 1IN- + - 1IN+ + - GND + - 2IN+ + - 2IN- + - 2OUT + - Vcc diff --git a/MAX1771.yaml b/MAX1771.yaml index d193e14..c4bd8cb 100644 --- a/MAX1771.yaml +++ b/MAX1771.yaml @@ -1,43 +1,45 @@ ---- -description: High-efficiency, low IQ, step-up DC-DC controller -package: DIP -pincount: 8 -family: Maxim -datasheet: "http://datasheets.maxim-ic.com/en/ds/MAX1771.pdf" +description: 'High-efficiency, low IQ, step-up DC-DC controller' +family: Maxim +datasheet: 'http://datasheets.maxim-ic.com/en/ds/MAX1771.pdf' pins: - - num: 1 - sym: EXT - desc: gate drive for external n-channel power transistor - - num: 2 - sym: Vcc - desc: supply voltage - - num: 3 - sym: FB - desc: feedback input for adjustable output (tie to GND for fixed output) - - num: 4 - sym: SHDN - desc: shutdown (active high) - - num: 5 - sym: REF - desc: 1.5V reference output - - num: 6 - sym: AGND - desc: analog ground - - num: 7 - sym: GND - desc: output driver (high-current) ground - - num: 8 - sym: CS - desc: current sense amplifier input + EXT: + desc: 'gate drive for external n-channel power transistor' + Vcc: + desc: 'supply voltage' + FB: + desc: 'feedback input for adjustable output (tie to GND for fixed output)' + SHDN: + desc: 'shutdown (active high)' + REF: + desc: '1.5V reference output' + AGND: + desc: 'analog ground' + GND: + desc: 'output driver (high-current) ground' + CS: + desc: 'current sense amplifier input' specs: - - param: Input voltage - val: [2 (min), 16.5 (max)] - unit: V - - param: Output voltage (when fixed) - val: 12 - unit: V - - param: Maximum output power - val: 24 - unit: W -... - + - + param: 'Input voltage' + val: + - '2 (min)' + - '16.5 (max)' + unit: V + - + param: 'Output voltage (when fixed)' + val: '12' + unit: V + - + param: 'Maximum output power' + val: '24' + unit: W +packages: + DIP: + - EXT + - Vcc + - FB + - SHDN + - REF + - AGND + - GND + - CS diff --git a/MAX232.yaml b/MAX232.yaml index 9f5198e..1c54d29 100644 --- a/MAX232.yaml +++ b/MAX232.yaml @@ -1,64 +1,62 @@ ---- -description: "+5V-powered multichannel RS-232 driver/receiver" -package: DIP -pincount: 16 -family: "Maxim" -datasheet: "http://datasheets.maxim-ic.com/en/ds/MAX220-MAX249.pdf" +description: '+5V-powered multichannel RS-232 driver/receiver' +family: Maxim +datasheet: 'http://datasheets.maxim-ic.com/en/ds/MAX220-MAX249.pdf' pins: - - num: 1 - sym: C1+ - desc: capacitor 1 connection - - num: 2 - sym: V+ - desc: "+10V output" - - num: 3 - sym: C1- - desc: capacitor 1 connection - - num: 4 - sym: C2+ - desc: capacitor 2 connection - - num: 5 - sym: C2- - desc: capacitor 2 connection - - num: 6 - sym: V- - desc: "-10V output" - - num: 7 - sym: T2__OUT - desc: TTL/CMOS output - - num: 8 - sym: R2__IN - desc: RS-232 input - - num: 9 - sym: R2__OUT - desc: RS-232 output - - num: 10 - sym: T2__IN - desc: TTL/CMOS input - - num: 11 - sym: T1__IN - desc: TTL/CMOS input - - num: 12 - sym: R1__OUT - desc: RS-232 output - - num: 13 - sym: R1__IN - desc: RS-232 input - - num: 14 - sym: T1__OUT - desc: TTL/CMOS output - - num: 15 - sym: GND + C1+: + desc: 'capacitor 1 connection' + V+: + desc: '+10V output' + C1-: + desc: 'capacitor 1 connection' + C2+: + desc: 'capacitor 2 connection' + C2-: + desc: 'capacitor 2 connection' + V-: + desc: '-10V output' + 'T2__OUT': + desc: 'TTL/CMOS output' + 'R2__IN': + desc: 'RS-232 input' + 'R2__OUT': + desc: 'RS-232 output' + 'T2__IN': + desc: 'TTL/CMOS input' + 'T1__IN': + desc: 'TTL/CMOS input' + 'R1__OUT': + desc: 'RS-232 output' + 'R1__IN': + desc: 'RS-232 input' + 'T1__OUT': + desc: 'TTL/CMOS output' + GND: desc: ground - - num: 16 - sym: Vcc - desc: "+5V supply voltage" + Vcc: + desc: '+5V supply voltage' specs: - - param: "Data rate" - val: 120 - unit: kbps + - + param: 'Data rate' + val: '120' + unit: kbps notes: - - "Use five capacitors; C1 between pins 1 and 3, C2 between pins 4 and 5, C3 between pin 2 and +5v, C4 between ground and pin 6, and C5 between +5V and ground. See datasheet for schematic." - - "C1 through C5 should be 1.0 µF electrolytic capacitors." -... - + - 'Use five capacitors; C1 between pins 1 and 3, C2 between pins 4 and 5, C3 between pin 2 and +5v, C4 between ground and pin 6, and C5 between +5V and ground. See datasheet for schematic.' + - 'C1 through C5 should be 1.0 µF electrolytic capacitors.' +packages: + DIP: + - C1+ + - V+ + - C1- + - C2+ + - C2- + - V- + - 'T2__OUT' + - 'R2__IN' + - 'R2__OUT' + - 'T2__IN' + - 'T1__IN' + - 'R1__OUT' + - 'R1__IN' + - 'T1__OUT' + - GND + - Vcc diff --git a/MC34063.yaml b/MC34063.yaml index 5666f35..8a96728 100644 --- a/MC34063.yaml +++ b/MC34063.yaml @@ -1,40 +1,41 @@ ---- -description: "Step up/down inverting switching regulator" -package: DIP -pincount: 8 -family: "power" -datasheet: "http://www.onsemi.com/pub_link/Collateral/MC34063A-D.PDF" +description: 'Step up/down inverting switching regulator' +family: power +datasheet: 'http://www.onsemi.com/pub_link/Collateral/MC34063A-D.PDF' pins: - - num: 1 - sym: SW C - desc: switch collector - - num: 2 - sym: SW E - desc: switch emitter - - num: 3 - sym: CAP - desc: timing capacitor - - num: 4 - sym: GND + 'SW C': + desc: 'switch collector' + 'SW E': + desc: 'switch emitter' + CAP: + desc: 'timing capacitor' + GND: desc: ground - - num: 5 - sym: COMP IN - desc: comparator inverting input - - num: 6 - sym: Vcc - desc: supply voltage - - num: 7 - sym: I__pk SENSE - desc: I__pk sense - - num: 8 - sym: DRIVER C - desc: driver collector + 'COMP IN': + desc: 'comparator inverting input' + Vcc: + desc: 'supply voltage' + 'I__pk SENSE': + desc: 'I__pk sense' + 'DRIVER C': + desc: 'driver collector' specs: - - param: Supply voltage - val: [3 (min), 40 (max)] - unit: V - - param: Output switch current - val: 1.5 - unit: A -... - + - + param: 'Supply voltage' + val: + - '3 (min)' + - '40 (max)' + unit: V + - + param: 'Output switch current' + val: '1.5' + unit: A +packages: + DIP: + - 'SW C' + - 'SW E' + - CAP + - GND + - 'COMP IN' + - Vcc + - 'I__pk SENSE' + - 'DRIVER C' diff --git a/MCP23017.yaml b/MCP23017.yaml index 8bd74ea..325c875 100644 --- a/MCP23017.yaml +++ b/MCP23017.yaml @@ -1,94 +1,87 @@ ---- -description: "16-Bit I/O Expander with Serial Interface" -aliases: [] -package: DIP -pincount: 28 -family: "Microchip" -datasheet: "http://ww1.microchip.com/downloads/en/DeviceDoc/21952b.pdf" +description: '16-Bit I/O Expander with Serial Interface' +aliases: { } +family: Microchip +datasheet: 'http://ww1.microchip.com/downloads/en/DeviceDoc/21952b.pdf' pins: - - num: 1 - sym: GPB0 - desc: Bidirectional I/O pin. - - num: 2 - sym: GPB1 - desc: Bidirectional I/O pin. - - num: 3 - sym: GPB2 - desc: Bidirectional I/O pin. - - num: 4 - sym: GPB3 - desc: Bidirectional I/O pin. - - num: 5 - sym: GPB4 - desc: Bidirectional I/O pin. - - num: 6 - sym: GPB5 - desc: Bidirectional I/O pin. - - num: 7 - sym: GPB6 - desc: Bidirectional I/O pin. - - num: 8 - sym: GPB7 - desc: Bidirectional I/O pin. - - num: 9 - sym: V__DD + GPB0: + desc: 'Bidirectional I/O pin.' + GPB1: + desc: 'Bidirectional I/O pin.' + GPB2: + desc: 'Bidirectional I/O pin.' + GPB3: + desc: 'Bidirectional I/O pin.' + GPB4: + desc: 'Bidirectional I/O pin.' + GPB5: + desc: 'Bidirectional I/O pin.' + GPB6: + desc: 'Bidirectional I/O pin.' + GPB7: + desc: 'Bidirectional I/O pin.' + 'V__DD': desc: Power - - num: 10 - sym: V__SS + 'V__SS': desc: Ground - - num: 11 - sym: NC - desc: Not connected - - num: 12 - sym: SCL - desc: Serial clock input - - num: 13 - sym: SDA - desc: Serial data I/O - - num: 14 - sym: NC - desc: Not connected - - num: 15 - sym: A0 - desc: Hardware address pin. Must be externally biased. - - num: 16 - sym: A1 - desc: Hardware address pin. Must be externally biased. - - num: 17 - sym: A2 - desc: Hardware address pin. Must be externally biased. - - num: 18 - sym: ~RESET - desc: Hardware reset. Must be externally biased. - - num: 19 - sym: INTB - desc: Interrupt output for PORTB. Can be configured as active-high, active-low or open-drain. - - num: 20 - sym: INTA - desc: Interrupt output for PORTB. Can be configured as active-high, active-low or open-drain. - - num: 21 - sym: GPA0 - desc: Bidirectional I/O pin. - - num: 22 - sym: GPA1 - desc: Bidirectional I/O pin. - - num: 23 - sym: GPA2 - desc: Bidirectional I/O pin. - - num: 24 - sym: GPA3 - desc: Bidirectional I/O pin. - - num: 25 - sym: GPA4 - desc: Bidirectional I/O pin. - - num: 26 - sym: GPA5 - desc: Bidirectional I/O pin. - - num: 27 - sym: GPA6 - desc: Bidirectional I/O pin. - - num: 28 - sym: GPA7 - desc: Bidirectional I/O pin. -... - + SCL: + desc: 'Serial clock input' + SDA: + desc: 'Serial data I/O' + A0: + desc: 'Hardware address pin. Must be externally biased.' + A1: + desc: 'Hardware address pin. Must be externally biased.' + A2: + desc: 'Hardware address pin. Must be externally biased.' + '~RESET': + desc: 'Hardware reset. Must be externally biased.' + INTB: + desc: 'Interrupt output for PORTB. Can be configured as active-high, active-low or open-drain.' + INTA: + desc: 'Interrupt output for PORTB. Can be configured as active-high, active-low or open-drain.' + GPA0: + desc: 'Bidirectional I/O pin.' + GPA1: + desc: 'Bidirectional I/O pin.' + GPA2: + desc: 'Bidirectional I/O pin.' + GPA3: + desc: 'Bidirectional I/O pin.' + GPA4: + desc: 'Bidirectional I/O pin.' + GPA5: + desc: 'Bidirectional I/O pin.' + GPA6: + desc: 'Bidirectional I/O pin.' + GPA7: + desc: 'Bidirectional I/O pin.' +packages: + DIP: + - GPB0 + - GPB1 + - GPB2 + - GPB3 + - GPB4 + - GPB5 + - GPB6 + - GPB7 + - 'V__DD' + - 'V__SS' + - NC + - SCL + - SDA + - NC + - A0 + - A1 + - A2 + - '~RESET' + - INTB + - INTA + - GPA0 + - GPA1 + - GPA2 + - GPA3 + - GPA4 + - GPA5 + - GPA6 + - GPA7 diff --git a/MCP3002.yaml b/MCP3002.yaml index 03d60b4..99e57c7 100644 --- a/MCP3002.yaml +++ b/MCP3002.yaml @@ -1,46 +1,49 @@ ---- -description: "Dual channel 10-bit ADC with SPI interface" -package: DIP -pincount: 8 -family: Microchip -datasheet: "http://ww1.microchip.com/downloads/en/DeviceDoc/21294d.pdf" +description: 'Dual channel 10-bit ADC with SPI interface' +family: Microchip +datasheet: 'http://ww1.microchip.com/downloads/en/DeviceDoc/21294d.pdf' pins: - - num: 1 - sym: ~CS~/SHDN - desc: chip select/shutdown - - num: 2 - sym: CH0 - desc: channel 0 analog input - - num: 3 - sym: CH1 - desc: channel 1 analog input - - num: 4 - sym: GND + '~CS~/SHDN': + desc: 'chip select/shutdown' + CH0: + desc: 'channel 0 analog input' + CH1: + desc: 'channel 1 analog input' + GND: desc: ground - - num: 5 - sym: D__IN - desc: serial data in - - num: 6 - sym: D__OUT - desc: serial data out - - num: 7 - sym: CLK - desc: serial clock - - num: 8 - sym: V__CC/V__REF - desc: +2.7V to 5.5V supply/reference voltage + 'D__IN': + desc: 'serial data in' + 'D__OUT': + desc: 'serial data out' + CLK: + desc: 'serial clock' + 'V__CC/V__REF': + desc: '+2.7V to 5.5V supply/reference voltage' specs: - - param: Maximum sampling rate - val: [200 (Vcc = 5V), 75 (Vcc = 2.7V)] - unit: ksps - - param: Differential nonlinearity - val: "±1" - unit: LSB - - param: Integral nonlinearity - val: "±1" - unit: LSB - - param: Typical active current - val: 375 - unit: "µA" -... - + - + param: 'Maximum sampling rate' + val: + - '200 (Vcc = 5V)' + - '75 (Vcc = 2.7V)' + unit: ksps + - + param: 'Differential nonlinearity' + val: '±1' + unit: LSB + - + param: 'Integral nonlinearity' + val: '±1' + unit: LSB + - + param: 'Typical active current' + val: '375' + unit: 'µA' +packages: + DIP: + - '~CS~/SHDN' + - CH0 + - CH1 + - GND + - 'D__IN' + - 'D__OUT' + - CLK + - 'V__CC/V__REF' diff --git a/MCP3201.yaml b/MCP3201.yaml index 2538c48..39cae89 100644 --- a/MCP3201.yaml +++ b/MCP3201.yaml @@ -1,59 +1,63 @@ ---- -name: MCP3201 -description: "12-Bit A/D SPI interface A/D Converter" -aliases: [] -package: DIP -pincount: 8 -family: "Microchip" -datasheet: "http://ww1.microchip.com/downloads/en/DeviceDoc/21290e.pdf" +name: MCP3201 +description: '12-Bit A/D SPI interface A/D Converter' +aliases: { } +family: Microchip +datasheet: 'http://ww1.microchip.com/downloads/en/DeviceDoc/21290e.pdf' pins: - - num: 1 - sym: V__Ref - desc: Analog reference voltage - - num: 2 - sym: IN+ - desc: Positive analog input - - num: 3 - sym: IN- - desc: Negative analog input - - num: 4 - sym: V__SS + 'V__Ref': + desc: 'Analog reference voltage' + IN+: + desc: 'Positive analog input' + IN-: + desc: 'Negative analog input' + 'V__SS': desc: Ground - - num: 5 - sym: ~CS~/SHDN - desc: Chip select/shutdown - - num: 6 - sym: D__OUT - desc: SPI data out - - num: 7 - sym: CLK - desc: SPI Clock - - num: 8 - sym: V__DD - desc: Positive supply voltage (+2.7 to 5.5V) + '~CS~/SHDN': + desc: 'Chip select/shutdown' + 'D__OUT': + desc: 'SPI data out' + CLK: + desc: 'SPI Clock' + 'V__DD': + desc: 'Positive supply voltage (+2.7 to 5.5V)' specs: - - param: Resolution - val: 12 - unit: bits - - param: Maximum sample rate (V__DD = 5V) - val: 100 - unit: ksps - - param: Maximum sample rate (V__DD = 2.7V) - val: 50 - unit: ksps - - param: Minimum operating voltage - val: 2.7 - unit: V - - param: Maximum operating voltage (nominal) - val: 5.5 - unit: V - - param: Maximum operating voltage (absolute maximum rating) - val: 7.0 - unit: V - - param: Maximum active current (V__DD = 5V) - val: 400 - unit: "µA" + - + param: Resolution + val: '12' + unit: bits + - + param: 'Maximum sample rate (V__DD = 5V)' + val: '100' + unit: ksps + - + param: 'Maximum sample rate (V__DD = 2.7V)' + val: '50' + unit: ksps + - + param: 'Minimum operating voltage' + val: '2.7' + unit: V + - + param: 'Maximum operating voltage (nominal)' + val: '5.5' + unit: V + - + param: 'Maximum operating voltage (absolute maximum rating)' + val: '7' + unit: V + - + param: 'Maximum active current (V__DD = 5V)' + val: '400' + unit: 'µA' notes: - - Also available with 2 channels (MCP3202), 4 channels (MCP3204) and 8 channels (MCP3208) - - + - 'Also available with 2 channels (MCP3202), 4 channels (MCP3204) and 8 channels (MCP3208)' +packages: + DIP: + - 'V__Ref' + - IN+ + - IN- + - 'V__SS' + - '~CS~/SHDN' + - 'D__OUT' + - CLK + - 'V__DD' diff --git a/MCP3202.yaml b/MCP3202.yaml index 0fc2e60..7c240e3 100644 --- a/MCP3202.yaml +++ b/MCP3202.yaml @@ -1,58 +1,63 @@ ---- -name: MCP3202 -description: "12-Bit 2-Channel SPI interface A/D Converter" -aliases: [] -package: DIP -pincount: 8 -family: "Microchip" -datasheet: "http://ww1.microchip.com/downloads/aen/DeviceDoc/21034e.pdf" +name: MCP3202 +description: '12-Bit 2-Channel SPI interface A/D Converter' +aliases: { } +family: Microchip +datasheet: 'http://ww1.microchip.com/downloads/aen/DeviceDoc/21034e.pdf' pins: - - num: 1 - sym: ~CS~/SHDN - desc: Chip select/Shutdown - - num: 2 - sym: CH0 - desc: Channel 1 analog input - - num: 3 - sym: CH1 - desc: Channel 2 analog input - - num: 4 - sym: V__SS + '~CS~/SHDN': + desc: 'Chip select/Shutdown' + CH0: + desc: 'Channel 1 analog input' + CH1: + desc: 'Channel 2 analog input' + 'V__SS': desc: Ground - - num: 5 - sym: D__IN - desc: SPI data input - - num: 6 - sym: D__OUT - desc: SPI data output - - num: 7 - sym: CLK - desc: SPI clock - - num: 8 - sym: V__DD/V__REF - desc: Supply voltage/analog reference voltage + 'D__IN': + desc: 'SPI data input' + 'D__OUT': + desc: 'SPI data output' + CLK: + desc: 'SPI clock' + 'V__DD/V__REF': + desc: 'Supply voltage/analog reference voltage' specs: - - param: Resolution - val: 12 - unit: bits - - param: Maximum sample rate (V__DD = 5V) - val: 100 - unit: ksps - - param: Maximum sample rate (V__DD = 2.7V) - val: 50 - unit: ksps - - param: Minimum operating voltage - val: 2.7 - unit: V - - param: Maximum operating voltage (nominal) - val: 5.5 - unit: V - - param: Maximum operating voltage (absolute maximum rating) - val: 7.0 - unit: V - - param: Maximum active current (V__DD = 5V) - val: 550 - unit: "µa" + - + param: Resolution + val: '12' + unit: bits + - + param: 'Maximum sample rate (V__DD = 5V)' + val: '100' + unit: ksps + - + param: 'Maximum sample rate (V__DD = 2.7V)' + val: '50' + unit: ksps + - + param: 'Minimum operating voltage' + val: '2.7' + unit: V + - + param: 'Maximum operating voltage (nominal)' + val: '5.5' + unit: V + - + param: 'Maximum operating voltage (absolute maximum rating)' + val: '7' + unit: V + - + param: 'Maximum active current (V__DD = 5V)' + val: '550' + unit: 'µa' notes: - - Also available with 1 channel (MCP3201), 4 channels (MCP3204) and 8 channels (MCP3208) - + - 'Also available with 1 channel (MCP3201), 4 channels (MCP3204) and 8 channels (MCP3208)' +packages: + DIP: + - '~CS~/SHDN' + - CH0 + - CH1 + - 'V__SS' + - 'D__IN' + - 'D__OUT' + - CLK + - 'V__DD/V__REF' diff --git a/MCP3204.yaml b/MCP3204.yaml index cbea911..1c9512c 100644 --- a/MCP3204.yaml +++ b/MCP3204.yaml @@ -1,67 +1,67 @@ ---- name: MCP3204 -description: "4-channel 12 bit SPI A/D converter" -aliases: [] -package: DIP -pincount: 14 -family: "microchip" -datasheet: "http://ww1.microchip.com/downloads/en/devicedoc/21298c.pdf" +description: '4-channel 12 bit SPI A/D converter' +aliases: { } +family: microchip +datasheet: 'http://ww1.microchip.com/downloads/en/devicedoc/21298c.pdf' pins: - - num: 1 - sym: CH0 - desc: Analog channel 0 input - - num: 2 - sym: CH1 - desc: Analog channel 1 input - - num: 3 - sym: CH2 - desc: Analog channel 2 input - - num: 4 - sym: CH3 - desc: Analog channel 3 input - - num: 5 - sym: NC - desc: Not connected - - num: 6 - sym: NC - desc: Not connected - - num: 7 - sym: DGND - desc: Digital ground - - num: 8 - sym: ~CS~/SHDN - desc: Chip select / Shutdown - - num: 9 - sym: D__IN - desc: Serial data input - - num: 10 - sym: D__OUT - desc: Serial data output - - num: 11 - sym: CLK - desc: SPI clock - - num: 12 - sym: AGND - desc: Analog ground - - num: 13 - sym: V__REF - desc: Analog reference input voltage - - num: 14 - sym: V__DD - desc: +2.7 to 5.5 V power supply + CH0: + desc: 'Analog channel 0 input' + CH1: + desc: 'Analog channel 1 input' + CH2: + desc: 'Analog channel 2 input' + CH3: + desc: 'Analog channel 3 input' + DGND: + desc: 'Digital ground' + '~CS~/SHDN': + desc: 'Chip select / Shutdown' + 'D__IN': + desc: 'Serial data input' + 'D__OUT': + desc: 'Serial data output' + CLK: + desc: 'SPI clock' + AGND: + desc: 'Analog ground' + 'V__REF': + desc: 'Analog reference input voltage' + 'V__DD': + desc: '+2.7 to 5.5 V power supply' specs: - - param: "Max active current" - val: 400 - unit: "µA" - - param: "Max sampling rate" - val: [100 (5V supply), 50 (2.7V supply)] - unit: "ksps" - - param: "Resolution" - val: 12 - unit: "bits" - - param: "Conversion time" - val: 12 - unit: "clock cycles" + - + param: 'Max active current' + val: '400' + unit: 'µA' + - + param: 'Max sampling rate' + val: + - '100 (5V supply)' + - '50 (2.7V supply)' + unit: ksps + - + param: Resolution + val: '12' + unit: bits + - + param: 'Conversion time' + val: '12' + unit: 'clock cycles' notes: - - "Also available as one-channel (MCP3201), two-channel (MCP3202) and eight-channel (MCP3208) version" - + - 'Also available as one-channel (MCP3201), two-channel (MCP3202) and eight-channel (MCP3208) version' +packages: + DIP: + - CH0 + - CH1 + - CH2 + - CH3 + - NC + - NC + - DGND + - '~CS~/SHDN' + - 'D__IN' + - 'D__OUT' + - CLK + - AGND + - 'V__REF' + - 'V__DD' diff --git a/NE5532.yaml b/NE5532.yaml index dbda7f1..44a7604 100644 --- a/NE5532.yaml +++ b/NE5532.yaml @@ -1,53 +1,56 @@ ---- -description: "Dual operational amplifier" -aliases: [] -package: DIP -pincount: 8 -family: "Fairchild" -datasheet: "http://www.fairchildsemi.com/ds/NE/NE5532.pdf" +description: 'Dual operational amplifier' +aliases: { } +family: Fairchild +datasheet: 'http://www.fairchildsemi.com/ds/NE/NE5532.pdf' pins: - - num: 1 - sym: 1OUT - desc: Output 1 - - num: 2 - sym: 1IN- - desc: Inverting input 1 - - num: 3 - sym: 1IN+ - desc: Non-inverting input 1 - - num: 4 - sym: GND + 1OUT: + desc: 'Output 1' + 1IN-: + desc: 'Inverting input 1' + 1IN+: + desc: 'Non-inverting input 1' + GND: desc: Ground - - num: 5 - sym: 2IN+ - desc: Non-inverting input 2 - - num: 6 - sym: 2IN- - desc: Inverting input 2 - - num: 7 - sym: 2OUT - desc: Output 2 - - num: 8 - sym: Vcc - desc: Supply voltage + 2IN+: + desc: 'Non-inverting input 2' + 2IN-: + desc: 'Inverting input 2' + 2OUT: + desc: 'Output 2' + Vcc: + desc: 'Supply voltage' specs: - - param: "Supply voltage" - val: "±22" - unit: V - - param: "Differential input voltage" - val: "±13" - unit: V - - param: "Input voltage" - val: "Supply voltage" - unit: V - - param: "Power dissipation (8-DIP)" - val: 1100 - unit: mW - - param: "Power dissipation (8-SOP)" - val: 500 - unit: mW - - param: "Operating temperature range" - val: "0~70" - unit: "°C" -... - + - + param: 'Supply voltage' + val: '±22' + unit: V + - + param: 'Differential input voltage' + val: '±13' + unit: V + - + param: 'Input voltage' + val: 'Supply voltage' + unit: V + - + param: 'Power dissipation (8-DIP)' + val: '1100' + unit: mW + - + param: 'Power dissipation (8-SOP)' + val: '500' + unit: mW + - + param: 'Operating temperature range' + val: '0~70' + unit: '°C' +packages: + DIP: + - 1OUT + - 1IN- + - 1IN+ + - GND + - 2IN+ + - 2IN- + - 2OUT + - Vcc diff --git a/PCF8574.yaml b/PCF8574.yaml index ba616ec..4fa3bc5 100644 --- a/PCF8574.yaml +++ b/PCF8574.yaml @@ -1,79 +1,83 @@ ---- -description: "Remote 8-bit I/O expander for I2C bus" -aliases: [PCF8574P] -package: DIP -pincount: 16 -family: "Philips" -datasheet: "http://www.nxp.com/acrobat_download/datasheets/PCF8574_4.pdf" +description: 'Remote 8-bit I/O expander for I2C bus' +aliases: + - PCF8574P +family: Philips +datasheet: 'http://www.nxp.com/acrobat_download/datasheets/PCF8574_4.pdf' pins: - - num: 1 - sym: A0 - desc: address input 0 - - num: 2 - sym: A1 - desc: address input 1 - - num: 3 - sym: A2 - desc: address input 2 - - num: 4 - sym: P0 - desc: quasi-bidirectional I/O 0 - - num: 5 - sym: P1 - desc: quasi-bidirectional I/O 1 - - num: 6 - sym: P2 - desc: quasi-bidirectional I/O 2 - - num: 7 - sym: P3 - desc: quasi-bidirectional I/O 3 - - num: 8 - sym: GND - desc: supply ground - - num: 9 - sym: P4 - desc: quasi-bidirectional I/O 4 - - num: 10 - sym: P5 - desc: quasi-bidirectional I/O 5 - - num: 11 - sym: P6 - desc: quasi-bidirectional I/O 6 - - num: 12 - sym: P7 - desc: quasi-bidirectional I/O 7 - - num: 13 - sym: ~INT - desc: interrupt output (active LOW) - - num: 14 - sym: SCL - desc: serial clock line - - num: 15 - sym: SDA - desc: serial data line - - num: 16 - sym: Vcc - desc: supply voltage + A0: + desc: 'address input 0' + A1: + desc: 'address input 1' + A2: + desc: 'address input 2' + P0: + desc: 'quasi-bidirectional I/O 0' + P1: + desc: 'quasi-bidirectional I/O 1' + P2: + desc: 'quasi-bidirectional I/O 2' + P3: + desc: 'quasi-bidirectional I/O 3' + GND: + desc: 'supply ground' + P4: + desc: 'quasi-bidirectional I/O 4' + P5: + desc: 'quasi-bidirectional I/O 5' + P6: + desc: 'quasi-bidirectional I/O 6' + P7: + desc: 'quasi-bidirectional I/O 7' + '~INT': + desc: 'interrupt output (active LOW)' + SCL: + desc: 'serial clock line' + SDA: + desc: 'serial data line' + Vcc: + desc: 'supply voltage' specs: - - param: "Minimum supply voltage" - val: 2.5 - unit: V - - param: "Maximum supply voltage" - val: 6.0 - unit: V - - param: "LOW level output current, minimum" - val: 10 - unit: mA - - param: "LOW level output current, typical" - val: 25 - unit: mA - - param: "HIGH level output current, minimum" - val: 10 - unit: "µA" - - param: "HIGH level output current, maximum" - val: 300 - unit: "µA" + - + param: 'Minimum supply voltage' + val: '2.5' + unit: V + - + param: 'Maximum supply voltage' + val: '6' + unit: V + - + param: 'LOW level output current, minimum' + val: '10' + unit: mA + - + param: 'LOW level output current, typical' + val: '25' + unit: mA + - + param: 'HIGH level output current, minimum' + val: '10' + unit: 'µA' + - + param: 'HIGH level output current, maximum' + val: '300' + unit: 'µA' notes: - - "I2C address range: 0x40-0x4e (7-bit address range: 0x20-0x27)" -... - + - 'I2C address range: 0x40-0x4e (7-bit address range: 0x20-0x27)' +packages: + DIP: + - A0 + - A1 + - A2 + - P0 + - P1 + - P2 + - P3 + - GND + - P4 + - P5 + - P6 + - P7 + - '~INT' + - SCL + - SDA + - Vcc diff --git a/PIC12F683.yaml b/PIC12F683.yaml index fd87a89..a41629c 100644 --- a/PIC12F683.yaml +++ b/PIC12F683.yaml @@ -1,49 +1,50 @@ ---- -description: "8-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology" -aliases: [] -package: DIP -pincount: 8 -family: "Microchip" -datasheet: "http://ww1.microchip.com/downloads/en/DeviceDoc/41211D_.pdf" +description: '8-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology' +aliases: { } +family: Microchip +datasheet: 'http://ww1.microchip.com/downloads/en/DeviceDoc/41211D_.pdf' pins: - - num: 1 - sym: VDD - desc: Positive supply - - num: 2 - sym: GP5/T1CKI/OSC1/CLKIN - desc: GPIO 5, Timer1 clock, Crystal/Resonator, External clock input - - num: 3 - sym: GP4/AN3/~T1G~/OSC2/CLKOUT - desc: GPIO 4, A/D Channel 3 input, Timer1 gate, Crystal/Resonator, FOSC/4 output - - num: 4 - sym: GP3/~MCLR~/VPP - desc: GPIO 3, Master Clear, Programming voltage - - num: 5 - sym: GP2/AN2/T0CKI/INT/COUT/CCP1 - desc: GPIO 2, A/D Channel 2 input, Timer0 clock input, External Interrupt, Comparator 1 output, Capture input/Compare output/PWM output - - num: 6 - sym: GP1/AN1/CIN-/VREF/ICSPCLK - desc: GPIO 1, A/D Channel 1 input, Comparator 1 input, External Voltage Reference, Serial Programming Clock - - num: 7 - sym: GP0/AN0/CIN+/ICSPDAT/ULPWU - desc: GPIO 0, Comparator 1 input, Serial Programming Data I/O, Ultra Low-Power Wake-up input - - num: 8 - sym: VSS - desc: Ground reference + VDD: + desc: 'Positive supply' + GP5/T1CKI/OSC1/CLKIN: + desc: 'GPIO 5, Timer1 clock, Crystal/Resonator, External clock input' + 'GP4/AN3/~T1G~/OSC2/CLKOUT': + desc: 'GPIO 4, A/D Channel 3 input, Timer1 gate, Crystal/Resonator, FOSC/4 output' + 'GP3/~MCLR~/VPP': + desc: 'GPIO 3, Master Clear, Programming voltage' + GP2/AN2/T0CKI/INT/COUT/CCP1: + desc: 'GPIO 2, A/D Channel 2 input, Timer0 clock input, External Interrupt, Comparator 1 output, Capture input/Compare output/PWM output' + GP1/AN1/CIN-/VREF/ICSPCLK: + desc: 'GPIO 1, A/D Channel 1 input, Comparator 1 input, External Voltage Reference, Serial Programming Clock' + GP0/AN0/CIN+/ICSPDAT/ULPWU: + desc: 'GPIO 0, Comparator 1 input, Serial Programming Data I/O, Ultra Low-Power Wake-up input' + VSS: + desc: 'Ground reference' specs: - - param: "Program Memory" - val: 3.5 - unit: KB - - param: "CPU Speed" - val: 5 - unit: MIPS - - param: "RAM" - val: 128 - unit: Bytes - - param: "Data EEPROM" - val: 256 - unit: Bytes + - + param: 'Program Memory' + val: '3.5' + unit: KB + - + param: 'CPU Speed' + val: '5' + unit: MIPS + - + param: RAM + val: '128' + unit: Bytes + - + param: 'Data EEPROM' + val: '256' + unit: Bytes notes: - - The Low Pin-count (8) PIC® Flash microcontroller products offer all of the advantages of the well recognized mid-range x14 architecture with standardized features including a wide operating voltage of 2.0-5.5 volts, on-board EEPROM Data Memory, and nanoWatt Technology. Standard analog peripherals include up to 4 channels of 10-bit A/D, an analog comparator module with a single comparator, programmable on-chip voltage reference and a Standard Capture/Compare/PWM (CCP) module. -... - + - 'The Low Pin-count (8) PIC® Flash microcontroller products offer all of the advantages of the well recognized mid-range x14 architecture with standardized features including a wide operating voltage of 2.0-5.5 volts, on-board EEPROM Data Memory, and nanoWatt Technology. Standard analog peripherals include up to 4 channels of 10-bit A/D, an analog comparator module with a single comparator, programmable on-chip voltage reference and a Standard Capture/Compare/PWM (CCP) module.' +packages: + DIP: + - VDD + - GP5/T1CKI/OSC1/CLKIN + - 'GP4/AN3/~T1G~/OSC2/CLKOUT' + - 'GP3/~MCLR~/VPP' + - GP2/AN2/T0CKI/INT/COUT/CCP1 + - GP1/AN1/CIN-/VREF/ICSPCLK + - GP0/AN0/CIN+/ICSPDAT/ULPWU + - VSS diff --git a/PIC16F1936.yaml b/PIC16F1936.yaml index 4b61cc8..4c86485 100644 --- a/PIC16F1936.yaml +++ b/PIC16F1936.yaml @@ -1,109 +1,108 @@ ---- -description: "8-Bit CMOS Microcontrollers with LCD Driver with nano Watt XLPTM Technology" -aliases: [] -package: DIP -pincount: 28 -family: "Microchip 16F" -datasheet: "http://ww1.microchip.com/downloads/en/DeviceDoc/41364C.pdf" +description: '8-Bit CMOS Microcontrollers with LCD Driver with nano Watt XLPTM Technology' +aliases: { } +family: 'Microchip 16F' +datasheet: 'http://ww1.microchip.com/downloads/en/DeviceDoc/41364C.pdf' pins: - - num: 1 - sym: VPP/~MCLR~/RE3 - desc: Programming voltage, Master Clear, General purpose input - - num: 2 - sym: SEG12/VCAP/~SS~/SRNQ/C2OUT/C12IN0-/AN0/RA0 - desc: LCD Analog output, Filter capacitor, Slave Select input, SR Latch inverting output, Comparator C2 output, Comparator C1 or C2 negative input, A/D Channel 0 input, General purpose I/O - - num: 3 - sym: SEG7/C12IN1-/AN1/RA1 - desc: LCD Analog output, Comparator C1 or C2 negative input, A/D Channel 1 input, General purpose I/O - - num: 4 - sym: COM2/DACOUT/VREF-/C2IN+/AN2/RA2 - desc: LCD Analog output, Comparator Voltage Reference output, A/D Negative Voltage Reference input, Comparator C2 positive input, A/D Channel 2 input, General purpose I/O - - num: 5 - sym: SEG15/COM3/VREF+/C1IN+/AN3/RA3 - desc: LCD Analog output, LCD Analog output, A/D Voltage Reference input, Comparator C1 positive input, A/D Channel 3 input, General purpose I/O - - num: 6 - sym: SEG4/CCP5/SRQ/T0CKI/CPS6/C1OUT/RA4 - desc: LCD Analog output, Capture/Compare/PWM5, SR Latch non-inverting output, Timer0 clock input, Capacitive sensing input 6, Comparator C1 output, General purpose I/O - - num: 7 - sym: SEG5/VCAP/~SS~/SRNQ/CPS7/C2OUT/AN4/RA5 - desc: LCD Analog output, Filter capacitor, Slave Select input, SR Latch inverting output, Capacitive sensing input 7, Comparator C2 output, A/D Channel 4 input, General purpose I/O - - num: 8 - sym: GND - desc: Ground reference - - num: 9 - sym: SEG2/CLKIN/OSC1/RA7 - desc: LCD Analog output, External clock input, Crystal/Resonator, General purpose I/O - - num: 10 - sym: SEG1/VCAP/CLKOUT/OSC2/RA6 - desc: LCD Analog output, Filter capacitor, FOSC/4 output, Crystal/Resonator, General purpose I/O - - num: 11 - sym: P2B/T1CKI/T1OSO/RC0 - desc: PWM output, Timer1 clock input, Timer1 oscillator connection, General purpose I/O - - num: 12 - sym: P2A/CCP2/T1OSI/RC1 - desc: PWM output, Capture/Compare/PWM2, Timer1 oscillator connection, General purpose I/O - - num: 13 - sym: SEG3/P1A/CCP1/RC2 - desc: LCD Analog output, PWM output, Capture/Compare/PWM1, General purpose I/O - - num: 14 - sym: SEG6/SCL/SCK/RC3 - desc: LCD Analog output, I2C clock, SPI clock, General purpose I/O - - num: 15 - sym: RC4/SDI/SDA/T1G/SEG11 - desc: General purpose I/O, SPI data input, I2C data input/output, Timer1 Gate input, LCD Analog output, - - num: 16 - sym: RC5/SDO/SEG10 - desc: General purpose I/O, SPI data output, LCD Analog output - - num: 17 - sym: RC6/TX/CK/CCP3/P3A/SEG9 - desc: General purpose I/O, USART asynchronous transmit, USART synchronous clock, Capture/Compare/PWM3, PWM output, LCD Analog output - - num: 18 - sym: RC7/RX/DT/P3B/SEG8 - desc: General purpose I/O, USART asynchronous input, USART synchronous data, PWM output, LCD Analog output - - num: 19 - sym: GND - desc: Ground reference - - num: 20 - sym: VCC - desc: Positive supply - - num: 21 - sym: RB0/AN12/CPS0/CCP4/SRI/INT/SEG0 - desc: General purpose I/O, A/D Channel 12 input, Capacitive sensing input 0, Capture/Compare/PWM4, SR Latch input, External interrupt, LCD analog output - - num: 22 - sym: RB1/AN10/C12IN3-/CPS1/P1C/VLCD1 - desc: General purpose I/O, A/D Channel 10 input, Comparator C1 or C2 negative input, Capacitive sensing input 1, PWM output, LCD analog input - - num: 23 - sym: RB2/AN8/CPS2/P1B/VLCD2 - desc: General purpose I/O, A/D Channel 8 input, Capacitive sensing input 2, PWM output - - num: 24 - sym: RB3/AN9/C12IN2-/CPS3/CCP2/P2A/VLCD3 - desc: General purpose I/O, A/D Channel 9 input, Comparator C1 or C2 negative input, Capacitive sensing input 3, Capture/Compare/PWM2, PWM output, LCD analog input - - num: 25 - sym: RB4/AN11/CPS4/P1D/COM0 - desc: General purpose I/O, A/D Channel 11 input, Capacitive sensing input 4, PWM output, LCD Analog output - - num: 26 - sym: RB5/AN13/CPS5/P2B/CCP3/P3A/T1G/COM1 - desc: General purpose I/O, A/D Channel 13 input, Capacitive sensing input 5, PWM output, Capture/Compare/PWM3, PWM output, Timer1 Gate input, LCD Analog output - - num: 27 - sym: RB6/ICSPCLK/ICDCLK/SEG14 - desc: General purpose I/O, Serial Programming Clock, In-Circuit Debug Clock, LCD Analog output - - num: 28 - sym: RB7/ICSPDAT/ICDDAT/SEG13 - desc: General purpose I/O, ICSP Data I/O, In-Circuit Data I/O, LCD Analog output + 'VPP/~MCLR~/RE3': + desc: 'Programming voltage, Master Clear, General purpose input' + 'SEG12/VCAP/~SS~/SRNQ/C2OUT/C12IN0-/AN0/RA0': + desc: 'LCD Analog output, Filter capacitor, Slave Select input, SR Latch inverting output, Comparator C2 output, Comparator C1 or C2 negative input, A/D Channel 0 input, General purpose I/O' + SEG7/C12IN1-/AN1/RA1: + desc: 'LCD Analog output, Comparator C1 or C2 negative input, A/D Channel 1 input, General purpose I/O' + COM2/DACOUT/VREF-/C2IN+/AN2/RA2: + desc: 'LCD Analog output, Comparator Voltage Reference output, A/D Negative Voltage Reference input, Comparator C2 positive input, A/D Channel 2 input, General purpose I/O' + SEG15/COM3/VREF+/C1IN+/AN3/RA3: + desc: 'LCD Analog output, LCD Analog output, A/D Voltage Reference input, Comparator C1 positive input, A/D Channel 3 input, General purpose I/O' + SEG4/CCP5/SRQ/T0CKI/CPS6/C1OUT/RA4: + desc: 'LCD Analog output, Capture/Compare/PWM5, SR Latch non-inverting output, Timer0 clock input, Capacitive sensing input 6, Comparator C1 output, General purpose I/O' + 'SEG5/VCAP/~SS~/SRNQ/CPS7/C2OUT/AN4/RA5': + desc: 'LCD Analog output, Filter capacitor, Slave Select input, SR Latch inverting output, Capacitive sensing input 7, Comparator C2 output, A/D Channel 4 input, General purpose I/O' + GND: + desc: 'Ground reference' + SEG2/CLKIN/OSC1/RA7: + desc: 'LCD Analog output, External clock input, Crystal/Resonator, General purpose I/O' + SEG1/VCAP/CLKOUT/OSC2/RA6: + desc: 'LCD Analog output, Filter capacitor, FOSC/4 output, Crystal/Resonator, General purpose I/O' + P2B/T1CKI/T1OSO/RC0: + desc: 'PWM output, Timer1 clock input, Timer1 oscillator connection, General purpose I/O' + P2A/CCP2/T1OSI/RC1: + desc: 'PWM output, Capture/Compare/PWM2, Timer1 oscillator connection, General purpose I/O' + SEG3/P1A/CCP1/RC2: + desc: 'LCD Analog output, PWM output, Capture/Compare/PWM1, General purpose I/O' + SEG6/SCL/SCK/RC3: + desc: 'LCD Analog output, I2C clock, SPI clock, General purpose I/O' + RC4/SDI/SDA/T1G/SEG11: + desc: 'General purpose I/O, SPI data input, I2C data input/output, Timer1 Gate input, LCD Analog output,' + RC5/SDO/SEG10: + desc: 'General purpose I/O, SPI data output, LCD Analog output' + RC6/TX/CK/CCP3/P3A/SEG9: + desc: 'General purpose I/O, USART asynchronous transmit, USART synchronous clock, Capture/Compare/PWM3, PWM output, LCD Analog output' + RC7/RX/DT/P3B/SEG8: + desc: 'General purpose I/O, USART asynchronous input, USART synchronous data, PWM output, LCD Analog output' + VCC: + desc: 'Positive supply' + RB0/AN12/CPS0/CCP4/SRI/INT/SEG0: + desc: 'General purpose I/O, A/D Channel 12 input, Capacitive sensing input 0, Capture/Compare/PWM4, SR Latch input, External interrupt, LCD analog output' + RB1/AN10/C12IN3-/CPS1/P1C/VLCD1: + desc: 'General purpose I/O, A/D Channel 10 input, Comparator C1 or C2 negative input, Capacitive sensing input 1, PWM output, LCD analog input' + RB2/AN8/CPS2/P1B/VLCD2: + desc: 'General purpose I/O, A/D Channel 8 input, Capacitive sensing input 2, PWM output' + RB3/AN9/C12IN2-/CPS3/CCP2/P2A/VLCD3: + desc: 'General purpose I/O, A/D Channel 9 input, Comparator C1 or C2 negative input, Capacitive sensing input 3, Capture/Compare/PWM2, PWM output, LCD analog input' + RB4/AN11/CPS4/P1D/COM0: + desc: 'General purpose I/O, A/D Channel 11 input, Capacitive sensing input 4, PWM output, LCD Analog output' + RB5/AN13/CPS5/P2B/CCP3/P3A/T1G/COM1: + desc: 'General purpose I/O, A/D Channel 13 input, Capacitive sensing input 5, PWM output, Capture/Compare/PWM3, PWM output, Timer1 Gate input, LCD Analog output' + RB6/ICSPCLK/ICDCLK/SEG14: + desc: 'General purpose I/O, Serial Programming Clock, In-Circuit Debug Clock, LCD Analog output' + RB7/ICSPDAT/ICDDAT/SEG13: + desc: 'General purpose I/O, ICSP Data I/O, In-Circuit Data I/O, LCD Analog output' specs: - - param: "Program Memory" - val: 14 - unit: KB - - param: "CPU Speed" - val: 8 - unit: MIPS - - param: "RAM" - val: 512 - unit: Bytes - - param: "Data EEPROM" - val: 256 - unit: Bytes + - + param: 'Program Memory' + val: '14' + unit: KB + - + param: 'CPU Speed' + val: '8' + unit: MIPS + - + param: RAM + val: '512' + unit: Bytes + - + param: 'Data EEPROM' + val: '256' + unit: Bytes notes: - - Internal 32MHz oscillator, 60 LCD segment drive support, Integrated Capacitive mTouch Sensing Module -... - + - 'Internal 32MHz oscillator, 60 LCD segment drive support, Integrated Capacitive mTouch Sensing Module' +packages: + DIP: + - 'VPP/~MCLR~/RE3' + - 'SEG12/VCAP/~SS~/SRNQ/C2OUT/C12IN0-/AN0/RA0' + - SEG7/C12IN1-/AN1/RA1 + - COM2/DACOUT/VREF-/C2IN+/AN2/RA2 + - SEG15/COM3/VREF+/C1IN+/AN3/RA3 + - SEG4/CCP5/SRQ/T0CKI/CPS6/C1OUT/RA4 + - 'SEG5/VCAP/~SS~/SRNQ/CPS7/C2OUT/AN4/RA5' + - GND + - SEG2/CLKIN/OSC1/RA7 + - SEG1/VCAP/CLKOUT/OSC2/RA6 + - P2B/T1CKI/T1OSO/RC0 + - P2A/CCP2/T1OSI/RC1 + - SEG3/P1A/CCP1/RC2 + - SEG6/SCL/SCK/RC3 + - RC4/SDI/SDA/T1G/SEG11 + - RC5/SDO/SEG10 + - RC6/TX/CK/CCP3/P3A/SEG9 + - RC7/RX/DT/P3B/SEG8 + - GND + - VCC + - RB0/AN12/CPS0/CCP4/SRI/INT/SEG0 + - RB1/AN10/C12IN3-/CPS1/P1C/VLCD1 + - RB2/AN8/CPS2/P1B/VLCD2 + - RB3/AN9/C12IN2-/CPS3/CCP2/P2A/VLCD3 + - RB4/AN11/CPS4/P1D/COM0 + - RB5/AN13/CPS5/P2B/CCP3/P3A/T1G/COM1 + - RB6/ICSPCLK/ICDCLK/SEG14 + - RB7/ICSPDAT/ICDDAT/SEG13 diff --git a/PIC16F84A.yaml b/PIC16F84A.yaml index 9b194d9..44fc3ba 100644 --- a/PIC16F84A.yaml +++ b/PIC16F84A.yaml @@ -1,80 +1,75 @@ ---- -description: "PIC16F84A Microcontroller" -package: DIP -pincount: 18 -family: "Microchip" -datasheet: "http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1335&dDocName=en010230" +description: 'PIC16F84A Microcontroller' +family: Microchip +datasheet: 'http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1335&dDocName=en010230' pins: - - num: 1 - sym: RA2 - desc: "Bi-directional I/O port" - - num: 2 - sym: RA3 - desc: "Bi-directional I/O port" - - num: 3 - sym: RA4/T0CKI - desc: "Bi-directional I/O port" - - num: 4 - sym: "~MCLR" - desc: "Master Clear (Reset) input/programming voltage -input. This pin is an active low RESET to the device." - - num: 5 - sym: GND - desc: "Ground reference for logic and I/O pins." - - num: 6 - sym: RB0/INT - desc: "External interrupt" - - num: 7 - sym: RB1 - desc: "Bi-directional I/O port" - - num: 8 - sym: RB2 - desc: "Bi-directional I/O port" - - num: 9 - sym: RB3 - desc: "Bi-directional I/O port" - - num: 10 - sym: RB4 - desc: Interrupt-on-change pin. - - num: 11 - sym: RB5 - desc: Interrupt-on-change pin. - - num: 12 - sym: RB6 - desc: Interrupt-on-change pin, Serial programming clock - - num: 13 - sym: RB7 - desc: Interrupt-on-change pin, Serial programming data. - - num: 14 - sym: Vcc - desc: "Positive supply for logic and I/O pins." - - num: 15 - sym: OSC2/CLKIN - desc: "Oscillator crystal output. Connects to crystal or -resonator in Crystal Oscillator mode. In RC mode, -OSC2 pin outputs CLKOUT, which has 1/4 the -frequency of OSC1 and denotes the instruction -cycle rate." - - num: 16 - sym: OSC1/CLKOUT - desc: Oscillator crystal input/external clock source input - - num: 17 - sym: RA0 - desc: "Bi-directional I/O port" - - num: 18 - sym: RA1 - desc: "Bi-directional I/O port" + RA2: + desc: 'Bi-directional I/O port' + RA3: + desc: 'Bi-directional I/O port' + RA4/T0CKI: + desc: 'Bi-directional I/O port' + '~MCLR': + desc: 'Master Clear (Reset) input/programming voltage input. This pin is an active low RESET to the device.' + GND: + desc: 'Ground reference for logic and I/O pins.' + RB0/INT: + desc: 'External interrupt' + RB1: + desc: 'Bi-directional I/O port' + RB2: + desc: 'Bi-directional I/O port' + RB3: + desc: 'Bi-directional I/O port' + RB4: + desc: 'Interrupt-on-change pin.' + RB5: + desc: 'Interrupt-on-change pin.' + RB6: + desc: 'Interrupt-on-change pin, Serial programming clock' + RB7: + desc: 'Interrupt-on-change pin, Serial programming data.' + Vcc: + desc: 'Positive supply for logic and I/O pins.' + OSC2/CLKIN: + desc: 'Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator mode. In RC mode, OSC2 pin outputs CLKOUT, which has 1/4 the frequency of OSC1 and denotes the instruction cycle rate.' + OSC1/CLKOUT: + desc: 'Oscillator crystal input/external clock source input' + RA0: + desc: 'Bi-directional I/O port' + RA1: + desc: 'Bi-directional I/O port' specs: - - param: "Max pin sink" - val: 25 - unit: mA - - param: "Max pin source" - val: 25 - unit: mA - - param: "Operating speed" - val: 20 - unit: MHz + - + param: 'Max pin sink' + val: '25' + unit: mA + - + param: 'Max pin source' + val: '25' + unit: mA + - + param: 'Operating speed' + val: '20' + unit: MHz notes: - - 18-pin Flash/EEPROM 8-bit Microcontroller -... - + - '18-pin Flash/EEPROM 8-bit Microcontroller' +packages: + DIP: + - RA2 + - RA3 + - RA4/T0CKI + - '~MCLR' + - GND + - RB0/INT + - RB1 + - RB2 + - RB3 + - RB4 + - RB5 + - RB6 + - RB7 + - Vcc + - OSC2/CLKIN + - OSC1/CLKOUT + - RA0 + - RA1 diff --git a/PIC18F13K50.yaml b/PIC18F13K50.yaml index 6d9dc25..7c96fd3 100644 --- a/PIC18F13K50.yaml +++ b/PIC18F13K50.yaml @@ -1,86 +1,87 @@ ---- -description: "20-Pin USB Flash Microcontrollers with nanoWatt XLP™ Technology" -aliases: [PIC18F14K50] -package: DIP -pincount: 20 -family: "Microchip 18F" -datasheet: "http://ww1.microchip.com/downloads/en/DeviceDoc/41350C.pdf" +description: '20-Pin USB Flash Microcontrollers with nanoWatt XLP™ Technology' +aliases: + - PIC18F14K50 +family: 'Microchip 18F' +datasheet: 'http://ww1.microchip.com/downloads/en/DeviceDoc/41350C.pdf' pins: - - num: 1 - sym: VCC - desc: Positive supply for logic and I/O pins - - num: 2 - sym: RA5/OSC1/CLKIN - desc: Digital I/O, Oscillator crystal input or external clock input, External clock source input. - - num: 3 - sym: RA4/AN3/OSC2/CLKOUT - desc: Digital I/O, ADC channel 3, Oscillator crystal output., In RC mode, OSC2 pin outputs CLKOUT - - num: 4 - sym: RA3/~MCLR~/VPP - desc: Digital input, Active-low Master Clear with internal pull-up, High voltage programming input - - num: 5 - sym: RC5/CCP1/P1A/T0CKI - desc: Digital I/O, Capture 1 input/Compare 1 output/PWM 1 output, Enhanced CCP1 PWM output, Timer0 external clock input - - num: 6 - sym: RC4/P1B/C12OUT/SRQ - desc: Digital I/O, Enhanced CCP1 PWM output, Comparator C1 and C2 output, SR Latch output - - num: 7 - sym: RC3/AN7/P1C/C12IN3-/PGM - desc: Digital I/O, ADC channel 7, Enhanced CCP1 PWM output, Comparator C1 and C2 inverting input, Low-Voltage ICSP Programming enable pin - - num: 8 - sym: RC6/AN8/~SS~/T13CKI/T1OSCI - desc: Digital I/O, ADC channel 8, SPI slave select input, Timer0 and Timer3 external clock input, Timer1 oscillator input - - num: 9 - sym: RC7/AN9/SDO/T1OSCO - desc: Digital I/O, ADC channel 9, SPI data out, Timer1 oscillator output - - num: 10 - sym: RB7/TX/CK - desc: Digital I/O, EUSART asynchronous transmit, EUSART synchronous clock (see related RX/DT) - - num: 11 - sym: RB6/SCK/SCI - desc: Digital I/O, Synchronous serial clock input/output for SPI mode, Synchronous serial clock input/output for I2C mode - - num: 12 - sym: RB5/AN11/RX/DT - desc: Digital I/O, ADC channel 11, EUSART asynchronous receive, EUSART synchronous data (see related RX/TX) - - num: 13 - sym: RB4/AN10/SDI/SDA - desc: Digital I/O, ADC channel 10, SPI data in, I2C data I/O - - num: 14 - sym: RC2/AN6/P1D/C12IN2-/CVREF/INT2 - desc: Digital I/O, ADC channel 6, Enhanced CCP1 PWM output, Comparator C1 and C2 inverting input, Comparator reference voltage output, External, interrupt 0 - - num: 15 - sym: RC1/AN5/C12IN-/INT1/VREF- - desc: Digital I/O, ADC channel 5, Comparator C1 and C2 non-inverting input, External interrupt 0, Comparator reference voltage (low) input - - num: 16 - sym: RC0/AN4/C12IN+/INT0/VREF+ - desc: Digital I/O, ADC channel 4, Comparator C1 and C2 non-inverting input, External interrupt 0, Comparator reference voltage (high) input - - num: 17 - sym: VUSB - desc: Positive supply for USB transceiver - - num: 18 - sym: RA1/D-/PGC - desc: Digital input, USB differential minus line (input/output), ICSP programming clock pin - - num: 19 - sym: RA0/D+/PGD - desc: Digital input, USB differential plus line (input/output), ICSP programming data pin - - num: 20 - sym: GND - desc: Ground reference for logic and I/O pins + VCC: + desc: 'Positive supply for logic and I/O pins' + RA5/OSC1/CLKIN: + desc: 'Digital I/O, Oscillator crystal input or external clock input, External clock source input.' + RA4/AN3/OSC2/CLKOUT: + desc: 'Digital I/O, ADC channel 3, Oscillator crystal output., In RC mode, OSC2 pin outputs CLKOUT' + 'RA3/~MCLR~/VPP': + desc: 'Digital input, Active-low Master Clear with internal pull-up, High voltage programming input' + RC5/CCP1/P1A/T0CKI: + desc: 'Digital I/O, Capture 1 input/Compare 1 output/PWM 1 output, Enhanced CCP1 PWM output, Timer0 external clock input' + RC4/P1B/C12OUT/SRQ: + desc: 'Digital I/O, Enhanced CCP1 PWM output, Comparator C1 and C2 output, SR Latch output' + RC3/AN7/P1C/C12IN3-/PGM: + desc: 'Digital I/O, ADC channel 7, Enhanced CCP1 PWM output, Comparator C1 and C2 inverting input, Low-Voltage ICSP Programming enable pin' + 'RC6/AN8/~SS~/T13CKI/T1OSCI': + desc: 'Digital I/O, ADC channel 8, SPI slave select input, Timer0 and Timer3 external clock input, Timer1 oscillator input' + RC7/AN9/SDO/T1OSCO: + desc: 'Digital I/O, ADC channel 9, SPI data out, Timer1 oscillator output' + RB7/TX/CK: + desc: 'Digital I/O, EUSART asynchronous transmit, EUSART synchronous clock (see related RX/DT)' + RB6/SCK/SCI: + desc: 'Digital I/O, Synchronous serial clock input/output for SPI mode, Synchronous serial clock input/output for I2C mode' + RB5/AN11/RX/DT: + desc: 'Digital I/O, ADC channel 11, EUSART asynchronous receive, EUSART synchronous data (see related RX/TX)' + RB4/AN10/SDI/SDA: + desc: 'Digital I/O, ADC channel 10, SPI data in, I2C data I/O' + RC2/AN6/P1D/C12IN2-/CVREF/INT2: + desc: 'Digital I/O, ADC channel 6, Enhanced CCP1 PWM output, Comparator C1 and C2 inverting input, Comparator reference voltage output, External, interrupt 0' + RC1/AN5/C12IN-/INT1/VREF-: + desc: 'Digital I/O, ADC channel 5, Comparator C1 and C2 non-inverting input, External interrupt 0, Comparator reference voltage (low) input' + RC0/AN4/C12IN+/INT0/VREF+: + desc: 'Digital I/O, ADC channel 4, Comparator C1 and C2 non-inverting input, External interrupt 0, Comparator reference voltage (high) input' + VUSB: + desc: 'Positive supply for USB transceiver' + RA1/D-/PGC: + desc: 'Digital input, USB differential minus line (input/output), ICSP programming clock pin' + RA0/D+/PGD: + desc: 'Digital input, USB differential plus line (input/output), ICSP programming data pin' + GND: + desc: 'Ground reference for logic and I/O pins' specs: - - param: "Program Memory" - val: 8 - unit: KB - - param: "CPU Speed" - val: 12 - unit: MIPS - - param: "RAM" - val: 512 - unit: Bytes - - param: "Data EEPROM" - val: 256 - unit: Bytes + - + param: 'Program Memory' + val: '8' + unit: KB + - + param: 'CPU Speed' + val: '12' + unit: MIPS + - + param: RAM + val: '512' + unit: Bytes + - + param: 'Data EEPROM' + val: '256' + unit: Bytes notes: - - High Performance PIC18 Core, USB v2.0 compliant interface -... - - + - 'High Performance PIC18 Core, USB v2.0 compliant interface' +packages: + DIP: + - VCC + - RA5/OSC1/CLKIN + - RA4/AN3/OSC2/CLKOUT + - 'RA3/~MCLR~/VPP' + - RC5/CCP1/P1A/T0CKI + - RC4/P1B/C12OUT/SRQ + - RC3/AN7/P1C/C12IN3-/PGM + - 'RC6/AN8/~SS~/T13CKI/T1OSCI' + - RC7/AN9/SDO/T1OSCO + - RB7/TX/CK + - RB6/SCK/SCI + - RB5/AN11/RX/DT + - RB4/AN10/SDI/SDA + - RC2/AN6/P1D/C12IN2-/CVREF/INT2 + - RC1/AN5/C12IN-/INT1/VREF- + - RC0/AN4/C12IN+/INT0/VREF+ + - VUSB + - RA1/D-/PGC + - RA0/D+/PGD + - GND diff --git a/PIC18F4550.yaml b/PIC18F4550.yaml index e4f49e8..c6cadfe 100644 --- a/PIC18F4550.yaml +++ b/PIC18F4550.yaml @@ -1,134 +1,128 @@ ---- -description: "PIC18F4550" -aliases: [] -package: DIP -pincount: 40 -family: "Microchip" -datasheet: "http://ww1.microchip.com/downloads/en/DeviceDoc/39632e.pdf" +description: PIC18F4550 +aliases: { } +family: Microchip +datasheet: 'http://ww1.microchip.com/downloads/en/DeviceDoc/39632e.pdf' pins: - - num: 1 - sym: ~MCLR~/V__PP/RE3 + '~MCLR~/V__PP/RE3': desc: . - - num: 2 - sym: RA0/AN0 + RA0/AN0: desc: . - - num: 3 - sym: RA1/AN1 + RA1/AN1: desc: . - - num: 4 - sym: RA2/AN2/V__REF-/CV__REF + 'RA2/AN2/V__REF-/CV__REF': desc: . - - num: 5 - sym: RA3/AN3/V__REF+ + 'RA3/AN3/V__REF+': desc: . - - num: 6 - sym: RA4/T0CKI/C1OUT/RCV + RA4/T0CKI/C1OUT/RCV: desc: . - - num: 7 - sym: RA5/AN4/~SS~/HLVDIN/C2OUT + 'RA5/AN4/~SS~/HLVDIN/C2OUT': desc: . - - num: 8 - sym: RE0/AN5/CK1SPP + RE0/AN5/CK1SPP: desc: . - - num: 9 - sym: RE1/AN6/CK2SPP + RE1/AN6/CK2SPP: desc: . - - num: 10 - sym: RE2/AN7/OESPP + RE2/AN7/OESPP: desc: . - - num: 11 - sym: V__DD - desc: Positive supply for logic and I/O pins. - - num: 12 - sym: V__SS - desc: Ground reference for logic and I/O pins. - - num: 13 - sym: OSC1/CLKI + 'V__DD': + desc: 'Positive supply for logic and I/O pins.' + 'V__SS': + desc: 'Ground reference for logic and I/O pins.' + OSC1/CLKI: desc: . - - num: 14 - sym: OSC2/CLKO/RA6 + OSC2/CLKO/RA6: desc: . - - num: 15 - sym: RC0/T1OSO/T13CKI + RC0/T1OSO/T13CKI: desc: . - - num: 16 - sym: RC1/T1OSI/CPP2/~UOE~ + 'RC1/T1OSI/CPP2/~UOE~': desc: . - - num: 17 - sym: RC2/CCP1/P1A + RC2/CCP1/P1A: desc: . - - num: 18 - sym: V__USB - desc: Internal USB 3.3V voltage regulator. - - num: 19 - sym: RD0/SPP0 + 'V__USB': + desc: 'Internal USB 3.3V voltage regulator.' + RD0/SPP0: desc: . - - num: 20 - sym: RD1/SPP1 + RD1/SPP1: desc: . - - num: 21 - sym: RD2/SPP2 + RD2/SPP2: desc: . - - num: 22 - sym: RD3/SPP3 + RD3/SPP3: desc: . - - num: 23 - sym: RC4/D__-/VM + 'RC4/D__-/VM': desc: . - - num: 24 - sym: RC5/D__+/VP + 'RC5/D__+/VP': desc: . - - num: 25 - sym: RC6/TX/CK + RC6/TX/CK: desc: . - - num: 26 - sym: RC7/RX/DT/SDO + RC7/RX/DT/SDO: desc: . - - num: 27 - sym: RD4/SPP4 + RD4/SPP4: desc: . - - num: 28 - sym: RD5/SPP5/P1B + RD5/SPP5/P1B: desc: . - - num: 29 - sym: RD6/SPP6/P1C + RD6/SPP6/P1C: desc: . - - num: 30 - sym: RD7/SPP7/P1D + RD7/SPP7/P1D: desc: . - - num: 31 - sym: V__SS - desc: Ground reference for logic and I/O pins. - - num: 32 - sym: V__DD - desc: Positive supply for logic and I/O pins. - - num: 33 - sym: RB0/AN12/INT0/FLT0/SDI/SDA + RB0/AN12/INT0/FLT0/SDI/SDA: desc: . - - num: 34 - sym: RB1/AN10/INT1/SCK/SCL + RB1/AN10/INT1/SCK/SCL: desc: . - - num: 35 - sym: RB2/AN8/INT2/VMO + RB2/AN8/INT2/VMO: desc: . - - num: 36 - sym: RB3/AN9/CCP2/VPO + RB3/AN9/CCP2/VPO: desc: . - - num: 37 - sym: RB4/AN11/KBI0/CSSPP + RB4/AN11/KBI0/CSSPP: desc: . - - num: 38 - sym: RB5/KBI1/PGM + RB5/KBI1/PGM: desc: . - - num: 39 - sym: RB6/KBI2/PGC + RB6/KBI2/PGC: desc: . - - num: 40 - sym: RB6/KBI3/PGD + RB6/KBI3/PGD: desc: . specs: - - param: "(optional) parameter name" - val: 123 - unit: ns -... - + - + param: '(optional) parameter name' + val: '123' + unit: ns +packages: + DIP: + - '~MCLR~/V__PP/RE3' + - RA0/AN0 + - RA1/AN1 + - 'RA2/AN2/V__REF-/CV__REF' + - 'RA3/AN3/V__REF+' + - RA4/T0CKI/C1OUT/RCV + - 'RA5/AN4/~SS~/HLVDIN/C2OUT' + - RE0/AN5/CK1SPP + - RE1/AN6/CK2SPP + - RE2/AN7/OESPP + - 'V__DD' + - 'V__SS' + - OSC1/CLKI + - OSC2/CLKO/RA6 + - RC0/T1OSO/T13CKI + - 'RC1/T1OSI/CPP2/~UOE~' + - RC2/CCP1/P1A + - 'V__USB' + - RD0/SPP0 + - RD1/SPP1 + - RD2/SPP2 + - RD3/SPP3 + - 'RC4/D__-/VM' + - 'RC5/D__+/VP' + - RC6/TX/CK + - RC7/RX/DT/SDO + - RD4/SPP4 + - RD5/SPP5/P1B + - RD6/SPP6/P1C + - RD7/SPP7/P1D + - 'V__SS' + - 'V__DD' + - RB0/AN12/INT0/FLT0/SDI/SDA + - RB1/AN10/INT1/SCK/SCL + - RB2/AN8/INT2/VMO + - RB3/AN9/CCP2/VPO + - RB4/AN11/KBI0/CSSPP + - RB5/KBI1/PGM + - RB6/KBI2/PGC + - RB6/KBI3/PGD diff --git a/PS2501.yaml b/PS2501.yaml index 7bd9e5a..c906fbb 100644 --- a/PS2501.yaml +++ b/PS2501.yaml @@ -1,67 +1,69 @@ ---- -description: "4-channel optoisolator" -package: DIP -pincount: 16 -family: CEL -datasheet: "http://www.cel.com/pdf/datasheets/ps2501.pdf" +description: '4-channel optoisolator' +family: CEL +datasheet: 'http://www.cel.com/pdf/datasheets/ps2501.pdf' pins: - - num: 1 - sym: "+1" - desc: anode 1 - - num: 2 - sym: "-1" - desc: cathode 1 - - num: 3 - sym: "+2" - desc: anode 2 - - num: 4 - sym: "-2" - desc: cathode 2 - - num: 5 - sym: "+3" - desc: anode 3 - - num: 6 - sym: "-3" - desc: cathode 3 - - num: 7 - sym: "+4" - desc: anode 4 - - num: 8 - sym: "-4" - desc: cathode 4 - - num: 9 - sym: E4 - desc: emitter 4 - - num: 10 - sym: C4 - desc: collector 4 - - num: 11 - sym: E3 - desc: emitter 3 - - num: 12 - sym: C3 - desc: collector 3 - - num: 13 - sym: E2 - desc: emitter 2 - - num: 14 - sym: C2 - desc: collector 2 - - num: 15 - sym: E1 - desc: emitter 1 - - num: 16 - sym: C1 - desc: collector 1 + '+1': + desc: 'anode 1' + -1: + desc: 'cathode 1' + '+2': + desc: 'anode 2' + -2: + desc: 'cathode 2' + '+3': + desc: 'anode 3' + -3: + desc: 'cathode 3' + '+4': + desc: 'anode 4' + -4: + desc: 'cathode 4' + E4: + desc: 'emitter 4' + C4: + desc: 'collector 4' + E3: + desc: 'emitter 3' + C3: + desc: 'collector 3' + E2: + desc: 'emitter 2' + C2: + desc: 'collector 2' + E1: + desc: 'emitter 1' + C1: + desc: 'collector 1' specs: - - param: Isolation voltage - val: 5000 - unit: Vrms - - param: Maximum collector-emitter voltage - val: 80 - unit: V - - param: Switching time - val: [3 (rising), 5 (falling)] - unit: "µs" -... - + - + param: 'Isolation voltage' + val: '5000' + unit: Vrms + - + param: 'Maximum collector-emitter voltage' + val: '80' + unit: V + - + param: 'Switching time' + val: + - '3 (rising)' + - '5 (falling)' + unit: 'µs' +packages: + DIP: + - '+1' + - '-1' + - '+2' + - '-2' + - '+3' + - '-3' + - '+4' + - '-4' + - E4 + - C4 + - E3 + - C3 + - E2 + - C2 + - E1 + - C1 diff --git a/SN754410.yaml b/SN754410.yaml index 04d08b4..febdabd 100644 --- a/SN754410.yaml +++ b/SN754410.yaml @@ -1,66 +1,61 @@ ---- -description: "Quadruple half-H driver" -package: DIP -pincount: 16 -family: TI -datasheet: "http://focus.ti.com/lit/ds/symlink/sn754410.pdf" +description: 'Quadruple half-H driver' +family: TI +datasheet: 'http://focus.ti.com/lit/ds/symlink/sn754410.pdf' pins: - - num: 1 - sym: 1,2EN - desc: enable (drivers 1 and 2) - - num: 2 - sym: 1A - desc: input 1 - - num: 3 - sym: 1Y - desc: driver 1 output - - num: 4 - sym: GND - desc: ground (heat sink) - - num: 5 - sym: GND - desc: ground (heat sink) - - num: 6 - sym: 2Y - desc: driver 2 output - - num: 7 - sym: 2A - desc: input 2 - - num: 8 - sym: V__CC2 - desc: output supply voltage - - num: 9 - sym: 3,4EN - desc: enable (drivers 3 and 4) - - num: 10 - sym: 3A - desc: input 3 - - num: 11 - sym: 3Y - desc: driver 3 output - - num: 12 - sym: GND - desc: ground (heat sink) - - num: 13 - sym: GND - desc: ground (heat sink) - - num: 14 - sym: 4Y - desc: driver 4 output - - num: 15 - sym: 4A - desc: input 4 - - num: 16 - sym: V__CC1 - desc: logic supply voltage + '1,2EN': + desc: 'enable (drivers 1 and 2)' + 1A: + desc: 'input 1' + 1Y: + desc: 'driver 1 output' + GND: + desc: 'ground (heat sink)' + 2Y: + desc: 'driver 2 output' + 2A: + desc: 'input 2' + 'V__CC2': + desc: 'output supply voltage' + '3,4EN': + desc: 'enable (drivers 3 and 4)' + 3A: + desc: 'input 3' + 3Y: + desc: 'driver 3 output' + 4Y: + desc: 'driver 4 output' + 4A: + desc: 'input 4' + 'V__CC1': + desc: 'logic supply voltage' specs: - - param: Supply voltage - val: [4.5 (min), 36 (max)] - unit: V - - param: Maximum output current per driver - val: 1 - unit: A + - + param: 'Supply voltage' + val: + - '4.5 (min)' + - '36 (max)' + unit: V + - + param: 'Maximum output current per driver' + val: '1' + unit: A notes: - - When an EN line is low, the corresponding outputs assume a high-impedance off state. -... - + - 'When an EN line is low, the corresponding outputs assume a high-impedance off state.' +packages: + DIP: + - '1,2EN' + - 1A + - 1Y + - GND + - GND + - 2Y + - 2A + - 'V__CC2' + - '3,4EN' + - 3A + - 3Y + - GND + - GND + - 4Y + - 4A + - 'V__CC1' diff --git a/SN75468.yaml b/SN75468.yaml index 4a3b2ae..a146382 100644 --- a/SN75468.yaml +++ b/SN75468.yaml @@ -1,75 +1,78 @@ ---- -description: Seven darlington array -aliases: [SN75469] -package: DIP -pincount: 16 -family: "TI" -datasheet: "http://focus.ti.com/lit/ds/symlink/sn75468.pdf" +description: 'Seven darlington array' +aliases: + - SN75469 +family: TI +datasheet: 'http://focus.ti.com/lit/ds/symlink/sn75468.pdf' pins: - - num: 1 - sym: 1B - desc: base 1 - - num: 2 - sym: 2B - desc: base 2 - - num: 3 - sym: 3B - desc: base 3 - - num: 4 - sym: 4B - desc: base 4 - - num: 5 - sym: 5B - desc: base 5 - - num: 6 - sym: 6B - desc: base 6 - - num: 7 - sym: 7B - desc: base 7 - - num: 8 - sym: E - desc: common emitter (ground) - - num: 9 - sym: COM + 1B: + desc: 'base 1' + 2B: + desc: 'base 2' + 3B: + desc: 'base 3' + 4B: + desc: 'base 4' + 5B: + desc: 'base 5' + 6B: + desc: 'base 6' + 7B: + desc: 'base 7' + E: + desc: 'common emitter (ground)' + COM: desc: common - - num: 10 - sym: 7C - desc: collector 7 - - num: 11 - sym: 6C - desc: collector 6 - - num: 12 - sym: 5C - desc: collector 5 - - num: 13 - sym: 4C - desc: collector 4 - - num: 14 - sym: 3C - desc: collector 3 - - num: 15 - sym: 2C - desc: collector 2 - - num: 16 - sym: 1C - desc: collector 1 + 7C: + desc: 'collector 7' + 6C: + desc: 'collector 6' + 5C: + desc: 'collector 5' + 4C: + desc: 'collector 4' + 3C: + desc: 'collector 3' + 2C: + desc: 'collector 2' + 1C: + desc: 'collector 1' specs: - - param: Series resistance at bases - val: [2.7 (SN75468), 10.5 (SN75469)] - unit: "kΩ" - - param: Maximum collector-emitter voltage - val: 100 - unit: V - - param: Maximum input voltage - val: 30 - unit: V - - param: Maximum peak collector current - val: 500 - unit: mA + - + param: 'Series resistance at bases' + val: + - '2.7 (SN75468)' + - '10.5 (SN75469)' + unit: 'kΩ' + - + param: 'Maximum collector-emitter voltage' + val: '100' + unit: V + - + param: 'Maximum input voltage' + val: '30' + unit: V + - + param: 'Maximum peak collector current' + val: '500' + unit: mA notes: - - SN75468 is designed for use with 5V TTL/CMOS devices. - - SN75469 is designed for use with 6V-15V CMOS/PMOS devices. -... - - + - 'SN75468 is designed for use with 5V TTL/CMOS devices.' + - 'SN75469 is designed for use with 6V-15V CMOS/PMOS devices.' +packages: + DIP: + - 1B + - 2B + - 3B + - 4B + - 5B + - 6B + - 7B + - E + - COM + - 7C + - 6C + - 5C + - 4C + - 3C + - 2C + - 1C diff --git a/TC649.yaml b/TC649.yaml index 08ae6d6..e660909 100644 --- a/TC649.yaml +++ b/TC649.yaml @@ -1,37 +1,36 @@ ---- -description: "PWM fan speed controller" -aliases: [] -package: DIP -pincount: 8 -family: "Microchip" -datasheet: "http://ww1.microchip.com/downloads/en/DeviceDoc/21449c.pdf" +description: 'PWM fan speed controller' +aliases: { } +family: Microchip +datasheet: 'http://ww1.microchip.com/downloads/en/DeviceDoc/21449c.pdf' pins: - - num: 1 - sym: V__IN - desc: temperature sensor; voltage range of 1.25V to 2.65V (typical) - - num: 2 - sym: C__F - desc: positive terminal for PWM ramp generator timing capacitor; 1 µF for 30 Hz PWM - - num: 3 - sym: V__AS - desc: auto-shutdown voltage; auto-shutdown occurs when V__IN <= V__AS - - num: 4 - sym: GND + 'V__IN': + desc: 'temperature sensor; voltage range of 1.25V to 2.65V (typical)' + 'C__F': + desc: 'positive terminal for PWM ramp generator timing capacitor; 1 µF for 30 Hz PWM' + 'V__AS': + desc: 'auto-shutdown voltage; auto-shutdown occurs when V__IN <= V__AS' + GND: desc: ground - - num: 5 - sym: SENSE - desc: fan rotation pulses; absense of pulses indicates a fault - - num: 6 - sym: ~FAULT~ - desc: goes low to indicate a fault condition - - num: 7 - sym: V__OUT - desc: active high complimentary output that drives the fan motor through an NPN transistor or N-channel MOSFET - - num: 8 - sym: V__DD - desc: power supply + SENSE: + desc: 'fan rotation pulses; absense of pulses indicates a fault' + '~FAULT~': + desc: 'goes low to indicate a fault condition' + 'V__OUT': + desc: 'active high complimentary output that drives the fan motor through an NPN transistor or N-channel MOSFET' + 'V__DD': + desc: 'power supply' specs: - - param: "supply voltage" - val: 6 - unit: V - + - + param: 'supply voltage' + val: '6' + unit: V +packages: + DIP: + - 'V__IN' + - 'C__F' + - 'V__AS' + - GND + - SENSE + - '~FAULT~' + - 'V__OUT' + - 'V__DD' diff --git a/TIL311.yaml b/TIL311.yaml index 2a7f85d..8315c00 100644 --- a/TIL311.yaml +++ b/TIL311.yaml @@ -1,53 +1,44 @@ ---- -description: Hexadecimal display with logic -package: DIP -pincount: 14 -family: "LED" -datasheet: "http://focus.ti.com/lit/ds/symlink/til311.pdf" +description: 'Hexadecimal display with logic' +family: LED +datasheet: 'http://focus.ti.com/lit/ds/symlink/til311.pdf' pins: - - num: 1 - sym: V__LED - desc: LED supply voltage - - num: 2 - sym: B - desc: Latch data input B - - num: 3 - sym: A - desc: Latch data input A - - num: 4 - sym: DP__L - desc: Left decimal point cathode - - num: 5 - sym: ~STROBE - desc: Latch strobe input (active low) - - num: 6 - sym: "" - desc: no pin - - num: 7 - sym: GND + 'V__LED': + desc: 'LED supply voltage' + B: + desc: 'Latch data input B' + A: + desc: 'Latch data input A' + 'DP__L': + desc: 'Left decimal point cathode' + '~STROBE': + desc: 'Latch strobe input (active low)' + GND: desc: ground - - num: 8 - sym: BLANK - desc: Display blanking input (active high) - - num: 9 - sym: "" - desc: no pin - - num: 10 - sym: DP__R - desc: Right decimal point cathode - - num: 11 - sym: "" - desc: no pin - - num: 12 - sym: D - desc: Latch data input D - - num: 13 - sym: C - desc: Latch data input C - - num: 14 - sym: Vcc - desc: Logic supply voltage + BLANK: + desc: 'Display blanking input (active high)' + 'DP__R': + desc: 'Right decimal point cathode' + D: + desc: 'Latch data input D' + C: + desc: 'Latch data input C' + Vcc: + desc: 'Logic supply voltage' notes: - - "Decimal points are driven independently and current-limiting resistors (typically 1kΩ) are required." -... - + - 'Decimal points are driven independently and current-limiting resistors (typically 1kΩ) are required.' +packages: + DIP: + - 'V__LED' + - B + - A + - 'DP__L' + - '~STROBE' + - 'NOT_PRESENT' + - GND + - BLANK + - 'NOT_PRESENT' + - 'DP__R' + - 'NOT_PRESENT' + - D + - C + - Vcc diff --git a/TL081.yaml b/TL081.yaml index 2ff335a..2d5b009 100644 --- a/TL081.yaml +++ b/TL081.yaml @@ -1,62 +1,79 @@ ---- -description: "JFET-input operational amplifier" -aliases: [TL061, TL071] -package: DIP -pincount: 8 -family: linear -datasheet: "http://focus.ti.com/lit/ds/symlink/tl08a.pdf" +description: 'JFET-input operational amplifier' +aliases: + - TL061 + - TL071 +family: linear +datasheet: 'http://focus.ti.com/lit/ds/symlink/tl08a.pdf' pins: - - num: 1 - sym: OFFSET N1 + 'OFFSET N1': desc: offset - - num: 2 - sym: IN- - desc: inverting input - - num: 3 - sym: IN+ - desc: non-inverting input - - num: 4 - sym: V__CC- - desc: negative supply voltage - - num: 5 - sym: OFFSET N2 - desc: offset - - num: 6 - sym: OUT + IN-: + desc: 'inverting input' + IN+: + desc: 'non-inverting input' + 'V__CC-': + desc: 'negative supply voltage' + 'OFFSET N2': + desc: offset + OUT: desc: output - - num: 7 - sym: V__CC+ - desc: positive supply voltage - - num: 8 - sym: NC - desc: no connection + 'V__CC+': + desc: 'positive supply voltage' specs: - - param: Maximum supply voltage - val: "±18" - unit: V - - param: Offset voltage - val: 3 - unit: mV - - param: Unity-gain bandwidth - val: 3 - unit: MHz - - param: Slew rate at unity gain - val: 13 - unit: "V/µs" - - param: Rise time - val: [0.2 (TL06x), 0.1 (TL07x), 0.05 (TL08x)] - unit: "µs" - - param: Overshoot factor - val: [10 (TL061x, 20 (TL07x), 20 (TL08x)] - unit: "%" - - param: "Equivalent input noise voltage at f = 1 kHz" - val: [42 (TL06x), 18 (TL07x), 18 (TL08x)] - unit: "nV/√~Hz~" - - param: "Supply current (each amplifier)" - val: [0.2 (TL06x), 1.4 (TL07x), 1.4 (TL08x)] + - + param: 'Maximum supply voltage' + val: '±18' + unit: V + - + param: 'Offset voltage' + val: '3' + unit: mV + - + param: 'Unity-gain bandwidth' + val: '3' + unit: MHz + - + param: 'Slew rate at unity gain' + val: '13' + unit: 'V/µs' + - + param: 'Rise time' + val: + - '0.2 (TL06x)' + - '0.1 (TL07x)' + - '0.05 (TL08x)' + unit: 'µs' + - + param: 'Overshoot factor' + val: + - '10 (TL061x' + - '20 (TL07x)' + - '20 (TL08x)' + unit: '%' + - + param: 'Equivalent input noise voltage at f = 1 kHz' + val: + - '42 (TL06x)' + - '18 (TL07x)' + - '18 (TL08x)' + unit: 'nV/√~Hz~' + - + param: 'Supply current (each amplifier)' + val: + - '0.2 (TL06x)' + - '1.4 (TL07x)' + - '1.4 (TL08x)' unit: mA notes: - - The TL06x series are low-power versions of the TL08x series. - - The TL07x series are low-noise versions of the TL08x series. -... - + - 'The TL06x series are low-power versions of the TL08x series.' + - 'The TL07x series are low-noise versions of the TL08x series.' +packages: + DIP: + - 'OFFSET N1' + - IN- + - IN+ + - 'V__CC-' + - 'OFFSET N2' + - OUT + - 'V__CC+' + - NC diff --git a/TL082.yaml b/TL082.yaml index 59c109c..3951434 100644 --- a/TL082.yaml +++ b/TL082.yaml @@ -1,64 +1,81 @@ ---- -description: "Dual JFET-input operational amplifier" -aliases: [TL062, TL072] -package: DIP -pincount: 8 -family: linear -datasheet: "http://focus.ti.com/lit/ds/symlink/tl081a.pdf" +description: 'Dual JFET-input operational amplifier' +aliases: + - TL062 + - TL072 +family: linear +datasheet: 'http://focus.ti.com/lit/ds/symlink/tl081a.pdf' pins: - - num: 1 - sym: 1OUT - desc: output 1 - - num: 2 - sym: 1IN- - desc: inverting input 1 - - num: 3 - sym: 1IN+ - desc: non-inverting input 1 - - num: 4 - sym: V__CC- - desc: negative supply voltage - - num: 5 - sym: 2IN+ - desc: non-inverting input 2 - - num: 6 - sym: 2IN- - desc: inverting input 2 - - num: 7 - sym: 2OUT - desc: output 2 - - num: 8 - sym: V__CC+ - desc: positive supply voltage + 1OUT: + desc: 'output 1' + 1IN-: + desc: 'inverting input 1' + 1IN+: + desc: 'non-inverting input 1' + 'V__CC-': + desc: 'negative supply voltage' + 2IN+: + desc: 'non-inverting input 2' + 2IN-: + desc: 'inverting input 2' + 2OUT: + desc: 'output 2' + 'V__CC+': + desc: 'positive supply voltage' specs: - - param: Maximum supply voltage - val: "±18" - unit: V - - param: Offset voltage - val: 3 - unit: mV - - param: Unity-gain bandwidth - val: 3 - unit: MHz - - param: Slew rate at unity gain - val: 13 - unit: "V/µs" - - param: Rise time - val: [0.2 (TL06x), 0.1 (TL07x), 0.05 (TL08x)] - unit: "µs" - - param: Overshoot factor - val: [10 (TL061x), 20 (TL07x), 20 (TL08x)] - unit: "%" - - param: "Equivalent input noise voltage at f = 1 kHz" - val: [42 (TL06x), 18 (TL07x), 18 (TL08x)] - unit: "nV/√Hz" - - param: "Supply current (each amplifier)" - val: [0.2 (TL06x), 1.4 (TL07x), 1.4 (TL08x)] - unit: mA + - + param: 'Maximum supply voltage' + val: '±18' + unit: V + - + param: 'Offset voltage' + val: '3' + unit: mV + - + param: 'Unity-gain bandwidth' + val: '3' + unit: MHz + - + param: 'Slew rate at unity gain' + val: '13' + unit: 'V/µs' + - + param: 'Rise time' + val: + - '0.2 (TL06x)' + - '0.1 (TL07x)' + - '0.05 (TL08x)' + unit: 'µs' + - + param: 'Overshoot factor' + val: + - '10 (TL061x)' + - '20 (TL07x)' + - '20 (TL08x)' + unit: '%' + - + param: 'Equivalent input noise voltage at f = 1 kHz' + val: + - '42 (TL06x)' + - '18 (TL07x)' + - '18 (TL08x)' + unit: 'nV/√Hz' + - + param: 'Supply current (each amplifier)' + val: + - '0.2 (TL06x)' + - '1.4 (TL07x)' + - '1.4 (TL08x)' + unit: mA notes: - - The TL06x series are low-power versions of the TL08x series. - - The TL07x series are low-noise versions of the TL08x series. - -... - - + - 'The TL06x series are low-power versions of the TL08x series.' + - 'The TL07x series are low-noise versions of the TL08x series.' +packages: + DIP: + - 1OUT + - 1IN- + - 1IN+ + - 'V__CC-' + - 2IN+ + - 2IN- + - 2OUT + - 'V__CC+' diff --git a/TL084.yaml b/TL084.yaml index cd98e4c..fb381c4 100644 --- a/TL084.yaml +++ b/TL084.yaml @@ -1,80 +1,99 @@ ---- -description: Quad JFET-input operational amplifier -aliases: [TL064, TL074] -package: DIP -pincount: 14 -family: linear -datasheet: "http://focus.ti.com/lit/ds/symlink/tl081a.pdf" +description: 'Quad JFET-input operational amplifier' +aliases: + - TL064 + - TL074 +family: linear +datasheet: 'http://focus.ti.com/lit/ds/symlink/tl081a.pdf' pins: - - num: 1 - sym: 1OUT - desc: output 1 - - num: 2 - sym: 1IN- - desc: inverting input 1 - - num: 3 - sym: 1IN+ - desc: non-inverting input 1 - - num: 4 - sym: V__CC+ - desc: positive supply voltage - - num: 5 - sym: 2IN+ - desc: non-inverting input 2 - - num: 6 - sym: 2IN- - desc: inverting input 2 - - num: 7 - sym: 2OUT - desc: output 2 - - num: 8 - sym: 3OUT - desc: output 3 - - num: 9 - sym: 3IN- - desc: inverting input 3 - - num: 10 - sym: 3IN+ - desc: non-inverting input 3 - - num: 11 - sym: V__CC- - desc: negative supply voltage - - num: 12 - sym: 4IN+ - desc: non-inverting input 4 - - num: 13 - sym: 4IN- - desc: inverting input 4 - - num: 14 - sym: 4OUT - desc: output 4 + 1OUT: + desc: 'output 1' + 1IN-: + desc: 'inverting input 1' + 1IN+: + desc: 'non-inverting input 1' + 'V__CC+': + desc: 'positive supply voltage' + 2IN+: + desc: 'non-inverting input 2' + 2IN-: + desc: 'inverting input 2' + 2OUT: + desc: 'output 2' + 3OUT: + desc: 'output 3' + 3IN-: + desc: 'inverting input 3' + 3IN+: + desc: 'non-inverting input 3' + 'V__CC-': + desc: 'negative supply voltage' + 4IN+: + desc: 'non-inverting input 4' + 4IN-: + desc: 'inverting input 4' + 4OUT: + desc: 'output 4' specs: - - param: Maximum supply voltage - val: "±18" - unit: V - - param: Offset voltage - val: 3 - unit: mV - - param: Unity-gain bandwidth - val: 3 - unit: MHz - - param: Slew rate at unity gain - val: 13 - unit: "V/µs" - - param: Rise time - val: [0.2 (TL06x), 0.1 (TL07x), 0.05 (TL08x)] - unit: "µs" - - param: Overshoot factor - val: [10 (TL061x, 20 (TL07x), 20 (TL08x)] - unit: "%" - - param: "Equivalent input noise voltage at f = 1 kHz" - val: [42 (TL06x), 18 (TL07x), 18 (TL08x)] - unit: "nV/√Hz" - - param: "Supply current (each amplifier)" - val: [0.2 (TL06x), 1.4 (TL07x), 1.4 (TL08x)] - unit: mA + - + param: 'Maximum supply voltage' + val: '±18' + unit: V + - + param: 'Offset voltage' + val: '3' + unit: mV + - + param: 'Unity-gain bandwidth' + val: '3' + unit: MHz + - + param: 'Slew rate at unity gain' + val: '13' + unit: 'V/µs' + - + param: 'Rise time' + val: + - '0.2 (TL06x)' + - '0.1 (TL07x)' + - '0.05 (TL08x)' + unit: 'µs' + - + param: 'Overshoot factor' + val: + - '10 (TL061x' + - '20 (TL07x)' + - '20 (TL08x)' + unit: '%' + - + param: 'Equivalent input noise voltage at f = 1 kHz' + val: + - '42 (TL06x)' + - '18 (TL07x)' + - '18 (TL08x)' + unit: 'nV/√Hz' + - + param: 'Supply current (each amplifier)' + val: + - '0.2 (TL06x)' + - '1.4 (TL07x)' + - '1.4 (TL08x)' + unit: mA notes: - - The TL06x series are low-power versions of the TL08x series. - - The TL07x series are low-noise versions of the TL08x series. -... - + - 'The TL06x series are low-power versions of the TL08x series.' + - 'The TL07x series are low-noise versions of the TL08x series.' +packages: + DIP: + - 1OUT + - 1IN- + - 1IN+ + - 'V__CC+' + - 2IN+ + - 2IN- + - 2OUT + - 3OUT + - 3IN- + - 3IN+ + - 'V__CC-' + - 4IN+ + - 4IN- + - 4OUT diff --git a/TLC272.yaml b/TLC272.yaml index b29b700..66bfe3c 100644 --- a/TLC272.yaml +++ b/TLC272.yaml @@ -1,50 +1,52 @@ ---- name: TLC272 -description: "Precision JFET-input low-offset dual operation amplifier" -aliases: [] -package: DIP -pincount: 8 -family: "opamps" -datasheet: "http://www.hep.upenn.edu/SNO/daq/parts/tlc272.pdf" +description: 'Precision JFET-input low-offset dual operation amplifier' +aliases: { } +family: opamps +datasheet: 'http://www.hep.upenn.edu/SNO/daq/parts/tlc272.pdf' pins: - - num: 1 - sym: 1OUT - desc: First opamp output - - num: 2 - sym: 1IN- - desc: First opamp inverting input - - num: 3 - sym: 1IN+ - desc: First opamp non-inverting input - - num: 4 - sym: GND + 1OUT: + desc: 'First opamp output' + 1IN-: + desc: 'First opamp inverting input' + 1IN+: + desc: 'First opamp non-inverting input' + GND: desc: Ground - - num: 5 - sym: 2IN+ - desc: Second opamp non-inverting input - - num: 6 - sym: 2IN- - desc: Second opamp inverting input - - num: 7 - sym: 2OUT - desc: Second opamp output - - num: 8 - sym: V__DD - desc: Supply voltage + 2IN+: + desc: 'Second opamp non-inverting input' + 2IN-: + desc: 'Second opamp inverting input' + 2OUT: + desc: 'Second opamp output' + 'V__DD': + desc: 'Supply voltage' specs: - - param: "Maximum offset voltage (trimmed)" - val: 500 - unit: "µV" - - param: "Supply voltage (absolute maximum)" - val: 18 - unit: "V" - - param: "Slew rate at unity gain (V__DD = 5V, V__IPP = 1V)" - val: 3.6 - unit: "V/µs" - - param: "Unity-gain bandwidth" - val: 1.7 - unit: "MHz" + - + param: 'Maximum offset voltage (trimmed)' + val: '500' + unit: 'µV' + - + param: 'Supply voltage (absolute maximum)' + val: '18' + unit: V + - + param: 'Slew rate at unity gain (V__DD = 5V, V__IPP = 1V)' + val: '3.6' + unit: 'V/µs' + - + param: 'Unity-gain bandwidth' + val: '1.7' + unit: MHz notes: - - "Pinout LM358 compatible" - - "Designed for high-impedance measurement applications" - + - 'Pinout LM358 compatible' + - 'Designed for high-impedance measurement applications' +packages: + DIP: + - 1OUT + - 1IN- + - 1IN+ + - GND + - 2IN+ + - 2IN- + - 2OUT + - 'V__DD' diff --git a/TMS9918A.yaml b/TMS9918A.yaml index 39b4aa0..9b9038f 100644 --- a/TMS9918A.yaml +++ b/TMS9918A.yaml @@ -1,172 +1,160 @@ ---- -description: "Video Display Processor (composite output)" -aliases: [] -package: DIP -pincount: 40 -family: "Texas Instruments" -datasheet: "http://www.cs.columbia.edu/~sedwards/papers/TMS9918.pdf" +description: 'Video Display Processor (composite output)' +aliases: { } +family: 'Texas Instruments' +datasheet: 'http://www.cs.columbia.edu/~sedwards/papers/TMS9918.pdf' pins: - - num: 1 - sym: ~RAS - desc: VRAM row address strobe - - num: 2 - sym: ~CAS - desc: VRAM column address strobe - - num: 3 - sym: AD7 - desc: VRAM address/data bus (least significant bit) - - num: 4 - sym: AD6 - desc: VRAM address/data bus - - num: 5 - sym: AD5 - desc: VRAM address/data bus - - num: 6 - sym: AD4 - desc: VRAM address/data bus - - num: 7 - sym: AD3 - desc: VRAM address/data bus - - num: 8 - sym: AD2 - desc: VRAM address/data bus - - num: 9 - sym: AD1 - desc: VRAM address/data bus - - num: 10 - sym: AD0 - desc: VRAM address/data bus (most significant bit) - - num: 11 - sym: R/~W - desc: VRAM write strobe - - num: 12 - sym: GND + '~RAS': + desc: 'VRAM row address strobe' + '~CAS': + desc: 'VRAM column address strobe' + AD7: + desc: 'VRAM address/data bus (least significant bit)' + AD6: + desc: 'VRAM address/data bus' + AD5: + desc: 'VRAM address/data bus' + AD4: + desc: 'VRAM address/data bus' + AD3: + desc: 'VRAM address/data bus' + AD2: + desc: 'VRAM address/data bus' + AD1: + desc: 'VRAM address/data bus' + AD0: + desc: 'VRAM address/data bus (most significant bit)' + 'R/~W': + desc: 'VRAM write strobe' + GND: desc: ground - - num: 13 - sym: MODE - desc: CPU interface mode select (usu. a CPU address line) - - num: 14 - sym: ~CSW - desc: CPU-VDP write strobe - - num: 15 - sym: ~CSR - desc: CPU-VDP read strobe - - num: 16 - sym: ~INT - desc: CPU interrupt output - - num: 17 - sym: CD7 - desc: CPU data bus (least significant bit) - - num: 18 - sym: CD6 - desc: CPU data bus - - num: 19 - sym: CD5 - desc: CPU data bus - - num: 20 - sym: CD4 - desc: CPU data bus - - num: 21 - sym: CD3 - desc: CPU data bus - - num: 22 - sym: CD2 - desc: CPU data bus - - num: 23 - sym: CD1 - desc: CPU data bus - - num: 24 - sym: CD0 - desc: CPU data bus (most significant bit) - - num: 25 - sym: RD7 - desc: VRAM read data bus (least significant bit) - - num: 26 - sym: RD6 - desc: VRAM read data bus - - num: 27 - sym: RD5 - desc: VRAM read data bus - - num: 28 - sym: RD4 - desc: VRAM read data bus - - num: 29 - sym: RD3 - desc: VRAM read data bus - - num: 30 - sym: RD2 - desc: VRAM read data bus - - num: 31 - sym: RD1 - desc: VRAM read data bus - - num: 32 - sym: RD0 - desc: VRAM read data bus (most significant bit) - - num: 33 - sym: Vcc - desc: supply voltage - - num: 34 - sym: ~RESET~/SYNC - desc: reset (active low; when above +9V, sync input for ext. video) - - num: 35 - sym: EXTVDP - desc: external VDP input - - num: 36 - sym: COMVID - desc: composite video output - - num: 37 - sym: GROMCLK - desc: VDP output clock; XTAL/24 - - num: 38 - sym: CPUCLK - desc: VDP color burst frequency clock - - num: 39 - sym: XTAL1 - desc: crystal input - - num: 40 - sym: XTAL2 - desc: crystal input + MODE: + desc: 'CPU interface mode select (usu. a CPU address line)' + '~CSW': + desc: 'CPU-VDP write strobe' + '~CSR': + desc: 'CPU-VDP read strobe' + '~INT': + desc: 'CPU interrupt output' + CD7: + desc: 'CPU data bus (least significant bit)' + CD6: + desc: 'CPU data bus' + CD5: + desc: 'CPU data bus' + CD4: + desc: 'CPU data bus' + CD3: + desc: 'CPU data bus' + CD2: + desc: 'CPU data bus' + CD1: + desc: 'CPU data bus' + CD0: + desc: 'CPU data bus (most significant bit)' + RD7: + desc: 'VRAM read data bus (least significant bit)' + RD6: + desc: 'VRAM read data bus' + RD5: + desc: 'VRAM read data bus' + RD4: + desc: 'VRAM read data bus' + RD3: + desc: 'VRAM read data bus' + RD2: + desc: 'VRAM read data bus' + RD1: + desc: 'VRAM read data bus' + RD0: + desc: 'VRAM read data bus (most significant bit)' + Vcc: + desc: 'supply voltage' + '~RESET~/SYNC': + desc: 'reset (active low; when above +9V, sync input for ext. video)' + EXTVDP: + desc: 'external VDP input' + COMVID: + desc: 'composite video output' + GROMCLK: + desc: 'VDP output clock; XTAL/24' + CPUCLK: + desc: 'VDP color burst frequency clock' + XTAL1: + desc: 'crystal input' + XTAL2: + desc: 'crystal input' specs: - - param: XTAL frequency - val: "10.738635 ± 0.05%" - unit: MHz - - param: XTAL load capacitors - val: [15 (min), 39 (max)] - unit: pF - - param: VRAM size - val: 4 or 16 - unit: KB - - param: Number of colors - val: 15 plus transparent - - param: Number of sprites - val: 32 - - param: Sprites per line - val: 4 + - + param: 'XTAL frequency' + val: '10.738635 ± 0.05%' + unit: MHz + - + param: 'XTAL load capacitors' + val: + - '15 (min)' + - '39 (max)' + unit: pF + - + param: 'VRAM size' + val: '4 or 16' + unit: KB + - + param: 'Number of colors' + val: '15 plus transparent' + - + param: 'Number of sprites' + val: '32' + - + param: 'Sprites per line' + val: '4' notes: - - Bit order numbering is backwards. 0 is the MSB and 7 is the LSB. - - "Write to control register: set MODE high, write data byte, write destination register in the format 10000RRR." - - "Write to VRAM: set MODE high, write lower address bits, write upper address bits (with highest bits set to 01), set MODE low, write data bytes. Address autoincrements." - - "Read from status register: set MODE high, read byte." - - "Read from VRAM: write lower address bits, write upper address bits (with highest bits set to 00), set MODE low, read data bytes. Address autoincrements." - - MODE determines the source or destination of a CPU read/write data transfer. - - "Control registers: - - - - - - - - - -
0VDP option control bits (mode, external VDP enable)
1VDP option control bits (4/16K RAM, BLANK, interrupt enable, mode, sprite size, magnification)
2Name table base address (0-15)
3Color table base address (0-255)
4Pattern generator base address (0-7)
5Sprite attribute table base address (0-127)
6Sprite pattern generator base address (0-7)
7Text color, backdrop color
" - - "Graphics modes: - - - - - -
Text mode40x24 text positions, 6x8-pixel patterns, two colors, no sprites
Graphics I mode32x24 tile positions, 8x8-pixel patterns, 256 possible patterns with 2 colors per pattern, sprites
Graphics II mode32x24 tile positions, 8x8-pixel patterns, 768 possible patterns with 2 colors per row, sprites
Multicolor mode64x48 solid 4x4-pixel blocks of any color, sprites
" -... - - + - 'Bit order numbering is backwards. 0 is the MSB and 7 is the LSB.' + - 'Write to control register: set MODE high, write data byte, write destination register in the format 10000RRR.' + - 'Write to VRAM: set MODE high, write lower address bits, write upper address bits (with highest bits set to 01), set MODE low, write data bytes. Address autoincrements.' + - 'Read from status register: set MODE high, read byte.' + - 'Read from VRAM: write lower address bits, write upper address bits (with highest bits set to 00), set MODE low, read data bytes. Address autoincrements.' + - 'MODE determines the source or destination of a CPU read/write data transfer.' + - 'Control registers:
0VDP option control bits (mode, external VDP enable)
1VDP option control bits (4/16K RAM, BLANK, interrupt enable, mode, sprite size, magnification)
2Name table base address (0-15)
3Color table base address (0-255)
4Pattern generator base address (0-7)
5Sprite attribute table base address (0-127)
6Sprite pattern generator base address (0-7)
7Text color, backdrop color
' + - 'Graphics modes:
Text mode40x24 text positions, 6x8-pixel patterns, two colors, no sprites
Graphics I mode32x24 tile positions, 8x8-pixel patterns, 256 possible patterns with 2 colors per pattern, sprites
Graphics II mode32x24 tile positions, 8x8-pixel patterns, 768 possible patterns with 2 colors per row, sprites
Multicolor mode64x48 solid 4x4-pixel blocks of any color, sprites
' +packages: + DIP: + - '~RAS' + - '~CAS' + - AD7 + - AD6 + - AD5 + - AD4 + - AD3 + - AD2 + - AD1 + - AD0 + - 'R/~W' + - GND + - MODE + - '~CSW' + - '~CSR' + - '~INT' + - CD7 + - CD6 + - CD5 + - CD4 + - CD3 + - CD2 + - CD1 + - CD0 + - RD7 + - RD6 + - RD5 + - RD4 + - RD3 + - RD2 + - RD1 + - RD0 + - Vcc + - '~RESET~/SYNC' + - EXTVDP + - COMVID + - GROMCLK + - CPUCLK + - XTAL1 + - XTAL2 diff --git a/TMS9928A.yaml b/TMS9928A.yaml index d303d3d..f6e5e3c 100644 --- a/TMS9928A.yaml +++ b/TMS9928A.yaml @@ -1,135 +1,131 @@ ---- -description: "Video Display Processor (component output)" -aliases: [TMS9929A] -package: DIP -pincount: 40 -family: "Texas Instruments" -datasheet: "http://www.cs.columbia.edu/~sedwards/papers/TMS9918.pdf" +description: 'Video Display Processor (component output)' +aliases: + - TMS9929A +family: 'Texas Instruments' +datasheet: 'http://www.cs.columbia.edu/~sedwards/papers/TMS9918.pdf' pins: - - num: 1 - sym: ~RAS - desc: VRAM row address strobe - - num: 2 - sym: ~CAS - desc: VRAM column address strobe - - num: 3 - sym: AD7 - desc: VRAM address/data bus (least significant bit) - - num: 4 - sym: AD6 - desc: VRAM address/data bus - - num: 5 - sym: AD5 - desc: VRAM address/data bus - - num: 6 - sym: AD4 - desc: VRAM address/data bus - - num: 7 - sym: AD3 - desc: VRAM address/data bus - - num: 8 - sym: AD2 - desc: VRAM address/data bus - - num: 9 - sym: AD1 - desc: VRAM address/data bus - - num: 10 - sym: AD0 - desc: VRAM address/data bus (most significant bit) - - num: 11 - sym: R/~W - desc: VRAM write strobe - - num: 12 - sym: GND + '~RAS': + desc: 'VRAM row address strobe' + '~CAS': + desc: 'VRAM column address strobe' + AD7: + desc: 'VRAM address/data bus (least significant bit)' + AD6: + desc: 'VRAM address/data bus' + AD5: + desc: 'VRAM address/data bus' + AD4: + desc: 'VRAM address/data bus' + AD3: + desc: 'VRAM address/data bus' + AD2: + desc: 'VRAM address/data bus' + AD1: + desc: 'VRAM address/data bus' + AD0: + desc: 'VRAM address/data bus (most significant bit)' + 'R/~W': + desc: 'VRAM write strobe' + GND: desc: ground - - num: 13 - sym: MODE - desc: CPU interface mode select (usu. a CPU address line) - - num: 14 - sym: ~CSW - desc: CPU-VDP write strobe - - num: 15 - sym: ~CSR - desc: CPU-VDP read strobe - - num: 16 - sym: ~INT - desc: CPU interrupt output - - num: 17 - sym: CD7 - desc: CPU data bus (least significant bit) - - num: 18 - sym: CD6 - desc: CPU data bus - - num: 19 - sym: CD5 - desc: CPU data bus - - num: 20 - sym: CD4 - desc: CPU data bus - - num: 21 - sym: CD3 - desc: CPU data bus - - num: 22 - sym: CD2 - desc: CPU data bus - - num: 23 - sym: CD1 - desc: CPU data bus - - num: 24 - sym: CD0 - desc: CPU data bus (most significant bit) - - num: 25 - sym: RD7 - desc: VRAM read data bus (least significant bit) - - num: 26 - sym: RD6 - desc: VRAM read data bus - - num: 27 - sym: RD5 - desc: VRAM read data bus - - num: 28 - sym: RD4 - desc: VRAM read data bus - - num: 29 - sym: RD3 - desc: VRAM read data bus - - num: 30 - sym: RD2 - desc: VRAM read data bus - - num: 31 - sym: RD1 - desc: VRAM read data bus - - num: 32 - sym: RD0 - desc: VRAM read data bus (most significant bit) - - num: 33 - sym: Vcc - desc: supply voltage - - num: 34 - sym: ~RESET~/SYNC - desc: reset (active low; when above +9V, sync input for ext. video) - - num: 35 - sym: B-Y - desc: B-Y color difference output - - num: 36 - sym: Y - desc: luminance/sync output - - num: 37 - sym: GROMCLK - desc: VDP output clock; XTAL/24 - - num: 38 - sym: R-Y - desc: R-Y color difference output - - num: 39 - sym: XTAL1 - desc: crystal input - - num: 40 - sym: XTAL2 - desc: crystal input + MODE: + desc: 'CPU interface mode select (usu. a CPU address line)' + '~CSW': + desc: 'CPU-VDP write strobe' + '~CSR': + desc: 'CPU-VDP read strobe' + '~INT': + desc: 'CPU interrupt output' + CD7: + desc: 'CPU data bus (least significant bit)' + CD6: + desc: 'CPU data bus' + CD5: + desc: 'CPU data bus' + CD4: + desc: 'CPU data bus' + CD3: + desc: 'CPU data bus' + CD2: + desc: 'CPU data bus' + CD1: + desc: 'CPU data bus' + CD0: + desc: 'CPU data bus (most significant bit)' + RD7: + desc: 'VRAM read data bus (least significant bit)' + RD6: + desc: 'VRAM read data bus' + RD5: + desc: 'VRAM read data bus' + RD4: + desc: 'VRAM read data bus' + RD3: + desc: 'VRAM read data bus' + RD2: + desc: 'VRAM read data bus' + RD1: + desc: 'VRAM read data bus' + RD0: + desc: 'VRAM read data bus (most significant bit)' + Vcc: + desc: 'supply voltage' + '~RESET~/SYNC': + desc: 'reset (active low; when above +9V, sync input for ext. video)' + B-Y: + desc: 'B-Y color difference output' + 'Y': + desc: 'luminance/sync output' + GROMCLK: + desc: 'VDP output clock; XTAL/24' + R-Y: + desc: 'R-Y color difference output' + XTAL1: + desc: 'crystal input' + XTAL2: + desc: 'crystal input' notes: - - "See TMS9918A" - - TMS9928A outputs 60Hz video, TMS9929A outputs 50Hz video -... - - - + - 'See TMS9918A' + - 'TMS9928A outputs 60Hz video, TMS9929A outputs 50Hz video' +packages: + DIP: + - '~RAS' + - '~CAS' + - AD7 + - AD6 + - AD5 + - AD4 + - AD3 + - AD2 + - AD1 + - AD0 + - 'R/~W' + - GND + - MODE + - '~CSW' + - '~CSR' + - '~INT' + - CD7 + - CD6 + - CD5 + - CD4 + - CD3 + - CD2 + - CD1 + - CD0 + - RD7 + - RD6 + - RD5 + - RD4 + - RD3 + - RD2 + - RD1 + - RD0 + - Vcc + - '~RESET~/SYNC' + - B-Y + - 'Y' + - GROMCLK + - R-Y + - XTAL1 + - XTAL2 diff --git a/TPIC6B595.yaml b/TPIC6B595.yaml index 449cdb1..10d405a 100644 --- a/TPIC6B595.yaml +++ b/TPIC6B595.yaml @@ -1,82 +1,75 @@ ---- -description: "Power logic 8-bit shift register" -package: DIP -pincount: 20 -family: "TI" -datasheet: "http://focus.ti.com/lit/ds/symlink/tpic6b595.pdf" +description: 'Power logic 8-bit shift register' +family: TI +datasheet: 'http://focus.ti.com/lit/ds/symlink/tpic6b595.pdf' pins: - - num: 1 - sym: NC - desc: no connection - - num: 2 - sym: Vcc - desc: supply voltage - - num: 3 - sym: SER IN - desc: serial data input - - num: 4 - sym: DRAIN0 - desc: drain output - - num: 5 - sym: DRAIN1 - desc: drain output - - num: 6 - sym: DRAIN2 - desc: drain output - - num: 7 - sym: DRAIN3 - desc: drain output - - num: 8 - sym: ~SRCLR - desc: clear (active low) - - num: 9 - sym: ~G - desc: output enable (active low) - - num: 10 - sym: GND + Vcc: + desc: 'supply voltage' + 'SER IN': + desc: 'serial data input' + DRAIN0: + desc: 'drain output' + DRAIN1: + desc: 'drain output' + DRAIN2: + desc: 'drain output' + DRAIN3: + desc: 'drain output' + '~SRCLR': + desc: 'clear (active low)' + '~G': + desc: 'output enable (active low)' + GND: desc: ground - - num: 11 - sym: GND - desc: ground - - num: 12 - sym: RCK - desc: storage register latch input - - num: 13 - sym: SRCK - desc: shift register clock input - - num: 14 - sym: DRAIN4 - desc: drain output - - num: 15 - sym: DRAIN5 - desc: drain output - - num: 16 - sym: DRAIN6 - desc: drain output - - num: 17 - sym: DRAIN7 - desc: drain output - - num: 18 - sym: SER OUT - desc: serial data output - - num: 19 - sym: GND - desc: ground - - num: 20 - sym: NC - desc: no connection + RCK: + desc: 'storage register latch input' + SRCK: + desc: 'shift register clock input' + DRAIN4: + desc: 'drain output' + DRAIN5: + desc: 'drain output' + DRAIN6: + desc: 'drain output' + DRAIN7: + desc: 'drain output' + 'SER OUT': + desc: 'serial data output' specs: - - param: Maximum continuous current (per output) - val: 150 - unit: mA - - param: Current limit (per output) - val: 500 - unit: mA - - param: Maximum drain-to-source voltage - val: 50 - unit: V - - param: Drain output rise/fall time - val: 200 - unit: ns -... - + - + param: 'Maximum continuous current (per output)' + val: '150' + unit: mA + - + param: 'Current limit (per output)' + val: '500' + unit: mA + - + param: 'Maximum drain-to-source voltage' + val: '50' + unit: V + - + param: 'Drain output rise/fall time' + val: '200' + unit: ns +packages: + DIP: + - NC + - Vcc + - 'SER IN' + - DRAIN0 + - DRAIN1 + - DRAIN2 + - DRAIN3 + - '~SRCLR' + - '~G' + - GND + - GND + - RCK + - SRCK + - DRAIN4 + - DRAIN5 + - DRAIN6 + - DRAIN7 + - 'SER OUT' + - GND + - NC diff --git a/ULN2003.yaml b/ULN2003.yaml index e55cad1..e120c9f 100644 --- a/ULN2003.yaml +++ b/ULN2003.yaml @@ -1,76 +1,81 @@ ---- -description: Seven darlington array -aliases: [ULN2002, ULN2004] -package: DIP -pincount: 16 -family: "TI" -datasheet: "http://focus.ti.com/lit/ds/symlink/uln2003a.pdf" +description: 'Seven darlington array' +aliases: + - ULN2002 + - ULN2004 +family: TI +datasheet: 'http://focus.ti.com/lit/ds/symlink/uln2003a.pdf' pins: - - num: 1 - sym: 1B - desc: base 1 - - num: 2 - sym: 2B - desc: base 2 - - num: 3 - sym: 3B - desc: base 3 - - num: 4 - sym: 4B - desc: base 4 - - num: 5 - sym: 5B - desc: base 5 - - num: 6 - sym: 6B - desc: base 6 - - num: 7 - sym: 7B - desc: base 7 - - num: 8 - sym: E - desc: common emitter (ground) - - num: 9 - sym: COM + 1B: + desc: 'base 1' + 2B: + desc: 'base 2' + 3B: + desc: 'base 3' + 4B: + desc: 'base 4' + 5B: + desc: 'base 5' + 6B: + desc: 'base 6' + 7B: + desc: 'base 7' + E: + desc: 'common emitter (ground)' + COM: desc: common - - num: 10 - sym: 7C - desc: collector 7 - - num: 11 - sym: 6C - desc: collector 6 - - num: 12 - sym: 5C - desc: collector 5 - - num: 13 - sym: 4C - desc: collector 4 - - num: 14 - sym: 3C - desc: collector 3 - - num: 15 - sym: 2C - desc: collector 2 - - num: 16 - sym: 1C - desc: collector 1 + 7C: + desc: 'collector 7' + 6C: + desc: 'collector 6' + 5C: + desc: 'collector 5' + 4C: + desc: 'collector 4' + 3C: + desc: 'collector 3' + 2C: + desc: 'collector 2' + 1C: + desc: 'collector 1' specs: - - param: Series resistance at bases - val: [n/a (ULN2002), 2.7 (ULN2003), 10.5 (ULN2004)] - unit: "kΩ" - - param: Maximum collector-emitter voltage - val: 50 - unit: V - - param: Maximum input voltage - val: 30 - unit: V - - param: Maximum peak collector current - val: 500 - unit: mA + - + param: 'Series resistance at bases' + val: + - 'n/a (ULN2002)' + - '2.7 (ULN2003)' + - '10.5 (ULN2004)' + unit: 'kΩ' + - + param: 'Maximum collector-emitter voltage' + val: '50' + unit: V + - + param: 'Maximum input voltage' + val: '30' + unit: V + - + param: 'Maximum peak collector current' + val: '500' + unit: mA notes: - - ULN2002 is designed for use with 14V to 25V PMOS devices. - - ULN2003 is designed for use with 5V TTL/CMOS devices. - - ULN2004 is designed for use with 6V to 15V CMOS devices. -... - - + - 'ULN2002 is designed for use with 14V to 25V PMOS devices.' + - 'ULN2003 is designed for use with 5V TTL/CMOS devices.' + - 'ULN2004 is designed for use with 6V to 15V CMOS devices.' +packages: + DIP: + - 1B + - 2B + - 3B + - 4B + - 5B + - 6B + - 7B + - E + - COM + - 7C + - 6C + - 5C + - 4C + - 3C + - 2C + - 1C diff --git a/ULN2803.yaml b/ULN2803.yaml index 2ec5c7b..41c38ad 100644 --- a/ULN2803.yaml +++ b/ULN2803.yaml @@ -1,76 +1,77 @@ ---- -description: "Eight darlington array" -package: DIP -pincount: 18 -family: "TI" -datasheet: "http://focus.ti.com/lit/ds/symlink/uln2803a.pdf" +description: 'Eight darlington array' +family: TI +datasheet: 'http://focus.ti.com/lit/ds/symlink/uln2803a.pdf' pins: - - num: 1 - sym: 1B - desc: base 1 - - num: 2 - sym: 2B - desc: base 2 - - num: 3 - sym: 3B - desc: base 3 - - num: 4 - sym: 4B - desc: base 4 - - num: 5 - sym: 5B - desc: base 5 - - num: 6 - sym: 6B - desc: base 6 - - num: 7 - sym: 7B - desc: base 7 - - num: 8 - sym: 8B - desc: base 8 - - num: 9 - sym: GND + 1B: + desc: 'base 1' + 2B: + desc: 'base 2' + 3B: + desc: 'base 3' + 4B: + desc: 'base 4' + 5B: + desc: 'base 5' + 6B: + desc: 'base 6' + 7B: + desc: 'base 7' + 8B: + desc: 'base 8' + GND: desc: ground - - num: 10 - sym: COM + COM: desc: common - - num: 11 - sym: 8C - desc: collector 8 - - num: 12 - sym: 7C - desc: collector 7 - - num: 13 - sym: 6C - desc: collector 6 - - num: 14 - sym: 5C - desc: collector 5 - - num: 15 - sym: 4C - desc: collector 4 - - num: 16 - sym: 3C - desc: collector 3 - - num: 17 - sym: 2C - desc: collector 2 - - num: 18 - sym: 1C - desc: collector 1 + 8C: + desc: 'collector 8' + 7C: + desc: 'collector 7' + 6C: + desc: 'collector 6' + 5C: + desc: 'collector 5' + 4C: + desc: 'collector 4' + 3C: + desc: 'collector 3' + 2C: + desc: 'collector 2' + 1C: + desc: 'collector 1' specs: - - param: Series resistance at bases - val: 2.7 - unit: "kΩ" - - param: Maximum collector-emitter voltage - val: 50 - unit: V - - param: Maximum input voltage - val: 30 - unit: V - - param: Maximum continuous collector current - val: 500 - unit: mA -... - + - + param: 'Series resistance at bases' + val: '2.7' + unit: 'kΩ' + - + param: 'Maximum collector-emitter voltage' + val: '50' + unit: V + - + param: 'Maximum input voltage' + val: '30' + unit: V + - + param: 'Maximum continuous collector current' + val: '500' + unit: mA +packages: + DIP: + - 1B + - 2B + - 3B + - 4B + - 5B + - 6B + - 7B + - 8B + - GND + - COM + - 8C + - 7C + - 6C + - 5C + - 4C + - 3C + - 2C + - 1C diff --git a/WIRE.yaml b/WIRE.yaml index 80a2e05..7ab33f1 100644 --- a/WIRE.yaml +++ b/WIRE.yaml @@ -1,16 +1,14 @@ ---- -description: A piece of wire -package: DIP -pincount: 2 +description: 'A piece of wire' pins: - - num: 1 - sym: W1 - desc: one end of the wire - - num: 2 - sym: W2 - desc: the other end of the wire + W1: + desc: 'one end of the wire' + W2: + desc: 'the other end of the wire' notes: - - "It's pretty handy for connecting stuff." - - Resistance is usually pretty low. - - It bends! -... + - 'It''s pretty handy for connecting stuff.' + - 'Resistance is usually pretty low.' + - 'It bends!' +packages: + DIP: + - W1 + - W2 diff --git a/Z80.yaml b/Z80.yaml index 5811ffb..aea988f 100644 --- a/Z80.yaml +++ b/Z80.yaml @@ -1,152 +1,139 @@ ---- -description: "Z-80 Microprocessor" -aliases: [] -package: DIP -pincount: 40 -family: "Zilog" -datasheet: "http://www.z80.info/zip/z80.pdf" +description: 'Z-80 Microprocessor' +aliases: { } +family: Zilog +datasheet: 'http://www.z80.info/zip/z80.pdf' pins: - - num: 1 - sym: A11 - desc: Address Line 11 Output - - num: 2 - sym: A12 - desc: Address Line 12 Output - - num: 3 - sym: A13 - desc: Address Line 13 Output - - num: 4 - sym: A14 - desc: Address Line 14 Output - - num: 5 - sym: A15 - desc: Address Line 15 Output - - num: 6 - sym: CLK - desc: Clock Input - - num: 7 - sym: D4 - desc: Data Line 4 - - num: 8 - sym: D5 - desc: Data Line 5 - - num: 9 - sym: D3 - desc: Data Line 3 - - num: 10 - sym: D6 - desc: Data Line 6 - - num: 11 - sym: Vcc - desc: Power +5V - - num: 12 - sym: D2 - desc: Data Line 2 - - num: 13 - sym: D7 - desc: Data Line 7 - - num: 14 - sym: D0 - desc: Data Line 0 - - num: 15 - sym: D1 - desc: Data Line 1 - - num: 16 - sym: ~INT~ - desc: Maskable Interrupt Input (Active Low) - - num: 17 - sym: ~NMI~ - desc: Non-Maskable Interrupt Input (Active Low) - - num: 18 - sym: ~HALT~ - desc: Halt State Output (Active Low) - - num: 19 - sym: ~MREQ~ - desc: Memory Request Output (Active Low) - - num: 20 - sym: ~IORQ~ - desc: Input/Output Request Output (Active Low) - - num: 21 - sym: ~RD~ - desc: Read Request Output (Active Low) - - num: 22 - sym: ~WR~ - desc: Write Request Output (Active Low) - - num: 23 - sym: ~BUSACK~ - desc: Acknowledge Bus Request for DMA Output (Active Low) - - num: 24 - sym: ~WAIT~ - desc: Wait Request Input (Active Low) - - num: 25 - sym: ~BUSREQ~ - desc: Bus Request Input (Active Low) - - num: 26 - sym: ~RESET~ - desc: Reset Input (Active Low) - - num: 27 - sym: ~M1~ - desc: Machine Cycle 1 Output (Active Low) - - num: 28 - sym: ~RFSH~ - desc: Dynamic Memory Refresh Output (Active Low) - - num: 29 - sym: GND - desc: Power Ground - - num: 30 - sym: A0 - desc: Address Line 1 Output - - num: 31 - sym: A1 - desc: Address Line 1 Output - - num: 32 - sym: A2 - desc: Address Line 2 Output - - num: 33 - sym: A3 - desc: Address Line 3 Output - - num: 34 - sym: A4 - desc: Address Line 4 Output - - num: 35 - sym: A5 - desc: Address Line 5 Output - - num: 36 - sym: A6 - desc: Address Line 6 Output - - num: 37 - sym: A7 - desc: Address Line 7 Output - - num: 38 - sym: A8 - desc: Address Line 8 Output - - num: 39 - sym: A9 - desc: Address Line 9 Output - - num: 40 - sym: A10 - desc: Address Line 10 Output + A11: + desc: 'Address Line 11 Output' + A12: + desc: 'Address Line 12 Output' + A13: + desc: 'Address Line 13 Output' + A14: + desc: 'Address Line 14 Output' + A15: + desc: 'Address Line 15 Output' + CLK: + desc: 'Clock Input' + D4: + desc: 'Data Line 4' + D5: + desc: 'Data Line 5' + D3: + desc: 'Data Line 3' + D6: + desc: 'Data Line 6' + Vcc: + desc: 'Power +5V' + D2: + desc: 'Data Line 2' + D7: + desc: 'Data Line 7' + D0: + desc: 'Data Line 0' + D1: + desc: 'Data Line 1' + '~INT~': + desc: 'Maskable Interrupt Input (Active Low)' + '~NMI~': + desc: 'Non-Maskable Interrupt Input (Active Low)' + '~HALT~': + desc: 'Halt State Output (Active Low)' + '~MREQ~': + desc: 'Memory Request Output (Active Low)' + '~IORQ~': + desc: 'Input/Output Request Output (Active Low)' + '~RD~': + desc: 'Read Request Output (Active Low)' + '~WR~': + desc: 'Write Request Output (Active Low)' + '~BUSACK~': + desc: 'Acknowledge Bus Request for DMA Output (Active Low)' + '~WAIT~': + desc: 'Wait Request Input (Active Low)' + '~BUSREQ~': + desc: 'Bus Request Input (Active Low)' + '~RESET~': + desc: 'Reset Input (Active Low)' + '~M1~': + desc: 'Machine Cycle 1 Output (Active Low)' + '~RFSH~': + desc: 'Dynamic Memory Refresh Output (Active Low)' + GND: + desc: 'Power Ground' + A0: + desc: 'Address Line 1 Output' + A1: + desc: 'Address Line 1 Output' + A2: + desc: 'Address Line 2 Output' + A3: + desc: 'Address Line 3 Output' + A4: + desc: 'Address Line 4 Output' + A5: + desc: 'Address Line 5 Output' + A6: + desc: 'Address Line 6 Output' + A7: + desc: 'Address Line 7 Output' + A8: + desc: 'Address Line 8 Output' + A9: + desc: 'Address Line 9 Output' + A10: + desc: 'Address Line 10 Output' specs: - - param: "Maximum Voltage (Vcc)" - val: 6.0 - unit: V - - param: "Clock Speed (Original Z-80)" - val: 2 - unit: MHz + - + param: 'Maximum Voltage (Vcc)' + val: '6' + unit: V + - + param: 'Clock Speed (Original Z-80)' + val: '2' + unit: MHz notes: - - "Registers: - - - - - - - - - - - - -
AAccumulator
FCondition Flags
B & CGeneral Purpose 8-bit registers (may be used together as a 16-bit register)
D & EGeneral Purpose 8-bit registers (may be used together as a 16-bit register)
H & LHigh & Low bytes of 16-bit Address Pointer Register
IInterrupt Register - Holds upper 8 bits of memory address for vectored interrupt processing
RRefresh Register - Automatically incremented for Dynamic Memory Refresh (read only)
IX & IY16-bit Index Registers
SP16-bit Stack Pointer Register
PCA16-bit Program Counter Register
IFFInterrupt Flip Flop Flag
" - - "All general-purpose registers are duplicated in the prime set (A', F',B', C', D', E', H', L')" - + - 'Registers:
AAccumulator
FCondition Flags
B & CGeneral Purpose 8-bit registers (may be used together as a 16-bit register)
D & EGeneral Purpose 8-bit registers (may be used together as a 16-bit register)
H & LHigh & Low bytes of 16-bit Address Pointer Register
IInterrupt Register - Holds upper 8 bits of memory address for vectored interrupt processing
RRefresh Register - Automatically incremented for Dynamic Memory Refresh (read only)
IX & IY16-bit Index Registers
SP16-bit Stack Pointer Register
PCA16-bit Program Counter Register
IFFInterrupt Flip Flop Flag
' + - 'All general-purpose registers are duplicated in the prime set (A'', F'',B'', C'', D'', E'', H'', L'')' +packages: + DIP: + - A11 + - A12 + - A13 + - A14 + - A15 + - CLK + - D4 + - D5 + - D3 + - D6 + - Vcc + - D2 + - D7 + - D0 + - D1 + - '~INT~' + - '~NMI~' + - '~HALT~' + - '~MREQ~' + - '~IORQ~' + - '~RD~' + - '~WR~' + - '~BUSACK~' + - '~WAIT~' + - '~BUSREQ~' + - '~RESET~' + - '~M1~' + - '~RFSH~' + - GND + - A0 + - A1 + - A2 + - A3 + - A4 + - A5 + - A6 + - A7 + - A8 + - A9 + - A10 diff --git a/Z80PIO.yaml b/Z80PIO.yaml index 06291fc..2d7a169 100644 --- a/Z80PIO.yaml +++ b/Z80PIO.yaml @@ -1,142 +1,143 @@ ---- -description: "Z80-PIO" -aliases: [] -package: DIP -pincount: 40 -family: "Zilog" -datasheet: "http://www.zilog.com/docs/z80/ps0180.pdf" +description: Z80-PIO +aliases: { } +family: Zilog +datasheet: 'http://www.zilog.com/docs/z80/ps0180.pdf' pins: - - num: 1 - sym: D2 - desc: Data Line 2 To CPU (Bi-Directional) - - num: 2 - sym: D7 - desc: Data Line 7 To CPU (Bi-Directional) - - num: 3 - sym: D6 - desc: Data Line 6 To CPU (Bi-Directional) - - num: 4 - sym: ~CE~ - desc: Chip Enable Input (Active Low) - - num: 5 - sym: C/~D~ - desc: Control/Data Select (High = Ctrl, Low = Data) - - num: 6 - sym: B/~A~ - desc: Port A or B Select (Low = A, High = B) - - num: 7 - sym: PA7 - desc: Peripheral Port A Line 7 (Bi-Directional) - - num: 8 - sym: PA6 - desc: Peripheral Port A Line 6 (Bi-Directional) - - num: 9 - sym: PA5 - desc: Peripheral Port A Line 5 (Bi-Directional) - - num: 10 - sym: PA4 - desc: Peripheral Port A Line 4 (Bi-Directional) - - num: 11 - sym: GND - desc: Power Ground - - num: 12 - sym: PA3 - desc: Peripheral Port A Line 3 (Bi-Directional) - - num: 13 - sym: PA2 - desc: Peripheral Port A Line 2 (Bi-Directional) - - num: 14 - sym: PA1 - desc: Peripheral Port A Line 1 (Bi-Directional) - - num: 15 - sym: PA0 - desc: Peripheral Port A Line 0 (Bi-Directional) - - num: 16 - sym: ~ASTB~ - desc: Port A Strobe Input from Peripheral (Active Low) - - num: 17 - sym: ~BSTB~ - desc: Port B Strobe Input from Peripherial (Active Low) - - num: 18 - sym: ARDY - desc: Register A Ready Output (Active High) - - num: 19 - sym: D0 - desc: Data Line 0 To CPU (Bi-Directional) - - num: 20 - sym: D1 - desc: Data Line 1 To CPU (Bi-Directional) - - num: 21 - sym: BRDY - desc: Register B Ready Output (Active High) - - num: 22 - sym: IEO - desc: Interrupt Enable Output (Active High) - - num: 23 - sym: ~INT~ - desc: Interrupt Input (Active Low) - - num: 24 - sym: IEI - desc: Interrupt Enable Input (Active High) - - num: 25 - sym: CLK - desc: System Clock Input - - num: 26 - sym: +5V - desc: Power 5V DC - - num: 27 - sym: PB0 - desc: Peripheral Port A Line 0 (Bi-Directional) - - num: 28 - sym: PB1 - desc: Peripheral Port A Line 1 (Bi-Directional) - - num: 29 - sym: PB2 - desc: Peripheral Port A Line 2 (Bi-Directional) - - num: 30 - sym: PB3 - desc: Peripheral Port A Line 3 (Bi-Directional) - - num: 31 - sym: PB4 - desc: Peripheral Port A Line 4 (Bi-Directional) - - num: 32 - sym: PB5 - desc: Peripheral Port A Line 5 (Bi-Directional) - - num: 33 - sym: PB6 - desc: Peripheral Port A Line 6 (Bi-Directional) - - num: 34 - sym: PB7 - desc: Peripheral Port A Line 7 (Bi-Directional) - - num: 35 - sym: ~RD~ - desc: Read Request Input from CPU (Active Low) - - num: 36 - sym: ~IORQ~ - desc: Input/Output Request Input from CPU (Active Low) - - num: 37 - sym: ~M1~ - desc: Machine Cycle 1 Input from CPU (Active Low) - - num: 38 - sym: D3 - desc: Data Line 3 To CPU (Bi-Directional) - - num: 39 - sym: D4 - desc: Data Line 4 To CPU (Bi-Directional) - - num: 40 - sym: D5 - desc: Data Line 5 To CPU (Bi-Directional) + D2: + desc: 'Data Line 2 To CPU (Bi-Directional)' + D7: + desc: 'Data Line 7 To CPU (Bi-Directional)' + D6: + desc: 'Data Line 6 To CPU (Bi-Directional)' + '~CE~': + desc: 'Chip Enable Input (Active Low)' + 'C/~D~': + desc: 'Control/Data Select (High = Ctrl, Low = Data)' + 'B/~A~': + desc: 'Port A or B Select (Low = A, High = B)' + PA7: + desc: 'Peripheral Port A Line 7 (Bi-Directional)' + PA6: + desc: 'Peripheral Port A Line 6 (Bi-Directional)' + PA5: + desc: 'Peripheral Port A Line 5 (Bi-Directional)' + PA4: + desc: 'Peripheral Port A Line 4 (Bi-Directional)' + GND: + desc: 'Power Ground' + PA3: + desc: 'Peripheral Port A Line 3 (Bi-Directional)' + PA2: + desc: 'Peripheral Port A Line 2 (Bi-Directional)' + PA1: + desc: 'Peripheral Port A Line 1 (Bi-Directional)' + PA0: + desc: 'Peripheral Port A Line 0 (Bi-Directional)' + '~ASTB~': + desc: 'Port A Strobe Input from Peripheral (Active Low)' + '~BSTB~': + desc: 'Port B Strobe Input from Peripherial (Active Low)' + ARDY: + desc: 'Register A Ready Output (Active High)' + D0: + desc: 'Data Line 0 To CPU (Bi-Directional)' + D1: + desc: 'Data Line 1 To CPU (Bi-Directional)' + BRDY: + desc: 'Register B Ready Output (Active High)' + IEO: + desc: 'Interrupt Enable Output (Active High)' + '~INT~': + desc: 'Interrupt Input (Active Low)' + IEI: + desc: 'Interrupt Enable Input (Active High)' + CLK: + desc: 'System Clock Input' + +5V: + desc: 'Power 5V DC' + PB0: + desc: 'Peripheral Port A Line 0 (Bi-Directional)' + PB1: + desc: 'Peripheral Port A Line 1 (Bi-Directional)' + PB2: + desc: 'Peripheral Port A Line 2 (Bi-Directional)' + PB3: + desc: 'Peripheral Port A Line 3 (Bi-Directional)' + PB4: + desc: 'Peripheral Port A Line 4 (Bi-Directional)' + PB5: + desc: 'Peripheral Port A Line 5 (Bi-Directional)' + PB6: + desc: 'Peripheral Port A Line 6 (Bi-Directional)' + PB7: + desc: 'Peripheral Port A Line 7 (Bi-Directional)' + '~RD~': + desc: 'Read Request Input from CPU (Active Low)' + '~IORQ~': + desc: 'Input/Output Request Input from CPU (Active Low)' + '~M1~': + desc: 'Machine Cycle 1 Input from CPU (Active Low)' + D3: + desc: 'Data Line 3 To CPU (Bi-Directional)' + D4: + desc: 'Data Line 4 To CPU (Bi-Directional)' + D5: + desc: 'Data Line 5 To CPU (Bi-Directional)' specs: - - param: "Maximum Voltage Vcc" - val: 7.0 - unit: VDC - - param: "Maximum Input Voltage" - val: Vcc + 0.3 - unit: VDC - - param: "Storage Temperature" - val: -65 to +150 - unit: Degrees C + - + param: 'Maximum Voltage Vcc' + val: '7' + unit: VDC + - + param: 'Maximum Input Voltage' + val: 'Vcc + 0.3' + unit: VDC + - + param: 'Storage Temperature' + val: '-65 to +150' + unit: 'Degrees C' notes: - - The Z8O Parallel I/O (PlO) Circuit is a programmable, two port device which provides a TTL compatible interface between peripheral devices and the Z80-GPU. The CPU can configure the Z8O-PIO to interface with a wide range of peripheral devices with no other external logic required, Typical peripheral devices that are fully compatible with the Z80-PIO include most keyboards, paper tape readers and punches, printers, PROM programmers, etc. The Z8O-PIO is packaged in a 40-pin DIP, or a 44-pin PLCC, or a 44-pin OFP. NMOS and CMOS versions are also available. Major features of the Z80-PlO include. - - One of the unique features of the Z80-PlO that separates it from other interface controllers is that all data transfer between the peripheral device and the CPU is accomplished under total interrupt control. The interrupt logic of the PIO permits full usage of the efficient interrupt capabilities of the Z80-CPU during I/0 transfers. All logic necessary to implement a fully nested interrupt structure is included in the PIO so that additional circuits are not required. Another unique feature of the PlO is that it can be programmed to interrupt the CPU on the occurrence of specified status conditions in the peripheral device. For example, the PlO can be programmed to interrupt if any specified peripheral alarm conditions should occur. This interrupt capability reduces the amount of time that the processor must spend in polling peripheral status. - + - 'The Z8O Parallel I/O (PlO) Circuit is a programmable, two port device which provides a TTL compatible interface between peripheral devices and the Z80-GPU. The CPU can configure the Z8O-PIO to interface with a wide range of peripheral devices with no other external logic required, Typical peripheral devices that are fully compatible with the Z80-PIO include most keyboards, paper tape readers and punches, printers, PROM programmers, etc. The Z8O-PIO is packaged in a 40-pin DIP, or a 44-pin PLCC, or a 44-pin OFP. NMOS and CMOS versions are also available. Major features of the Z80-PlO include.' + - 'One of the unique features of the Z80-PlO that separates it from other interface controllers is that all data transfer between the peripheral device and the CPU is accomplished under total interrupt control. The interrupt logic of the PIO permits full usage of the efficient interrupt capabilities of the Z80-CPU during I/0 transfers. All logic necessary to implement a fully nested interrupt structure is included in the PIO so that additional circuits are not required. Another unique feature of the PlO is that it can be programmed to interrupt the CPU on the occurrence of specified status conditions in the peripheral device. For example, the PlO can be programmed to interrupt if any specified peripheral alarm conditions should occur. This interrupt capability reduces the amount of time that the processor must spend in polling peripheral status.' +packages: + DIP: + - D2 + - D7 + - D6 + - '~CE~' + - 'C/~D~' + - 'B/~A~' + - PA7 + - PA6 + - PA5 + - PA4 + - GND + - PA3 + - PA2 + - PA1 + - PA0 + - '~ASTB~' + - '~BSTB~' + - ARDY + - D0 + - D1 + - BRDY + - IEO + - '~INT~' + - IEI + - CLK + - +5V + - PB0 + - PB1 + - PB2 + - PB3 + - PB4 + - PB5 + - PB6 + - PB7 + - '~RD~' + - '~IORQ~' + - '~M1~' + - D3 + - D4 + - D5 diff --git a/_template14.yaml b/_template14.yaml deleted file mode 100644 index 226e9f4..0000000 --- a/_template14.yaml +++ /dev/null @@ -1,54 +0,0 @@ ---- -description: -package: DIP -pincount: 14 -family: "7400" -datasheet: -pins: - - num: 1 - sym: - desc: - - num: 2 - sym: - desc: - - num: 3 - sym: - desc: - - num: 4 - sym: - desc: - - num: 5 - sym: - desc: - - num: 6 - sym: - desc: - - num: 7 - sym: - desc: - - num: 8 - sym: - desc: - - num: 9 - sym: - desc: - - num: 10 - sym: - desc: - - num: 11 - sym: - desc: - - num: 12 - sym: - desc: - - num: 13 - sym: - desc: - - num: 14 - sym: - desc: -specs: - - param: Propagation delay, - val: [0 (74HC), 0 (74HCT)] - unit: ns -... diff --git a/_template16.yaml b/_template16.yaml deleted file mode 100644 index 504d153..0000000 --- a/_template16.yaml +++ /dev/null @@ -1,60 +0,0 @@ ---- -description: -package: DIP -pincount: 16 -family: "7400" -datasheet: -pins: - - num: 1 - sym: - desc: - - num: 2 - sym: - desc: - - num: 3 - sym: - desc: - - num: 4 - sym: - desc: - - num: 5 - sym: - desc: - - num: 6 - sym: - desc: - - num: 7 - sym: - desc: - - num: 8 - sym: - desc: - - num: 9 - sym: - desc: - - num: 10 - sym: - desc: - - num: 11 - sym: - desc: - - num: 12 - sym: - desc: - - num: 13 - sym: - desc: - - num: 14 - sym: - desc: - - num: 15 - sym: - desc: - - num: 16 - sym: - desc: -specs: - - param: Propagation delay, - val: [0 (74HC), 0 (74HCT)] - unit: ns -... diff --git a/_template20.yaml b/_template20.yaml deleted file mode 100644 index 023c338..0000000 --- a/_template20.yaml +++ /dev/null @@ -1,72 +0,0 @@ ---- -description: -package: DIP -pincount: 20 -family: "7400" -datasheet: -pins: - - num: 1 - sym: - desc: - - num: 2 - sym: - desc: - - num: 3 - sym: - desc: - - num: 4 - sym: - desc: - - num: 5 - sym: - desc: - - num: 6 - sym: - desc: - - num: 7 - sym: - desc: - - num: 8 - sym: - desc: - - num: 9 - sym: - desc: - - num: 10 - sym: - desc: - - num: 11 - sym: - desc: - - num: 12 - sym: - desc: - - num: 13 - sym: - desc: - - num: 14 - sym: - desc: - - num: 15 - sym: - desc: - - num: 16 - sym: - desc: - - num: 17 - sym: - desc: - - num: 18 - sym: - desc: - - num: 19 - sym: - desc: - - num: 20 - sym: - desc: -specs: - - param: Propagation delay, - val: [0 (74HC), 0 (74HCT)] - unit: ns -... diff --git a/_template24.yaml b/_template24.yaml deleted file mode 100644 index f6590ec..0000000 --- a/_template24.yaml +++ /dev/null @@ -1,84 +0,0 @@ ---- -description: -package: DIP -pincount: 24 -family: "7400" -datasheet: -pins: - - num: 1 - sym: - desc: - - num: 2 - sym: - desc: - - num: 3 - sym: - desc: - - num: 4 - sym: - desc: - - num: 5 - sym: - desc: - - num: 6 - sym: - desc: - - num: 7 - sym: - desc: - - num: 8 - sym: - desc: - - num: 9 - sym: - desc: - - num: 10 - sym: - desc: - - num: 11 - sym: - desc: - - num: 12 - sym: - desc: - - num: 13 - sym: - desc: - - num: 14 - sym: - desc: - - num: 15 - sym: - desc: - - num: 16 - sym: - desc: - - num: 17 - sym: - desc: - - num: 18 - sym: - desc: - - num: 19 - sym: - desc: - - num: 20 - sym: - desc: - - num: 21 - sym: - desc: - - num: 22 - sym: - desc: - - num: 23 - sym: - desc: - - num: 24 - sym: - desc: -specs: - - param: Propagation delay, - val: [0 (74HC), 0 (74HCT)] - unit: ns -... diff --git a/_template8.yaml b/_template8.yaml deleted file mode 100644 index bb43678..0000000 --- a/_template8.yaml +++ /dev/null @@ -1,31 +0,0 @@ ---- -description: -package: DIP -pincount: 8 -datasheet: -pins: - - num: 1 - sym: - desc: - - num: 2 - sym: - desc: - - num: 3 - sym: - desc: - - num: 4 - sym: - desc: - - num: 5 - sym: - desc: - - num: 6 - sym: - desc: - - num: 7 - sym: - desc: - - num: 8 - sym: - desc: -... diff --git a/packages.md b/packages.md new file mode 100644 index 0000000..cb13167 --- /dev/null +++ b/packages.md @@ -0,0 +1,139 @@ +# Semiconductor Packages +and how the data has to be structured in the `yaml`-file. + +If a package you refer to is not listed below please add it here before using inside of a `yaml`-file. + +## Available Packages + + +### Diode + +_Not yet supported_ + + +### Transistor + +_Not yet supported_ + + +### Single row + ++ Single In-line Package (SIP or SIPP) + +### Dual row + ++ Dual Flat No-leads Package (DFN) ++ Dual In-line Package (DIP, DIL, DIPP, CERDIP, CDIP, PDIP, SPDIP, SDIP, EDIP) ++ Flatpack (FP) ++ Small Outline Integrated Circuit (SOIC, SO, MSOIC, SOJ, SOP, SSOP, TSOP, TSSOP) ++ Zig-zag In-line Package (ZIP) + +### Quad row + ++ Leadless Chip Carrier (LCC, PLCC or CLCC) ++ Quad Flat No-leads Package (QFN, QFP, MLF) ++ Quad In-line Package (QIP, QIL, QUIP or QUIL) + + +### Grid array + ++ Ball Grid Array (BGA) ++ Embedded Wafer Level Ball Grid Array (eWLB) - _Not yet supported_ ++ Land Grid Array (LGA) - _Not yet supported_ ++ Pin Grid Array (PGA) - _Not yet supported_ + + +### Wafer + +_Not yet supported_ + + +## Supported data structure + +**General:** + +If a pin is present but not connected or 'do not connect' use `NC`. +If a pin isn't present use `NOT_PRESENT` instead. + + +### Single- / Dual- / Quad row + +All pins can be numbered counter clockwise (SIP and ZIP from left to right) started from the marking (little dot). +Data is an array of pins starting with pin 1. + +May a special pin like a `HEATSINK` occur or a bottom plate `BOTTOM_PLATE` (only QFN). +If this is the case you can't use an array and you have to use a dictionary. +Note all not listed pins in the dictionary are `NC` by default. + +See example below [ATtiny85](http://www.atmel.com/Images/atmel-2586-avr-8-bit-microcontroller-attiny25-attiny45-attiny85_datasheet.pdf): +``` + PDIP: &DIP [PB5, PB3, PB4, GND, PB0, PB1, PB2, Vcc] + SOIC: *DIP + TSSOP: *DIP + QFN: + 1: PB5 + 2: PB3 + 5: PB4 + 8: GND + 11: PB0 + 12: PB1 + 14: PB2 + 15: Vcc + BOTTOM_PLATE: GND +``` + +### Grid array + +**Ball Grid Array:** + +All pins can be defined by a column (letter) and a row (number). +The first pin `A1` is in the upper left corner (TOP VIEW). + +The pins are defined in a dictionary with the position as key and the pin as value. + +May a special pin like a `HEATSINK` occur. +**Note all not listed pins in the dictionary are `NOT_PRESENT` by default, not `NC`.** + +See example below [DS32khz](http://datasheets.maximintegrated.com/en/ds/DS32kHz.pdf): +``` + BGA: + A1: GND + A2: GND + A3: GND + A4: V__BAT + A5: V__BAT + A6: GND + A7: NC + A8: NC + A9: GND + B1: GND + B2: GND + B3: GND + B4: V__BAT + B5: V__BAT + B6: GND + B7: NC + B8: NC + B9: GND + C1: GND + C2: Vcc + C3: Vcc + C4: 32khz + C5: 32khz + C6: GND + C7: NC + C8: NC + C9: GND + D1: GND + D2: Vcc + D3: Vcc + D4: 32khz + D5: 32khz + D6: GND + D7: NC + D8: NC + D9: GND +``` + + +Wikipedia: [Semiconductor Package](https://en.wikipedia.org/wiki/Semiconductor_package) \ No newline at end of file